]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/wm: Consolidate SAGV pipe active/interlace checks to common code
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 24 Mar 2026 13:48:37 +0000 (15:48 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 9 Apr 2026 15:06:56 +0000 (18:06 +0300)
There are no differences between the platforms when
considering whether SAGV can be used when the pipe is
inactive or using an interlaced mode. Consolidate the
checks to common code.

Note that we weren't even checking for interlaced modes
on TGL+, but since we've previously soft defeatured
interlaced modes on TGL+ that was more or less fine.
The hardware does still have the capability though,
and in case we ever decide to resurrect it having the
check seems like a good idea.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260324134843.2364-4-ville.syrjala@linux.intel.com
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
drivers/gpu/drm/i915/display/skl_watermark.c

index bcdca1b99fe4370d5d6382d00193fc97ccd40273..e37fde9f765db27b15f62a54e30ffa7bc580a5a9 100644 (file)
@@ -308,12 +308,6 @@ static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
        enum plane_id plane_id;
        int max_level = INT_MAX;
 
-       if (!crtc_state->hw.active)
-               return true;
-
-       if (crtc_state->hw.pipe_mode.flags & DRM_MODE_FLAG_INTERLACE)
-               return false;
-
        for_each_plane_id_on_crtc(crtc, plane_id) {
                const struct skl_plane_wm *wm =
                        &crtc_state->wm.skl.optimal.planes[plane_id];
@@ -356,9 +350,6 @@ static bool tgl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
        enum plane_id plane_id;
 
-       if (!crtc_state->hw.active)
-               return true;
-
        for_each_plane_id_on_crtc(crtc, plane_id) {
                const struct skl_plane_wm *wm =
                        &crtc_state->wm.skl.optimal.planes[plane_id];
@@ -388,6 +379,12 @@ bool intel_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
        if (crtc_state->inherited)
                return false;
 
+       if (!crtc_state->hw.active)
+               return true;
+
+       if (crtc_state->hw.pipe_mode.flags & DRM_MODE_FLAG_INTERLACE)
+               return false;
+
        if (HAS_SAGV_WM(display))
                return tgl_crtc_can_enable_sagv(crtc_state);
        else