net: phy: vitesse: add inband caps and configuration

Add support for VSC8662 reporting its inband capabilities, and also
hook to configure the PHY's inband mode.

This fixes a regression in the macb driver caused by commit
1338cfef1ff1 ("net: macb: fix SGMII with inband aneg disabled")

Cc: stable+noautosel@kernel.org # neither this nor commit under fixes should be backported
Reported-by: Conor Dooley <conor@kernel.org>
Link: https://lore.kernel.org/r/20260304-nebulizer-rounding-40fbc81a2ba1@spud
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Fixes: 1338cfef1ff1b958 ("net: macb: fix SGMII with inband aneg disabled")
Link: https://patch.msgid.link/E1w082O-0000000ChNc-1wDz@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/phy/vitesse.c b/drivers/net/phy/vitesse.c
index b1b7bbba284e6f78eba3741941234fb81c679aa8..1a430e832f66ee66074435bae16f88f7814964a9 100644 (file)
--- a/drivers/net/phy/vitesse.c
+++ b/drivers/net/phy/vitesse.c
@@ -62,6 +62,13 @@
 /* Vitesse Extended Page Access Register */
 #define MII_VSC82X4_EXT_PAGE_ACCESS    0x1f
 
+/* Vitesse VSC8662 extended control register */
+#define VSC8662_EXT_CON1               0x17
+#define VSC8662_EXT_CON_MAC_AN         BIT(13)
+
+#define VSC8662_MAC_AN                 0x1b
+#define VSC8662_MAC_AN_BYPASS          BIT(13)
+
 /* Vitesse VSC73XX Extended Control Register */
 #define MII_VSC73XX_PHY_CTRL_EXT3              0x14
 
@@ -140,6 +147,38 @@ static int vsc824x_config_init(struct phy_device *phydev)
        return err;
 }
 
+static unsigned int vsc8662_inband_caps(struct phy_device *phydev,
+                                       phy_interface_t interface)
+{
+       if (interface == PHY_INTERFACE_MODE_SGMII)
+               return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE |
+                      LINK_INBAND_BYPASS;
+
+       return 0;
+}
+
+static int vsc8662_config_inband(struct phy_device *phydev, unsigned int modes)
+{
+       u16 mask, set;
+       int ret;
+
+       mask = VSC8662_MAC_AN_BYPASS;
+       set = modes & LINK_INBAND_BYPASS ? mask : 0;
+       ret = phy_modify(phydev, VSC8662_MAC_AN, mask, set);
+       if (ret < 0)
+               return ret;
+
+       mask = VSC8662_EXT_CON_MAC_AN;
+       set = modes & (LINK_INBAND_ENABLE | LINK_INBAND_BYPASS) ? mask : 0;
+
+       ret = phy_modify_changed(phydev, VSC8662_EXT_CON1, mask, set);
+       if (ret <= 0)
+               return ret;
+
+       /* We need to soft-reset the PHY when changing VSC8662_EXT_CON_MAC_AN */
+       return genphy_soft_reset(phydev);
+}
+
 #define VSC73XX_EXT_PAGE_ACCESS 0x1f
 
 static int vsc73xx_read_page(struct phy_device *phydev)
@@ -649,6 +688,8 @@ static struct phy_driver vsc82xx_driver[] = {
        .phy_id_mask    = 0x000ffff0,
        /* PHY_GBIT_FEATURES */
        .config_init    = &vsc824x_config_init,
+       .inband_caps    = vsc8662_inband_caps,
+       .config_inband  = vsc8662_config_inband,
        .config_aneg    = &vsc82x4_config_aneg,
        .config_intr    = &vsc82xx_config_intr,
        .handle_interrupt = &vsc82xx_handle_interrupt,