]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
alpha.md (fp cmp): Replicate patterns for ALPHA_TP_INSN.
authorRichard Henderson <rth@cygnus.com>
Thu, 30 Jul 1998 19:12:16 +0000 (12:12 -0700)
committerRichard Henderson <rth@gcc.gnu.org>
Thu, 30 Jul 1998 19:12:16 +0000 (12:12 -0700)
        * alpha.md (fp cmp): Replicate patterns for ALPHA_TP_INSN.
        (fcmov): Remove ALPHA_TP_INSN patterns -- fcmov doesn't trap.

From-SVN: r21500

gcc/ChangeLog
gcc/config/alpha/alpha.md

index e64bdad098c195dd20d189fd3539167193d45554..cc357f6e9f901f32366faed61825567e8484b9e8 100644 (file)
@@ -1,3 +1,8 @@
+Thu Jul 30 19:11:30 1998  Richard Henderson  <rth@cygnus.com>
+
+       * alpha.md (fp cmp): Replicate patterns for ALPHA_TP_INSN.
+       (fcmov): Remove ALPHA_TP_INSN patterns -- fcmov doesn't trap.
+
 Thu Jul 30 12:51:09 1998  Mark Mitchell  <mark@markmitchell.com>
 
        * dyn-string.h: New file.
index 77c0028b7e6113d4d50277181a5dfae51b63ae05..87ebf95e168fb0b5a55ec70c26e65f8069843a44 100644 (file)
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
 
+(define_insn ""
+  [(set (match_operand:DF 0 "register_operand" "=&f")
+       (match_operator:DF 1 "alpha_comparison_operator"
+                          [(float_extend:DF
+                            (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
+                           (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))]
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
+  "cmp%-%C1%' %R2,%R3,%0"
+  [(set_attr "type" "fadd")
+   (set_attr "trap" "yes")])
+
 (define_insn ""
   [(set (match_operand:DF 0 "register_operand" "=f")
        (match_operator:DF 1 "alpha_comparison_operator"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
 
+(define_insn ""
+  [(set (match_operand:DF 0 "register_operand" "=&f")
+       (match_operator:DF 1 "alpha_comparison_operator"
+                          [(match_operand:DF 2 "reg_or_fp0_operand" "fG")
+                           (float_extend:DF
+                            (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
+  "cmp%-%C1%' %R2,%R3,%0"
+  [(set_attr "type" "fadd")
+   (set_attr "trap" "yes")])
+
 (define_insn ""
   [(set (match_operand:DF 0 "register_operand" "=f")
        (match_operator:DF 1 "alpha_comparison_operator"
    (set_attr "trap" "yes")])
 
 (define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=f")
+  [(set (match_operand:DF 0 "register_operand" "=&f")
        (match_operator:DF 1 "alpha_comparison_operator"
                           [(float_extend:DF
                             (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
                            (float_extend:DF
                             (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
-  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "cmp%-%C1%' %R2,%R3,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
 
 (define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f,f")
-       (if_then_else:DF 
-        (match_operator 3 "signed_comparison_operator"
-                        [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
-                         (match_operand:DF 2 "fp0_operand" "G,G")])
-        (match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
-        (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
-  "@
-   fcmov%C3 %R4,%R1,%0
-   fcmov%D3 %R4,%R5,%0"
-  [(set_attr "type" "fcmov")])
+  [(set (match_operand:DF 0 "register_operand" "=f")
+       (match_operator:DF 1 "alpha_comparison_operator"
+                          [(float_extend:DF
+                            (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
+                           (float_extend:DF
+                            (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
+  "cmp%-%C1%' %R2,%R3,%0"
+  [(set_attr "type" "fadd")
+   (set_attr "trap" "yes")])
 
 (define_insn ""
   [(set (match_operand:DF 0 "register_operand" "=f,f")
                          (match_operand:DF 2 "fp0_operand" "G,G")])
         (match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
         (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
-  "@
-   fcmov%C3 %R4,%R1,%0
-   fcmov%D3 %R4,%R5,%0"
-  [(set_attr "type" "fcmov")])
-
-(define_insn ""
-  [(set (match_operand:SF 0 "register_operand" "=&f,f")
-       (if_then_else:SF 
-        (match_operator 3 "signed_comparison_operator"
-                        [(match_operand:DF 4 "reg_or_fp0_operand" "fG,fG")
-                         (match_operand:DF 2 "fp0_operand" "G,G")])
-        (match_operand:SF 1 "reg_or_fp0_operand" "fG,0")
-        (match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
+  "TARGET_FP"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
                          (match_operand:DF 2 "fp0_operand" "G,G")])
         (match_operand:SF 1 "reg_or_fp0_operand" "fG,0")
         (match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
+  "TARGET_FP"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
                          (match_operand:DF 2 "fp0_operand" "G,G")])
         (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG,0"))
         (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
+  "TARGET_FP"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
                          (match_operand:DF 2 "fp0_operand" "G,G")])
         (match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
         (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
+  "TARGET_FP"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
                          (match_operand:DF 2 "fp0_operand" "G,G")])
         (match_operand:SF 1 "reg_or_fp0_operand" "fG,0")
         (match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
+  "TARGET_FP"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
                          (match_operand:DF 2 "fp0_operand" "G,G")])
         (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG,0"))
         (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
+  "TARGET_FP"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"