]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
i386.md (define_insn "*movoi_internal_avx"): Add evex version.
authorAlexander Ivchenko <alexander.ivchenko@intel.com>
Mon, 18 Aug 2014 10:50:35 +0000 (10:50 +0000)
committerKirill Yukhin <kyukhin@gcc.gnu.org>
Mon, 18 Aug 2014 10:50:35 +0000 (10:50 +0000)
gcc/
* config/i386/i386.md
(define_insn "*movoi_internal_avx"): Add evex version.
(define_insn "*movti_internal"): Ditto.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r214089

gcc/ChangeLog
gcc/config/i386/i386.md

index c2d64b20cfceee268cde59a727e8b272dc4e8309..687e4b64094a0b2c5a6729cdb9c42b5608ceaf7b 100644 (file)
@@ -1,3 +1,16 @@
+2014-08-18  Alexander Ivchenko  <alexander.ivchenko@intel.com>
+           Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
+           Anna Tikhonova  <anna.tikhonova@intel.com>
+           Ilya Tocar  <ilya.tocar@intel.com>
+           Andrey Turetskiy  <andrey.turetskiy@intel.com>
+           Ilya Verbin  <ilya.verbin@intel.com>
+           Kirill Yukhin  <kirill.yukhin@intel.com>
+           Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
+
+       * config/i386/i386.md
+       (define_insn "*movoi_internal_avx"): Add evex version.
+       (define_insn "*movti_internal"): Ditto.
+
 2014-08-18  Alexander Ivchenko  <alexander.ivchenko@intel.com>
            Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
            Anna Tikhonova  <anna.tikhonova@intel.com>
index 3a797c84b49ad37a944569f2bbb1afbecf0a56c9..39fb23079e1b8a9db4760833a273274ae2d2d6c9 100644 (file)
    (set_attr "mode" "XI")])
 
 (define_insn "*movoi_internal_avx"
-  [(set (match_operand:OI 0 "nonimmediate_operand" "=x,x ,m")
-       (match_operand:OI 1 "vector_move_operand"  "C ,xm,x"))]
+  [(set (match_operand:OI 0 "nonimmediate_operand" "=v,v ,m")
+       (match_operand:OI 1 "vector_move_operand"  "C ,vm,v"))]
   "TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   switch (get_attr_type (insn))
        {
          if (get_attr_mode (insn) == MODE_V8SF)
            return "vmovups\t{%1, %0|%0, %1}";
+         else if (get_attr_mode (insn) == MODE_XI)
+           return "vmovdqu32\t{%1, %0|%0, %1}";
          else
            return "vmovdqu\t{%1, %0|%0, %1}";
        }
        {
          if (get_attr_mode (insn) == MODE_V8SF)
            return "vmovaps\t{%1, %0|%0, %1}";
+         else if (get_attr_mode (insn) == MODE_XI)
+           return "vmovdqa32\t{%1, %0|%0, %1}";
          else
            return "vmovdqa\t{%1, %0|%0, %1}";
        }
   [(set_attr "type" "sselog1,ssemov,ssemov")
    (set_attr "prefix" "vex")
    (set (attr "mode")
-       (cond [(match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
+       (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+                   (match_operand 1 "ext_sse_reg_operand"))
+                (const_string "XI")
+              (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL")
                 (const_string "V8SF")
               (and (eq_attr "alternative" "2")
                    (match_test "TARGET_SSE_TYPELESS_STORES"))
              (const_string "OI")))])
 
 (define_insn "*movti_internal"
-  [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o ,x,x ,m")
-       (match_operand:TI 1 "general_operand"      "riFo,re,C,xm,x"))]
+  [(set (match_operand:TI 0 "nonimmediate_operand" "=!r ,o ,v,v ,m")
+       (match_operand:TI 1 "general_operand"      "riFo,re,C,vm,v"))]
   "(TARGET_64BIT || TARGET_SSE)
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
        {
          if (get_attr_mode (insn) == MODE_V4SF)
            return "%vmovups\t{%1, %0|%0, %1}";
+         else if (get_attr_mode (insn) == MODE_XI)
+           return "vmovdqu32\t{%1, %0|%0, %1}";
          else
            return "%vmovdqu\t{%1, %0|%0, %1}";
        }
        {
          if (get_attr_mode (insn) == MODE_V4SF)
            return "%vmovaps\t{%1, %0|%0, %1}";
+         else if (get_attr_mode (insn) == MODE_XI)
+           return "vmovdqa32\t{%1, %0|%0, %1}";
          else
            return "%vmovdqa\t{%1, %0|%0, %1}";
        }
        (const_string "maybe_vex")
        (const_string "orig")))
    (set (attr "mode")
-       (cond [(eq_attr "alternative" "0,1")
+       (cond [(ior (match_operand 0 "ext_sse_reg_operand")
+                   (match_operand 1 "ext_sse_reg_operand"))
+                (const_string "XI")
+              (eq_attr "alternative" "0,1")
                 (const_string "DI")
               (ior (not (match_test "TARGET_SSE2"))
                    (match_test "TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL"))