The Power ISA 2.07 document includes a correction to the description for the

behavior of the xscvspdp instruction, indicating that if the source argument
is a SNaN, it is first changed to a QNaN before being converted from
single-precision to double-precision. This updated information about the
xscvspdp instruction exposed a bug in the VEX implementation for that
instruction and also a bug in the testing for all instructions having
special behavior for single-precision SNaN arguments.

The VEX code fix for this issue is r2760.

This patch fixes the test cases for the ISA 2.07.

Testing bug: In several ppc[64] test cases, an array of special
double-precision floating point values is set up, and then all elements of
that array are copied via assignment to a single-precision array ('float'
type). Assignment from a double to a float works fine for all cases, except for
SNaN values. In the case of a SNaN, the source is changed to a QNaN and then
converted to single-precision. So the end result was that our array of floats
did not have an actual SNaN value, and, therefore, any instructions that had
special behavior for a single-precision SNaN input argument was never being
properly tested. This patch makes some functional changes in the following
testcases:

  none/tests/ppc[32|64]/test_isa_2_06_part2.c
  none/tests/ppc[32|64]/test_isa_2_06_part3.c
  none/tests/ppc[32|64]/test_isa_2_07_part2.c

These changes impacted the associated *.stdout.exp files, so the patch also
updates those files. Additionally, there were several errors in testcase
source comments that misidentified QNaN and SNaN bit patterns which this patch
corrects.

See bugzilla 324816.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@13544

diff --git a/none/tests/ppc32/test_isa_2_06_part1.c b/none/tests/ppc32/test_isa_2_06_part1.c
index 25dcc2ec9be427abdd7e156ad96d80a6f835cd0e..db28aa1a7ccaba492d88b38df3c270d51b18ead2 100644 (file)
--- a/none/tests/ppc32/test_isa_2_06_part1.c
+++ b/none/tests/ppc32/test_isa_2_06_part1.c
@@ -124,10 +124,10 @@ static void build_fargs_table(void)
  * -0.0      : 1 0x000 0x0000000000000 => 0x8000000000000000
  * +infinity : 0 0x7FF 0x0000000000000 => 0x7FF0000000000000
  * -infinity : 1 0x7FF 0x0000000000000 => 0xFFF0000000000000
- * +QNaN     : 0 0x7FF 0x7FFFFFFFFFFFF => 0x7FF7FFFFFFFFFFFF
- * -QNaN     : 1 0x7FF 0x7FFFFFFFFFFFF => 0xFFF7FFFFFFFFFFFF
- * +SNaN     : 0 0x7FF 0x8000000000000 => 0x7FF8000000000000
- * -SNaN     : 1 0x7FF 0x8000000000000 => 0xFFF8000000000000
+ * +QNaN     : 0 0x7FF 0x8000000000000 => 0x7FF8000000000000
+ * -QNaN     : 1 0x7FF 0x8000000000000 => 0xFFF8000000000000
+ * +SNaN     : 0 0x7FF 0x7FFFFFFFFFFFF => 0x7FF7FFFFFFFFFFFF
+ * -SNaN     : 1 0x7FF 0x7FFFFFFFFFFFF => 0xFFF7FFFFFFFFFFFF
  * (8 values)
  *
  * Single precision
@@ -138,10 +138,10 @@ static void build_fargs_table(void)
  * -0.0      : 1 0x00 0x000000 => 0x80000000
  * +infinity : 0 0xFF 0x000000 => 0x7F800000
  * -infinity : 1 0xFF 0x000000 => 0xFF800000
- * +QNaN     : 0 0xFF 0x3FFFFF => 0x7FBFFFFF
- * -QNaN     : 1 0xFF 0x3FFFFF => 0xFFBFFFFF
- * +SNaN     : 0 0xFF 0x400000 => 0x7FC00000
- * -SNaN     : 1 0xFF 0x400000 => 0xFFC00000
+ * +QNaN     : 0 0xFF 0x400000 => 0x7FC00000
+ * -QNaN     : 1 0xFF 0x400000 => 0xFFC00000
+ * +SNaN     : 0 0xFF 0x3FFFFF => 0x7FBFFFFF
+ * -SNaN     : 1 0xFF 0x3FFFFF => 0xFFBFFFFF
 */
 {
    uint64_t mant;
@@ -836,10 +836,10 @@ static void build_special_fargs_table(void)
    6      1   000   0x0000000000000ULL         -0.0 (-zero)
    7      0   7ff   0x0000000000000ULL         +infinity
    8      1   7ff   0x0000000000000ULL         -infinity
-   9      0   7ff   0x7FFFFFFFFFFFFULL         +QNaN
-   10     1   7ff   0x7FFFFFFFFFFFFULL         -QNaN
-   11     0   7ff   0x8000000000000ULL         +SNaN
-   12     1   7ff   0x8000000000000ULL         -SNaN
+   9      0   7ff   0x7FFFFFFFFFFFFULL         +SNaN
+   10     1   7ff   0x7FFFFFFFFFFFFULL         -SNaN
+   11     0   7ff   0x8000000000000ULL         +QNaN
+   12     1   7ff   0x8000000000000ULL         -QNaN
    13     1   000   0x8340000078000ULL         Denormalized val (zero exp and non-zero fraction)
    14     1   40d   0x0650f5a07b353ULL         Negative finite number
     */
@@ -1011,28 +1011,28 @@ static void build_special_fargs_table(void)
    mant = 0x0000000000000ULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
 
-   /* +QNaN     : 0 0x7FF 0x7FFFFFFFFFFFF */
+   /* +SNaN     : 0 0x7FF 0x7FFFFFFFFFFFF */
    // #9
    s = 0;
    _exp = 0x7FF;
    mant = 0x7FFFFFFFFFFFFULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
 
-   /* -QNaN     : 1 0x7FF 0x7FFFFFFFFFFFF */
+   /* -SNaN     : 1 0x7FF 0x7FFFFFFFFFFFF */
    // #10
    s = 1;
    _exp = 0x7FF;
    mant = 0x7FFFFFFFFFFFFULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
 
-   /* +SNaN     : 0 0x7FF 0x8000000000000 */
+   /* +QNaN     : 0 0x7FF 0x8000000000000 */
    // #11
    s = 0;
    _exp = 0x7FF;
    mant = 0x8000000000000ULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
 
-   /* -SNaN     : 1 0x7FF 0x8000000000000 */
+   /* -QNaN     : 1 0x7FF 0x8000000000000 */
    // #12
    s = 1;
    _exp = 0x7FF;

diff --git a/none/tests/ppc32/test_isa_2_06_part2.c b/none/tests/ppc32/test_isa_2_06_part2.c
index d9f2453773cbd981a074adf34bc43e2912f443bf..bb3ec087adcf206842d7ba4ca3de3cc52f231988 100644 (file)
--- a/none/tests/ppc32/test_isa_2_06_part2.c
+++ b/none/tests/ppc32/test_isa_2_06_part2.c
@@ -107,6 +107,13 @@ static inline void register_farg (void *farg,
               s, _exp, mant, *(uint64_t *)farg, *(double *)farg);
 }
 
+static inline void register_sp_farg (void *farg,
+                                     int s, uint16_t _exp, uint32_t mant)
+{
+   uint32_t tmp;
+   tmp = ((uint32_t)s << 31) | ((uint32_t)_exp << 23) | mant;
+   *(uint32_t *)farg = tmp;
+}
 
 typedef struct fp_test_args {
    int fra_idx;
@@ -278,6 +285,7 @@ static void build_special_fargs_table(void)
 */
 
    uint64_t mant;
+   uint32_t mant_sp;
    uint16_t _exp;
    int s;
    int j, i = 0;
@@ -445,28 +453,42 @@ static void build_special_fargs_table(void)
    mant = 0x0000000000000ULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
 
-   /* +QNaN     : 0 0x7FF 0x7FFFFFFFFFFFF */
+   /*
+    * This comment applies to values #9 and #10 below:
+    * When src is a SNaN, it's converted to a QNaN first before rounding to single-precision,
+    * so we can't just copy the double-precision value to the corresponding slot in the
+    * single-precision array (i.e., in the loop at the end of this function).  Instead, we
+    * have to manually set the bits using register_sp_farg().
+    */
+
+   /* +SNaN     : 0 0x7FF 0x7FFFFFFFFFFFF */
    // #9
    s = 0;
    _exp = 0x7FF;
    mant = 0x7FFFFFFFFFFFFULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
+   _exp = 0xff;
+   mant_sp = 0x3FFFFF;
+   register_sp_farg(&spec_sp_fargs[i-1], s, _exp, mant_sp);
 
-   /* -QNaN     : 1 0x7FF 0x7FFFFFFFFFFFF */
+   /* -SNaN     : 1 0x7FF 0x7FFFFFFFFFFFF */
    // #10
    s = 1;
    _exp = 0x7FF;
    mant = 0x7FFFFFFFFFFFFULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
+   _exp = 0xff;
+   mant_sp = 0x3FFFFF;
+   register_sp_farg(&spec_sp_fargs[i-1], s, _exp, mant_sp);
 
-   /* +SNaN     : 0 0x7FF 0x8000000000000 */
+   /* +QNaN     : 0 0x7FF 0x8000000000000 */
    // #11
    s = 0;
    _exp = 0x7FF;
    mant = 0x8000000000000ULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
 
-   /* -SNaN     : 1 0x7FF 0x8000000000000 */
+   /* -QNaN     : 1 0x7FF 0x8000000000000 */
    // #12
    s = 1;
    _exp = 0x7FF;
@@ -502,7 +524,8 @@ static void build_special_fargs_table(void)
 
    nb_special_fargs = i;
    for (j = 0; j < i; j++) {
-      spec_sp_fargs[j] = spec_fargs[j];
+      if (!(j == 9 || j == 10))
+         spec_sp_fargs[j] = spec_fargs[j];
    }
 }
 

diff --git a/none/tests/ppc32/test_isa_2_06_part2.stdout.exp b/none/tests/ppc32/test_isa_2_06_part2.stdout.exp
index 92bbbf262c8c60b0edf62548656febc2d71aed2d..4da1afacb60f11e5a7b7d94917f35fbda1483e7e 100644 (file)
--- a/none/tests/ppc32/test_isa_2_06_part2.stdout.exp
+++ b/none/tests/ppc32/test_isa_2_06_part2.stdout.exp
@@ -1,7 +1,7 @@
 Test VSX vector single arg instructions
 #0: xvresp 1/x(3ec00000) ==> PASS; 1/x(42780000) ==> PASS; 1/x(00000000) ==> PASS; 1/x(7f800000) ==> PASS
 #1: xvresp 1/x(00000000) ==> PASS; 1/x(00000000) ==> PASS; 1/x(80000000) ==> PASS; 1/x(7f800000) ==> PASS
-#2: xvresp 1/x(ff800000) ==> PASS; 1/x(7fffffff) ==> PASS; 1/x(ffffffff) ==> PASS; 1/x(7fc00000) ==> PASS
+#2: xvresp 1/x(ff800000) ==> PASS; 1/x(7fbfffff) ==> PASS; 1/x(ffbfffff) ==> PASS; 1/x(7fc00000) ==> PASS
 #3: xvresp 1/x(ffc00000) ==> PASS; 1/x(80000000) ==> PASS; 1/x(c683287b) ==> PASS; 1/x(49192c2d) ==> PASS
 
 #0: xvcvdpsxws conv(3fd8000000000000) = 0000000000000000; conv(404f000000000000) = 000000000000003e
@@ -15,7 +15,7 @@ Test VSX vector single arg instructions
 
 #0: xvcvspsxws conv(3ec00000) = 00000000; conv(42780000) = 0000003e; conv(00000000) = 00000000; conv(7f800000) = 7fffffff
 #1: xvcvspsxws conv(00000000) = 00000000; conv(00000000) = 00000000; conv(80000000) = 00000000; conv(7f800000) = 7fffffff
-#2: xvcvspsxws conv(ff800000) = 80000000; conv(7fffffff) = 80000000; conv(ffffffff) = 80000000; conv(7fc00000) = 80000000
+#2: xvcvspsxws conv(ff800000) = 80000000; conv(7fbfffff) = 80000000; conv(ffbfffff) = 80000000; conv(7fc00000) = 80000000
 #3: xvcvspsxws conv(ffc00000) = 80000000; conv(80000000) = 00000000; conv(c683287b) = ffffbe6c; conv(49192c2d) = 000992c2
 
 Test VSX floating point compare and basic arithmetic instructions
@@ -221,106 +221,106 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvcmpeqsp ff800000 eq ff800000 AND ff800000 eq c683287b AND ff800000 eq 80000000 AND ff800000 eq 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#1: xvcmpeqsp ff800000 eq 00000000 AND ff800000 eq 7f800000 AND ff800000 eq 7fffffff AND ff800000 eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#1: xvcmpeqsp ff800000 eq 00000000 AND ff800000 eq 7f800000 AND ff800000 eq 7fbfffff AND ff800000 eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #2: xvcmpeqsp c683287b eq ff800000 AND c683287b eq c683287b AND c683287b eq 80000000 AND c683287b eq 00000000 ? cc=0 => 00000000 ffffffff 00000000 00000000
-#3: xvcmpeqsp c683287b eq 00000000 AND c683287b eq 7f800000 AND c683287b eq 7fffffff AND c683287b eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#3: xvcmpeqsp c683287b eq 00000000 AND c683287b eq 7f800000 AND c683287b eq 7fbfffff AND c683287b eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #4: xvcmpeqsp 80000000 eq ff800000 AND 80000000 eq c683287b AND 80000000 eq 80000000 AND 80000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#5: xvcmpeqsp 80000000 eq 00000000 AND 80000000 eq 7f800000 AND 80000000 eq 7fffffff AND 80000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#5: xvcmpeqsp 80000000 eq 00000000 AND 80000000 eq 7f800000 AND 80000000 eq 7fbfffff AND 80000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #6: xvcmpeqsp 00000000 eq ff800000 AND 00000000 eq c683287b AND 00000000 eq 80000000 AND 00000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#7: xvcmpeqsp 00000000 eq 00000000 AND 00000000 eq 7f800000 AND 00000000 eq 7fffffff AND 00000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#7: xvcmpeqsp 00000000 eq 00000000 AND 00000000 eq 7f800000 AND 00000000 eq 7fbfffff AND 00000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #8: xvcmpeqsp 00000000 eq ff800000 AND 00000000 eq c683287b AND 00000000 eq 80000000 AND 00000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#9: xvcmpeqsp 00000000 eq 42780000 AND 00000000 eq 7f800000 AND 00000000 eq 7fffffff AND 00000000 eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#9: xvcmpeqsp 00000000 eq 42780000 AND 00000000 eq 7f800000 AND 00000000 eq 7fbfffff AND 00000000 eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #10: xvcmpeqsp 7f800000 eq ff800000 AND 7f800000 eq c683287b AND 7f800000 eq 80000000 AND 7f800000 eq 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
-#11: xvcmpeqsp 7f800000 eq 00000000 AND 7f800000 eq 7f800000 AND 7f800000 eq 7fffffff AND 7f800000 eq 7fc00000 ? cc=0 => 00000000 ffffffff 00000000 00000000
-#12: xvcmpeqsp ffffffff eq ff800000 AND ffffffff eq c683287b AND ffffffff eq 80000000 AND ffffffff eq 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
-#13: xvcmpeqsp ffffffff eq 00000000 AND ffffffff eq 7f800000 AND ffffffff eq 7fffffff AND ffffffff eq ffffffff ? cc=0 => 00000000 00000000 00000000 00000000
+#11: xvcmpeqsp 7f800000 eq 00000000 AND 7f800000 eq 7f800000 AND 7f800000 eq 7fbfffff AND 7f800000 eq 7fc00000 ? cc=0 => 00000000 ffffffff 00000000 00000000
+#12: xvcmpeqsp ffbfffff eq ff800000 AND ffbfffff eq c683287b AND ffbfffff eq 80000000 AND ffbfffff eq 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
+#13: xvcmpeqsp ffbfffff eq 00000000 AND ffbfffff eq 7f800000 AND ffbfffff eq 7fbfffff AND ffbfffff eq ffbfffff ? cc=0 => 00000000 00000000 00000000 00000000
 #14: xvcmpeqsp ffc00000 eq ff800000 AND ffc00000 eq c683287b AND ffc00000 eq 80000000 AND ffc00000 eq 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
 #15: xvcmpeqsp 42780000 eq 42780000 AND 00000000 eq 00000000 AND 7f800000 eq 7f800000 AND 00000000 eq 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
 
 #0: xvcmpeqsp. ff800000 eq ff800000 AND ff800000 eq c683287b AND ff800000 eq 80000000 AND ff800000 eq 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#1: xvcmpeqsp. ff800000 eq 00000000 AND ff800000 eq 7f800000 AND ff800000 eq 7fffffff AND ff800000 eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#1: xvcmpeqsp. ff800000 eq 00000000 AND ff800000 eq 7f800000 AND ff800000 eq 7fbfffff AND ff800000 eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #2: xvcmpeqsp. c683287b eq ff800000 AND c683287b eq c683287b AND c683287b eq 80000000 AND c683287b eq 00000000 ? cc=0 => 00000000 ffffffff 00000000 00000000
-#3: xvcmpeqsp. c683287b eq 00000000 AND c683287b eq 7f800000 AND c683287b eq 7fffffff AND c683287b eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#3: xvcmpeqsp. c683287b eq 00000000 AND c683287b eq 7f800000 AND c683287b eq 7fbfffff AND c683287b eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #4: xvcmpeqsp. 80000000 eq ff800000 AND 80000000 eq c683287b AND 80000000 eq 80000000 AND 80000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#5: xvcmpeqsp. 80000000 eq 00000000 AND 80000000 eq 7f800000 AND 80000000 eq 7fffffff AND 80000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#5: xvcmpeqsp. 80000000 eq 00000000 AND 80000000 eq 7f800000 AND 80000000 eq 7fbfffff AND 80000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #6: xvcmpeqsp. 00000000 eq ff800000 AND 00000000 eq c683287b AND 00000000 eq 80000000 AND 00000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#7: xvcmpeqsp. 00000000 eq 00000000 AND 00000000 eq 7f800000 AND 00000000 eq 7fffffff AND 00000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#7: xvcmpeqsp. 00000000 eq 00000000 AND 00000000 eq 7f800000 AND 00000000 eq 7fbfffff AND 00000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #8: xvcmpeqsp. 00000000 eq ff800000 AND 00000000 eq c683287b AND 00000000 eq 80000000 AND 00000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#9: xvcmpeqsp. 00000000 eq 42780000 AND 00000000 eq 7f800000 AND 00000000 eq 7fffffff AND 00000000 eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#9: xvcmpeqsp. 00000000 eq 42780000 AND 00000000 eq 7f800000 AND 00000000 eq 7fbfffff AND 00000000 eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #10: xvcmpeqsp. 7f800000 eq ff800000 AND 7f800000 eq c683287b AND 7f800000 eq 80000000 AND 7f800000 eq 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
-#11: xvcmpeqsp. 7f800000 eq 00000000 AND 7f800000 eq 7f800000 AND 7f800000 eq 7fffffff AND 7f800000 eq 7fc00000 ? cc=0 => 00000000 ffffffff 00000000 00000000
-#12: xvcmpeqsp. ffffffff eq ff800000 AND ffffffff eq c683287b AND ffffffff eq 80000000 AND ffffffff eq 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
-#13: xvcmpeqsp. ffffffff eq 00000000 AND ffffffff eq 7f800000 AND ffffffff eq 7fffffff AND ffffffff eq ffffffff ? cc=2 => 00000000 00000000 00000000 00000000
+#11: xvcmpeqsp. 7f800000 eq 00000000 AND 7f800000 eq 7f800000 AND 7f800000 eq 7fbfffff AND 7f800000 eq 7fc00000 ? cc=0 => 00000000 ffffffff 00000000 00000000
+#12: xvcmpeqsp. ffbfffff eq ff800000 AND ffbfffff eq c683287b AND ffbfffff eq 80000000 AND ffbfffff eq 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
+#13: xvcmpeqsp. ffbfffff eq 00000000 AND ffbfffff eq 7f800000 AND ffbfffff eq 7fbfffff AND ffbfffff eq ffbfffff ? cc=2 => 00000000 00000000 00000000 00000000
 #14: xvcmpeqsp. ffc00000 eq ff800000 AND ffc00000 eq c683287b AND ffc00000 eq 80000000 AND ffc00000 eq 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
 #15: xvcmpeqsp. 42780000 eq 42780000 AND 00000000 eq 00000000 AND 7f800000 eq 7f800000 AND 00000000 eq 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
 
 
 #0: xvcmpgesp ff800000 ge ff800000 AND ff800000 ge c683287b AND ff800000 ge 80000000 AND ff800000 ge 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#1: xvcmpgesp ff800000 ge 00000000 AND ff800000 ge 7f800000 AND ff800000 ge 7fffffff AND ff800000 ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#1: xvcmpgesp ff800000 ge 00000000 AND ff800000 ge 7f800000 AND ff800000 ge 7fbfffff AND ff800000 ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #2: xvcmpgesp c683287b ge ff800000 AND c683287b ge c683287b AND c683287b ge 80000000 AND c683287b ge 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#3: xvcmpgesp c683287b ge 00000000 AND c683287b ge 7f800000 AND c683287b ge 7fffffff AND c683287b ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#3: xvcmpgesp c683287b ge 00000000 AND c683287b ge 7f800000 AND c683287b ge 7fbfffff AND c683287b ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #4: xvcmpgesp 80000000 ge ff800000 AND 80000000 ge c683287b AND 80000000 ge 80000000 AND 80000000 ge 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
-#5: xvcmpgesp 80000000 ge 00000000 AND 80000000 ge 7f800000 AND 80000000 ge 7fffffff AND 80000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#5: xvcmpgesp 80000000 ge 00000000 AND 80000000 ge 7f800000 AND 80000000 ge 7fbfffff AND 80000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #6: xvcmpgesp 00000000 ge ff800000 AND 00000000 ge c683287b AND 00000000 ge 80000000 AND 00000000 ge 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
-#7: xvcmpgesp 00000000 ge 00000000 AND 00000000 ge 7f800000 AND 00000000 ge 7fffffff AND 00000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#7: xvcmpgesp 00000000 ge 00000000 AND 00000000 ge 7f800000 AND 00000000 ge 7fbfffff AND 00000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #8: xvcmpgesp 00000000 ge ff800000 AND 00000000 ge c683287b AND 00000000 ge 80000000 AND 00000000 ge 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
-#9: xvcmpgesp 00000000 ge 42780000 AND 00000000 ge 7f800000 AND 00000000 ge 7fffffff AND 00000000 ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#9: xvcmpgesp 00000000 ge 42780000 AND 00000000 ge 7f800000 AND 00000000 ge 7fbfffff AND 00000000 ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #10: xvcmpgesp 7f800000 ge ff800000 AND 7f800000 ge c683287b AND 7f800000 ge 80000000 AND 7f800000 ge 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
-#11: xvcmpgesp 7f800000 ge 00000000 AND 7f800000 ge 7f800000 AND 7f800000 ge 7fffffff AND 7f800000 ge 7fc00000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#12: xvcmpgesp ffffffff ge ff800000 AND ffffffff ge c683287b AND ffffffff ge 80000000 AND ffffffff ge 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
-#13: xvcmpgesp ffffffff ge 00000000 AND ffffffff ge 7f800000 AND ffffffff ge 7fffffff AND ffffffff ge ffffffff ? cc=0 => 00000000 00000000 00000000 00000000
+#11: xvcmpgesp 7f800000 ge 00000000 AND 7f800000 ge 7f800000 AND 7f800000 ge 7fbfffff AND 7f800000 ge 7fc00000 ? cc=0 => ffffffff ffffffff 00000000 00000000
+#12: xvcmpgesp ffbfffff ge ff800000 AND ffbfffff ge c683287b AND ffbfffff ge 80000000 AND ffbfffff ge 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
+#13: xvcmpgesp ffbfffff ge 00000000 AND ffbfffff ge 7f800000 AND ffbfffff ge 7fbfffff AND ffbfffff ge ffbfffff ? cc=0 => 00000000 00000000 00000000 00000000
 #14: xvcmpgesp ffc00000 ge ff800000 AND ffc00000 ge c683287b AND ffc00000 ge 80000000 AND ffc00000 ge 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
 #15: xvcmpgesp 42780000 ge 42780000 AND 00000000 ge 00000000 AND 7f800000 ge 7f800000 AND 00000000 ge 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
 
 #0: xvcmpgesp. ff800000 ge ff800000 AND ff800000 ge c683287b AND ff800000 ge 80000000 AND ff800000 ge 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#1: xvcmpgesp. ff800000 ge 00000000 AND ff800000 ge 7f800000 AND ff800000 ge 7fffffff AND ff800000 ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#1: xvcmpgesp. ff800000 ge 00000000 AND ff800000 ge 7f800000 AND ff800000 ge 7fbfffff AND ff800000 ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #2: xvcmpgesp. c683287b ge ff800000 AND c683287b ge c683287b AND c683287b ge 80000000 AND c683287b ge 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#3: xvcmpgesp. c683287b ge 00000000 AND c683287b ge 7f800000 AND c683287b ge 7fffffff AND c683287b ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#3: xvcmpgesp. c683287b ge 00000000 AND c683287b ge 7f800000 AND c683287b ge 7fbfffff AND c683287b ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #4: xvcmpgesp. 80000000 ge ff800000 AND 80000000 ge c683287b AND 80000000 ge 80000000 AND 80000000 ge 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
-#5: xvcmpgesp. 80000000 ge 00000000 AND 80000000 ge 7f800000 AND 80000000 ge 7fffffff AND 80000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#5: xvcmpgesp. 80000000 ge 00000000 AND 80000000 ge 7f800000 AND 80000000 ge 7fbfffff AND 80000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #6: xvcmpgesp. 00000000 ge ff800000 AND 00000000 ge c683287b AND 00000000 ge 80000000 AND 00000000 ge 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
-#7: xvcmpgesp. 00000000 ge 00000000 AND 00000000 ge 7f800000 AND 00000000 ge 7fffffff AND 00000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#7: xvcmpgesp. 00000000 ge 00000000 AND 00000000 ge 7f800000 AND 00000000 ge 7fbfffff AND 00000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #8: xvcmpgesp. 00000000 ge ff800000 AND 00000000 ge c683287b AND 00000000 ge 80000000 AND 00000000 ge 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
-#9: xvcmpgesp. 00000000 ge 42780000 AND 00000000 ge 7f800000 AND 00000000 ge 7fffffff AND 00000000 ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#9: xvcmpgesp. 00000000 ge 42780000 AND 00000000 ge 7f800000 AND 00000000 ge 7fbfffff AND 00000000 ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #10: xvcmpgesp. 7f800000 ge ff800000 AND 7f800000 ge c683287b AND 7f800000 ge 80000000 AND 7f800000 ge 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
-#11: xvcmpgesp. 7f800000 ge 00000000 AND 7f800000 ge 7f800000 AND 7f800000 ge 7fffffff AND 7f800000 ge 7fc00000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#12: xvcmpgesp. ffffffff ge ff800000 AND ffffffff ge c683287b AND ffffffff ge 80000000 AND ffffffff ge 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
-#13: xvcmpgesp. ffffffff ge 00000000 AND ffffffff ge 7f800000 AND ffffffff ge 7fffffff AND ffffffff ge ffffffff ? cc=2 => 00000000 00000000 00000000 00000000
+#11: xvcmpgesp. 7f800000 ge 00000000 AND 7f800000 ge 7f800000 AND 7f800000 ge 7fbfffff AND 7f800000 ge 7fc00000 ? cc=0 => ffffffff ffffffff 00000000 00000000
+#12: xvcmpgesp. ffbfffff ge ff800000 AND ffbfffff ge c683287b AND ffbfffff ge 80000000 AND ffbfffff ge 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
+#13: xvcmpgesp. ffbfffff ge 00000000 AND ffbfffff ge 7f800000 AND ffbfffff ge 7fbfffff AND ffbfffff ge ffbfffff ? cc=2 => 00000000 00000000 00000000 00000000
 #14: xvcmpgesp. ffc00000 ge ff800000 AND ffc00000 ge c683287b AND ffc00000 ge 80000000 AND ffc00000 ge 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
 #15: xvcmpgesp. 42780000 ge 42780000 AND 00000000 ge 00000000 AND 7f800000 ge 7f800000 AND 00000000 ge 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
 
 
 #0: xvcmpgtsp ff800000 gt ff800000 AND ff800000 gt c683287b AND ff800000 gt 80000000 AND ff800000 gt 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
-#1: xvcmpgtsp ff800000 gt 00000000 AND ff800000 gt 7f800000 AND ff800000 gt 7fffffff AND ff800000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#1: xvcmpgtsp ff800000 gt 00000000 AND ff800000 gt 7f800000 AND ff800000 gt 7fbfffff AND ff800000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #2: xvcmpgtsp c683287b gt ff800000 AND c683287b gt c683287b AND c683287b gt 80000000 AND c683287b gt 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#3: xvcmpgtsp c683287b gt 00000000 AND c683287b gt 7f800000 AND c683287b gt 7fffffff AND c683287b gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#3: xvcmpgtsp c683287b gt 00000000 AND c683287b gt 7f800000 AND c683287b gt 7fbfffff AND c683287b gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #4: xvcmpgtsp 80000000 gt ff800000 AND 80000000 gt c683287b AND 80000000 gt 80000000 AND 80000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#5: xvcmpgtsp 80000000 gt 00000000 AND 80000000 gt 7f800000 AND 80000000 gt 7fffffff AND 80000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#5: xvcmpgtsp 80000000 gt 00000000 AND 80000000 gt 7f800000 AND 80000000 gt 7fbfffff AND 80000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #6: xvcmpgtsp 00000000 gt ff800000 AND 00000000 gt c683287b AND 00000000 gt 80000000 AND 00000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#7: xvcmpgtsp 00000000 gt 00000000 AND 00000000 gt 7f800000 AND 00000000 gt 7fffffff AND 00000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#7: xvcmpgtsp 00000000 gt 00000000 AND 00000000 gt 7f800000 AND 00000000 gt 7fbfffff AND 00000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #8: xvcmpgtsp 00000000 gt ff800000 AND 00000000 gt c683287b AND 00000000 gt 80000000 AND 00000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#9: xvcmpgtsp 00000000 gt 42780000 AND 00000000 gt 7f800000 AND 00000000 gt 7fffffff AND 00000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#9: xvcmpgtsp 00000000 gt 42780000 AND 00000000 gt 7f800000 AND 00000000 gt 7fbfffff AND 00000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #10: xvcmpgtsp 7f800000 gt ff800000 AND 7f800000 gt c683287b AND 7f800000 gt 80000000 AND 7f800000 gt 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
-#11: xvcmpgtsp 7f800000 gt 00000000 AND 7f800000 gt 7f800000 AND 7f800000 gt 7fffffff AND 7f800000 gt 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#12: xvcmpgtsp ffffffff gt ff800000 AND ffffffff gt c683287b AND ffffffff gt 80000000 AND ffffffff gt 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
-#13: xvcmpgtsp ffffffff gt 00000000 AND ffffffff gt 7f800000 AND ffffffff gt 7fffffff AND ffffffff gt ffffffff ? cc=0 => 00000000 00000000 00000000 00000000
+#11: xvcmpgtsp 7f800000 gt 00000000 AND 7f800000 gt 7f800000 AND 7f800000 gt 7fbfffff AND 7f800000 gt 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#12: xvcmpgtsp ffbfffff gt ff800000 AND ffbfffff gt c683287b AND ffbfffff gt 80000000 AND ffbfffff gt 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
+#13: xvcmpgtsp ffbfffff gt 00000000 AND ffbfffff gt 7f800000 AND ffbfffff gt 7fbfffff AND ffbfffff gt ffbfffff ? cc=0 => 00000000 00000000 00000000 00000000
 #14: xvcmpgtsp ffc00000 gt ff800000 AND ffc00000 gt c683287b AND ffc00000 gt 80000000 AND ffc00000 gt 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
 #15: xvcmpgtsp 42780000 gt 42780000 AND 00000000 gt 00000000 AND 7f800000 gt 7f800000 AND 00000000 gt 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
 
 #0: xvcmpgtsp. ff800000 gt ff800000 AND ff800000 gt c683287b AND ff800000 gt 80000000 AND ff800000 gt 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
-#1: xvcmpgtsp. ff800000 gt 00000000 AND ff800000 gt 7f800000 AND ff800000 gt 7fffffff AND ff800000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#1: xvcmpgtsp. ff800000 gt 00000000 AND ff800000 gt 7f800000 AND ff800000 gt 7fbfffff AND ff800000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #2: xvcmpgtsp. c683287b gt ff800000 AND c683287b gt c683287b AND c683287b gt 80000000 AND c683287b gt 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#3: xvcmpgtsp. c683287b gt 00000000 AND c683287b gt 7f800000 AND c683287b gt 7fffffff AND c683287b gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#3: xvcmpgtsp. c683287b gt 00000000 AND c683287b gt 7f800000 AND c683287b gt 7fbfffff AND c683287b gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #4: xvcmpgtsp. 80000000 gt ff800000 AND 80000000 gt c683287b AND 80000000 gt 80000000 AND 80000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#5: xvcmpgtsp. 80000000 gt 00000000 AND 80000000 gt 7f800000 AND 80000000 gt 7fffffff AND 80000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#5: xvcmpgtsp. 80000000 gt 00000000 AND 80000000 gt 7f800000 AND 80000000 gt 7fbfffff AND 80000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #6: xvcmpgtsp. 00000000 gt ff800000 AND 00000000 gt c683287b AND 00000000 gt 80000000 AND 00000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#7: xvcmpgtsp. 00000000 gt 00000000 AND 00000000 gt 7f800000 AND 00000000 gt 7fffffff AND 00000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#7: xvcmpgtsp. 00000000 gt 00000000 AND 00000000 gt 7f800000 AND 00000000 gt 7fbfffff AND 00000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #8: xvcmpgtsp. 00000000 gt ff800000 AND 00000000 gt c683287b AND 00000000 gt 80000000 AND 00000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#9: xvcmpgtsp. 00000000 gt 42780000 AND 00000000 gt 7f800000 AND 00000000 gt 7fffffff AND 00000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#9: xvcmpgtsp. 00000000 gt 42780000 AND 00000000 gt 7f800000 AND 00000000 gt 7fbfffff AND 00000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #10: xvcmpgtsp. 7f800000 gt ff800000 AND 7f800000 gt c683287b AND 7f800000 gt 80000000 AND 7f800000 gt 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
-#11: xvcmpgtsp. 7f800000 gt 00000000 AND 7f800000 gt 7f800000 AND 7f800000 gt 7fffffff AND 7f800000 gt 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#12: xvcmpgtsp. ffffffff gt ff800000 AND ffffffff gt c683287b AND ffffffff gt 80000000 AND ffffffff gt 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
-#13: xvcmpgtsp. ffffffff gt 00000000 AND ffffffff gt 7f800000 AND ffffffff gt 7fffffff AND ffffffff gt ffffffff ? cc=2 => 00000000 00000000 00000000 00000000
+#11: xvcmpgtsp. 7f800000 gt 00000000 AND 7f800000 gt 7f800000 AND 7f800000 gt 7fbfffff AND 7f800000 gt 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#12: xvcmpgtsp. ffbfffff gt ff800000 AND ffbfffff gt c683287b AND ffbfffff gt 80000000 AND ffbfffff gt 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
+#13: xvcmpgtsp. ffbfffff gt 00000000 AND ffbfffff gt 7f800000 AND ffbfffff gt 7fbfffff AND ffbfffff gt ffbfffff ? cc=2 => 00000000 00000000 00000000 00000000
 #14: xvcmpgtsp. ffc00000 gt ff800000 AND ffc00000 gt c683287b AND ffc00000 gt 80000000 AND ffc00000 gt 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
 #15: xvcmpgtsp. 42780000 gt 42780000 AND 00000000 gt 00000000 AND 7f800000 gt 7f800000 AND 00000000 gt 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
 
@@ -360,21 +360,21 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvaddsp ff800000 + ff800000 AND ff800000 + c683287b AND 49192c2d + 49c1288d AND ff800000 + 00000000 => ff800000 ff800000 4a06df52 ff800000
-#1: xvaddsp ff800000 + 00000000 AND ff800000 + 7f800000 AND ff800000 + 7fffffff AND ff800000 + 7fc00000 => ff800000 7fc00000 7fffffff 7fc00000
+#1: xvaddsp ff800000 + 00000000 AND ff800000 + 7f800000 AND ff800000 + 7fbfffff AND ff800000 + 7fc00000 => ff800000 7fc00000 7fffffff 7fc00000
 #2: xvaddsp c683287b + ff800000 AND c683287b + c683287b AND c683287b + 80000000 AND c683287b + 00000000 => ff800000 c703287b c683287b c683287b
-#3: xvaddsp c683287b + 00000000 AND c683287b + 7f800000 AND c683287b + 7fffffff AND c683287b + 7fc00000 => c683287b 7f800000 7fffffff 7fc00000
+#3: xvaddsp c683287b + 00000000 AND c683287b + 7f800000 AND c683287b + 7fbfffff AND c683287b + 7fc00000 => c683287b 7f800000 7fffffff 7fc00000
 #4: xvaddsp 80000000 + ff800000 AND 80000000 + c683287b AND 80000000 + 80000000 AND 80000000 + 00000000 => ff800000 c683287b 80000000 00000000
-#5: xvaddsp 80000000 + 00000000 AND 80000000 + 7f800000 AND 80000000 + 7fffffff AND 80000000 + 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
+#5: xvaddsp 80000000 + 00000000 AND 80000000 + 7f800000 AND 80000000 + 7fbfffff AND 80000000 + 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
 #6: xvaddsp 00000000 + ff800000 AND 00000000 + c683287b AND 00000000 + 80000000 AND 00000000 + 00000000 => ff800000 c683287b 00000000 00000000
-#7: xvaddsp 00000000 + 00000000 AND 00000000 + 7f800000 AND 00000000 + 7fffffff AND 00000000 + 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
+#7: xvaddsp 00000000 + 00000000 AND 00000000 + 7f800000 AND 00000000 + 7fbfffff AND 00000000 + 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
 #8: xvaddsp 00000000 + ff800000 AND 00000000 + c683287b AND 00000000 + 80000000 AND 00000000 + 00000000 => ff800000 c683287b 00000000 00000000
-#9: xvaddsp 00000000 + 42780000 AND 00000000 + 7f800000 AND 00000000 + 7fffffff AND 00000000 + 7fc00000 => 42780000 7f800000 7fffffff 7fc00000
+#9: xvaddsp 00000000 + 42780000 AND 00000000 + 7f800000 AND 00000000 + 7fbfffff AND 00000000 + 7fc00000 => 42780000 7f800000 7fffffff 7fc00000
 #10: xvaddsp 7f800000 + ff800000 AND 7f800000 + c683287b AND 7f800000 + 80000000 AND 7f800000 + 00000000 => 7fc00000 7f800000 7f800000 7f800000
-#11: xvaddsp 7f800000 + 00000000 AND 7f800000 + 7f800000 AND 7f800000 + 7fffffff AND 7f800000 + 7fc00000 => 7f800000 7f800000 7fffffff 7fc00000
-#12: xvaddsp ffffffff + ff800000 AND ffffffff + c683287b AND ffc00000 + 80000000 AND ffc00000 + 00000000 => ffffffff ffffffff ffc00000 ffc00000
-#13: xvaddsp ffffffff + 00000000 AND ffffffff + 7f800000 AND ffffffff + 7fffffff AND ffffffff + 7fc00000 => ffffffff ffffffff ffffffff ffffffff
+#11: xvaddsp 7f800000 + 00000000 AND 7f800000 + 7f800000 AND 7f800000 + 7fbfffff AND 7f800000 + 7fc00000 => 7f800000 7f800000 7fffffff 7fc00000
+#12: xvaddsp ffbfffff + ff800000 AND ffbfffff + c683287b AND ffc00000 + 80000000 AND ffc00000 + 00000000 => ffffffff ffffffff ffc00000 ffc00000
+#13: xvaddsp ffbfffff + 00000000 AND ffbfffff + 7f800000 AND ffbfffff + 7fbfffff AND ffbfffff + 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvaddsp ffc00000 + ff800000 AND ffc00000 + c683287b AND ffc00000 + 80000000 AND 49192c2d + 49c1288d => ffc00000 ffc00000 ffc00000 4a06df52
-#15: xvaddsp 49192c2d + 49c1288d AND 7fffffff + 7fc00000 AND 7fc00000 + 7fc00000 AND 7fc00000 + ffc00000 => 4a06df52 7fffffff 7fc00000 7fc00000
+#15: xvaddsp 49192c2d + 49c1288d AND 7fbfffff + 7fc00000 AND 7fc00000 + 7fc00000 AND 7fc00000 + ffc00000 => 4a06df52 7fffffff 7fc00000 7fc00000
 
 
 #0: xvdivdp fff0000000000000 / fff0000000000000 AND fff0000000000000 / c0d0650f5a07b353 => 7ff8000000000000 7ff0000000000000
@@ -412,21 +412,21 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvdivsp ff800000 / ff800000 AND ff800000 / c683287b AND 49192c2d / 49c1288d AND ff800000 / 00000000 => 7fc00000 7f800000 3ecb015a ff800000
-#1: xvdivsp ff800000 / 00000000 AND ff800000 / 7f800000 AND ff800000 / 7fffffff AND ff800000 / 7fc00000 => ff800000 7fc00000 7fffffff 7fc00000
+#1: xvdivsp ff800000 / 00000000 AND ff800000 / 7f800000 AND ff800000 / 7fbfffff AND ff800000 / 7fc00000 => ff800000 7fc00000 7fffffff 7fc00000
 #2: xvdivsp c683287b / ff800000 AND c683287b / c683287b AND c683287b / 80000000 AND c683287b / 00000000 => 00000000 3f800000 7f800000 ff800000
-#3: xvdivsp c683287b / 00000000 AND c683287b / 7f800000 AND c683287b / 7fffffff AND c683287b / 7fc00000 => ff800000 80000000 7fffffff 7fc00000
+#3: xvdivsp c683287b / 00000000 AND c683287b / 7f800000 AND c683287b / 7fbfffff AND c683287b / 7fc00000 => ff800000 80000000 7fffffff 7fc00000
 #4: xvdivsp 80000000 / ff800000 AND 80000000 / c683287b AND 80000000 / 80000000 AND 80000000 / 00000000 => 00000000 00000000 7fc00000 7fc00000
-#5: xvdivsp 80000000 / 00000000 AND 80000000 / 7f800000 AND 80000000 / 7fffffff AND 80000000 / 7fc00000 => 7fc00000 80000000 7fffffff 7fc00000
+#5: xvdivsp 80000000 / 00000000 AND 80000000 / 7f800000 AND 80000000 / 7fbfffff AND 80000000 / 7fc00000 => 7fc00000 80000000 7fffffff 7fc00000
 #6: xvdivsp 00000000 / ff800000 AND 00000000 / c683287b AND 00000000 / 80000000 AND 00000000 / 00000000 => 80000000 80000000 7fc00000 7fc00000
-#7: xvdivsp 00000000 / 00000000 AND 00000000 / 7f800000 AND 00000000 / 7fffffff AND 00000000 / 7fc00000 => 7fc00000 00000000 7fffffff 7fc00000
+#7: xvdivsp 00000000 / 00000000 AND 00000000 / 7f800000 AND 00000000 / 7fbfffff AND 00000000 / 7fc00000 => 7fc00000 00000000 7fffffff 7fc00000
 #8: xvdivsp 00000000 / ff800000 AND 00000000 / c683287b AND 00000000 / 80000000 AND 00000000 / 00000000 => 80000000 80000000 7fc00000 7fc00000
-#9: xvdivsp 00000000 / 42780000 AND 00000000 / 7f800000 AND 00000000 / 7fffffff AND 00000000 / 7fc00000 => 00000000 00000000 7fffffff 7fc00000
+#9: xvdivsp 00000000 / 42780000 AND 00000000 / 7f800000 AND 00000000 / 7fbfffff AND 00000000 / 7fc00000 => 00000000 00000000 7fffffff 7fc00000
 #10: xvdivsp 7f800000 / ff800000 AND 7f800000 / c683287b AND 7f800000 / 80000000 AND 7f800000 / 00000000 => 7fc00000 ff800000 ff800000 7f800000
-#11: xvdivsp 7f800000 / 00000000 AND 7f800000 / 7f800000 AND 7f800000 / 7fffffff AND 7f800000 / 7fc00000 => 7f800000 7fc00000 7fffffff 7fc00000
-#12: xvdivsp ffffffff / ff800000 AND ffffffff / c683287b AND ffc00000 / 80000000 AND ffc00000 / 00000000 => ffffffff ffffffff ffc00000 ffc00000
-#13: xvdivsp ffffffff / 00000000 AND ffffffff / 7f800000 AND ffffffff / 7fffffff AND ffffffff / 7fc00000 => ffffffff ffffffff ffffffff ffffffff
+#11: xvdivsp 7f800000 / 00000000 AND 7f800000 / 7f800000 AND 7f800000 / 7fbfffff AND 7f800000 / 7fc00000 => 7f800000 7fc00000 7fffffff 7fc00000
+#12: xvdivsp ffbfffff / ff800000 AND ffbfffff / c683287b AND ffc00000 / 80000000 AND ffc00000 / 00000000 => ffffffff ffffffff ffc00000 ffc00000
+#13: xvdivsp ffbfffff / 00000000 AND ffbfffff / 7f800000 AND ffbfffff / 7fbfffff AND ffbfffff / 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvdivsp ffc00000 / ff800000 AND ffc00000 / c683287b AND ffc00000 / 80000000 AND 49192c2d / 49c1288d => ffc00000 ffc00000 ffc00000 3ecb015a
-#15: xvdivsp 49192c2d / 49c1288d AND 7fffffff / 7fc00000 AND 7fc00000 / 7fc00000 AND 7fc00000 / ffc00000 => 3ecb015a 7fffffff 7fc00000 7fc00000
+#15: xvdivsp 49192c2d / 49c1288d AND 7fbfffff / 7fc00000 AND 7fc00000 / 7fc00000 AND 7fc00000 / ffc00000 => 3ecb015a 7fffffff 7fc00000 7fc00000
 
 
 #0: xvmuldp fff0000000000000 * fff0000000000000 AND fff0000000000000 * c0d0650f5a07b353 => 7ff0000000000000 7ff0000000000000
@@ -464,21 +464,21 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvmulsp ff800000 * ff800000 AND ff800000 * c683287b AND 49192c2d * 49c1288d AND ff800000 * 00000000 => 7f800000 7f800000 53672522 7fc00000
-#1: xvmulsp ff800000 * 00000000 AND ff800000 * 7f800000 AND ff800000 * 7fffffff AND ff800000 * 7fc00000 => 7fc00000 ff800000 7fffffff 7fc00000
+#1: xvmulsp ff800000 * 00000000 AND ff800000 * 7f800000 AND ff800000 * 7fbfffff AND ff800000 * 7fc00000 => 7fc00000 ff800000 7fffffff 7fc00000
 #2: xvmulsp c683287b * ff800000 AND c683287b * c683287b AND c683287b * 80000000 AND c683287b * 00000000 => 7f800000 4d8664e9 00000000 80000000
-#3: xvmulsp c683287b * 00000000 AND c683287b * 7f800000 AND c683287b * 7fffffff AND c683287b * 7fc00000 => 80000000 ff800000 7fffffff 7fc00000
+#3: xvmulsp c683287b * 00000000 AND c683287b * 7f800000 AND c683287b * 7fbfffff AND c683287b * 7fc00000 => 80000000 ff800000 7fffffff 7fc00000
 #4: xvmulsp 80000000 * ff800000 AND 80000000 * c683287b AND 80000000 * 80000000 AND 80000000 * 00000000 => 7fc00000 00000000 00000000 80000000
-#5: xvmulsp 80000000 * 00000000 AND 80000000 * 7f800000 AND 80000000 * 7fffffff AND 80000000 * 7fc00000 => 80000000 7fc00000 7fffffff 7fc00000
+#5: xvmulsp 80000000 * 00000000 AND 80000000 * 7f800000 AND 80000000 * 7fbfffff AND 80000000 * 7fc00000 => 80000000 7fc00000 7fffffff 7fc00000
 #6: xvmulsp 00000000 * ff800000 AND 00000000 * c683287b AND 00000000 * 80000000 AND 00000000 * 00000000 => 7fc00000 80000000 80000000 00000000
-#7: xvmulsp 00000000 * 00000000 AND 00000000 * 7f800000 AND 00000000 * 7fffffff AND 00000000 * 7fc00000 => 00000000 7fc00000 7fffffff 7fc00000
+#7: xvmulsp 00000000 * 00000000 AND 00000000 * 7f800000 AND 00000000 * 7fbfffff AND 00000000 * 7fc00000 => 00000000 7fc00000 7fffffff 7fc00000
 #8: xvmulsp 00000000 * ff800000 AND 00000000 * c683287b AND 00000000 * 80000000 AND 00000000 * 00000000 => 7fc00000 80000000 80000000 00000000
-#9: xvmulsp 00000000 * 42780000 AND 00000000 * 7f800000 AND 00000000 * 7fffffff AND 00000000 * 7fc00000 => 00000000 7fc00000 7fffffff 7fc00000
+#9: xvmulsp 00000000 * 42780000 AND 00000000 * 7f800000 AND 00000000 * 7fbfffff AND 00000000 * 7fc00000 => 00000000 7fc00000 7fffffff 7fc00000
 #10: xvmulsp 7f800000 * ff800000 AND 7f800000 * c683287b AND 7f800000 * 80000000 AND 7f800000 * 00000000 => ff800000 ff800000 7fc00000 7fc00000
-#11: xvmulsp 7f800000 * 00000000 AND 7f800000 * 7f800000 AND 7f800000 * 7fffffff AND 7f800000 * 7fc00000 => 7fc00000 7f800000 7fffffff 7fc00000
-#12: xvmulsp ffffffff * ff800000 AND ffffffff * c683287b AND ffc00000 * 80000000 AND ffc00000 * 00000000 => ffffffff ffffffff ffc00000 ffc00000
-#13: xvmulsp ffffffff * 00000000 AND ffffffff * 7f800000 AND ffffffff * 7fffffff AND ffffffff * 7fc00000 => ffffffff ffffffff ffffffff ffffffff
+#11: xvmulsp 7f800000 * 00000000 AND 7f800000 * 7f800000 AND 7f800000 * 7fbfffff AND 7f800000 * 7fc00000 => 7fc00000 7f800000 7fffffff 7fc00000
+#12: xvmulsp ffbfffff * ff800000 AND ffbfffff * c683287b AND ffc00000 * 80000000 AND ffc00000 * 00000000 => ffffffff ffffffff ffc00000 ffc00000
+#13: xvmulsp ffbfffff * 00000000 AND ffbfffff * 7f800000 AND ffbfffff * 7fbfffff AND ffbfffff * 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvmulsp ffc00000 * ff800000 AND ffc00000 * c683287b AND ffc00000 * 80000000 AND 49192c2d * 49c1288d => ffc00000 ffc00000 ffc00000 53672522
-#15: xvmulsp 49192c2d * 49c1288d AND 7fffffff * 7fc00000 AND 7fc00000 * 7fc00000 AND 7fc00000 * ffc00000 => 53672522 7fffffff 7fc00000 7fc00000
+#15: xvmulsp 49192c2d * 49c1288d AND 7fbfffff * 7fc00000 AND 7fc00000 * 7fc00000 AND 7fc00000 * ffc00000 => 53672522 7fffffff 7fc00000 7fc00000
 
 
 #0: xvsubdp fff0000000000000 - fff0000000000000 AND fff0000000000000 - c0d0650f5a07b353 => 7ff8000000000000 fff0000000000000
@@ -516,21 +516,21 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvsubsp ff800000 - ff800000 AND ff800000 - c683287b AND 49192c2d - 49c1288d AND ff800000 - 00000000 => 7fc00000 ff800000 c96924ed ff800000
-#1: xvsubsp ff800000 - 00000000 AND ff800000 - 7f800000 AND ff800000 - 7fffffff AND ff800000 - 7fc00000 => ff800000 ff800000 7fffffff 7fc00000
+#1: xvsubsp ff800000 - 00000000 AND ff800000 - 7f800000 AND ff800000 - 7fbfffff AND ff800000 - 7fc00000 => ff800000 ff800000 7fffffff 7fc00000
 #2: xvsubsp c683287b - ff800000 AND c683287b - c683287b AND c683287b - 80000000 AND c683287b - 00000000 => 7f800000 00000000 c683287b c683287b
-#3: xvsubsp c683287b - 00000000 AND c683287b - 7f800000 AND c683287b - 7fffffff AND c683287b - 7fc00000 => c683287b ff800000 7fffffff 7fc00000
+#3: xvsubsp c683287b - 00000000 AND c683287b - 7f800000 AND c683287b - 7fbfffff AND c683287b - 7fc00000 => c683287b ff800000 7fffffff 7fc00000
 #4: xvsubsp 80000000 - ff800000 AND 80000000 - c683287b AND 80000000 - 80000000 AND 80000000 - 00000000 => 7f800000 4683287b 00000000 80000000
-#5: xvsubsp 80000000 - 00000000 AND 80000000 - 7f800000 AND 80000000 - 7fffffff AND 80000000 - 7fc00000 => 80000000 ff800000 7fffffff 7fc00000
+#5: xvsubsp 80000000 - 00000000 AND 80000000 - 7f800000 AND 80000000 - 7fbfffff AND 80000000 - 7fc00000 => 80000000 ff800000 7fffffff 7fc00000
 #6: xvsubsp 00000000 - ff800000 AND 00000000 - c683287b AND 00000000 - 80000000 AND 00000000 - 00000000 => 7f800000 4683287b 00000000 00000000
-#7: xvsubsp 00000000 - 00000000 AND 00000000 - 7f800000 AND 00000000 - 7fffffff AND 00000000 - 7fc00000 => 00000000 ff800000 7fffffff 7fc00000
+#7: xvsubsp 00000000 - 00000000 AND 00000000 - 7f800000 AND 00000000 - 7fbfffff AND 00000000 - 7fc00000 => 00000000 ff800000 7fffffff 7fc00000
 #8: xvsubsp 00000000 - ff800000 AND 00000000 - c683287b AND 00000000 - 80000000 AND 00000000 - 00000000 => 7f800000 4683287b 00000000 00000000
-#9: xvsubsp 00000000 - 42780000 AND 00000000 - 7f800000 AND 00000000 - 7fffffff AND 00000000 - 7fc00000 => c2780000 ff800000 7fffffff 7fc00000
+#9: xvsubsp 00000000 - 42780000 AND 00000000 - 7f800000 AND 00000000 - 7fbfffff AND 00000000 - 7fc00000 => c2780000 ff800000 7fffffff 7fc00000
 #10: xvsubsp 7f800000 - ff800000 AND 7f800000 - c683287b AND 7f800000 - 80000000 AND 7f800000 - 00000000 => 7f800000 7f800000 7f800000 7f800000
-#11: xvsubsp 7f800000 - 00000000 AND 7f800000 - 7f800000 AND 7f800000 - 7fffffff AND 7f800000 - 7fc00000 => 7f800000 7fc00000 7fffffff 7fc00000
-#12: xvsubsp ffffffff - ff800000 AND ffffffff - c683287b AND ffc00000 - 80000000 AND ffc00000 - 00000000 => ffffffff ffffffff ffc00000 ffc00000
-#13: xvsubsp ffffffff - 00000000 AND ffffffff - 7f800000 AND ffffffff - 7fffffff AND ffffffff - 7fc00000 => ffffffff ffffffff ffffffff ffffffff
+#11: xvsubsp 7f800000 - 00000000 AND 7f800000 - 7f800000 AND 7f800000 - 7fbfffff AND 7f800000 - 7fc00000 => 7f800000 7fc00000 7fffffff 7fc00000
+#12: xvsubsp ffbfffff - ff800000 AND ffbfffff - c683287b AND ffc00000 - 80000000 AND ffc00000 - 00000000 => ffffffff ffffffff ffc00000 ffc00000
+#13: xvsubsp ffbfffff - 00000000 AND ffbfffff - 7f800000 AND ffbfffff - 7fbfffff AND ffbfffff - 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvsubsp ffc00000 - ff800000 AND ffc00000 - c683287b AND ffc00000 - 80000000 AND 49192c2d - 49c1288d => ffc00000 ffc00000 ffc00000 c96924ed
-#15: xvsubsp 49192c2d - 49c1288d AND 7fffffff - 7fc00000 AND 7fc00000 - 7fc00000 AND 7fc00000 - ffc00000 => c96924ed 7fffffff 7fc00000 7fc00000
+#15: xvsubsp 49192c2d - 49c1288d AND 7fbfffff - 7fc00000 AND 7fc00000 - 7fc00000 AND 7fc00000 - ffc00000 => c96924ed 7fffffff 7fc00000 7fc00000
 
 
 #0: xvmaxdp fff0000000000000 @max@ fff0000000000000 AND fff0000000000000 @max@ c0d0650f5a07b353 => fff0000000000000 c0d0650f5a07b353
@@ -602,39 +602,39 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvmaxsp ff800000 @max@ ff800000 AND ff800000 @max@ c683287b AND 49192c2d @max@ 49c1288d AND ff800000 @max@ 00000000 => ff800000 c683287b 49c1288d 00000000
-#1: xvmaxsp ff800000 @max@ 00000000 AND ff800000 @max@ 7f800000 AND ff800000 @max@ 7fffffff AND ff800000 @max@ 7fc00000 => 00000000 7f800000 ff800000 ff800000
+#1: xvmaxsp ff800000 @max@ 00000000 AND ff800000 @max@ 7f800000 AND ff800000 @max@ 7fbfffff AND ff800000 @max@ 7fc00000 => 00000000 7f800000 7fffffff ff800000
 #2: xvmaxsp c683287b @max@ ff800000 AND c683287b @max@ c683287b AND c683287b @max@ 80000000 AND c683287b @max@ 00000000 => c683287b c683287b 80000000 00000000
-#3: xvmaxsp c683287b @max@ 00000000 AND c683287b @max@ 7f800000 AND c683287b @max@ 7fffffff AND c683287b @max@ 7fc00000 => 00000000 7f800000 c683287b c683287b
+#3: xvmaxsp c683287b @max@ 00000000 AND c683287b @max@ 7f800000 AND c683287b @max@ 7fbfffff AND c683287b @max@ 7fc00000 => 00000000 7f800000 7fffffff c683287b
 #4: xvmaxsp 80000000 @max@ ff800000 AND 80000000 @max@ c683287b AND 80000000 @max@ 80000000 AND 80000000 @max@ 00000000 => 80000000 80000000 80000000 00000000
-#5: xvmaxsp 80000000 @max@ 00000000 AND 80000000 @max@ 7f800000 AND 80000000 @max@ 7fffffff AND 80000000 @max@ 7fc00000 => 00000000 7f800000 80000000 80000000
+#5: xvmaxsp 80000000 @max@ 00000000 AND 80000000 @max@ 7f800000 AND 80000000 @max@ 7fbfffff AND 80000000 @max@ 7fc00000 => 00000000 7f800000 7fffffff 80000000
 #6: xvmaxsp 00000000 @max@ ff800000 AND 00000000 @max@ c683287b AND 00000000 @max@ 80000000 AND 00000000 @max@ 00000000 => 00000000 00000000 00000000 00000000
-#7: xvmaxsp 00000000 @max@ 00000000 AND 00000000 @max@ 7f800000 AND 00000000 @max@ 7fffffff AND 00000000 @max@ 7fc00000 => 00000000 7f800000 00000000 00000000
+#7: xvmaxsp 00000000 @max@ 00000000 AND 00000000 @max@ 7f800000 AND 00000000 @max@ 7fbfffff AND 00000000 @max@ 7fc00000 => 00000000 7f800000 7fffffff 00000000
 #8: xvmaxsp 00000000 @max@ ff800000 AND 00000000 @max@ c683287b AND 00000000 @max@ 80000000 AND 00000000 @max@ 00000000 => 00000000 00000000 00000000 00000000
-#9: xvmaxsp 00000000 @max@ 42780000 AND 00000000 @max@ 7f800000 AND 00000000 @max@ 7fffffff AND 00000000 @max@ 7fc00000 => 42780000 7f800000 00000000 00000000
+#9: xvmaxsp 00000000 @max@ 42780000 AND 00000000 @max@ 7f800000 AND 00000000 @max@ 7fbfffff AND 00000000 @max@ 7fc00000 => 42780000 7f800000 7fffffff 00000000
 #10: xvmaxsp 7f800000 @max@ ff800000 AND 7f800000 @max@ c683287b AND 7f800000 @max@ 80000000 AND 7f800000 @max@ 00000000 => 7f800000 7f800000 7f800000 7f800000
-#11: xvmaxsp 7f800000 @max@ 00000000 AND 7f800000 @max@ 7f800000 AND 7f800000 @max@ 7fffffff AND 7f800000 @max@ 7fc00000 => 7f800000 7f800000 7f800000 7f800000
-#12: xvmaxsp ffffffff @max@ ff800000 AND ffffffff @max@ c683287b AND ffc00000 @max@ 80000000 AND ffc00000 @max@ 00000000 => ff800000 c683287b 80000000 00000000
-#13: xvmaxsp ffffffff @max@ 00000000 AND ffffffff @max@ 7f800000 AND ffffffff @max@ 7fffffff AND ffffffff @max@ 7fc00000 => 00000000 7f800000 ffffffff ffffffff
+#11: xvmaxsp 7f800000 @max@ 00000000 AND 7f800000 @max@ 7f800000 AND 7f800000 @max@ 7fbfffff AND 7f800000 @max@ 7fc00000 => 7f800000 7f800000 7fffffff 7f800000
+#12: xvmaxsp ffbfffff @max@ ff800000 AND ffbfffff @max@ c683287b AND ffc00000 @max@ 80000000 AND ffc00000 @max@ 00000000 => ffffffff ffffffff 80000000 00000000
+#13: xvmaxsp ffbfffff @max@ 00000000 AND ffbfffff @max@ 7f800000 AND ffbfffff @max@ 7fbfffff AND ffbfffff @max@ 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvmaxsp ffc00000 @max@ ff800000 AND ffc00000 @max@ c683287b AND ffc00000 @max@ 80000000 AND 49192c2d @max@ 49c1288d => ff800000 c683287b 80000000 49c1288d
-#15: xvmaxsp 49192c2d @max@ 49c1288d AND 7fffffff @max@ 7fc00000 AND 7fc00000 @max@ 7fc00000 AND 7fc00000 @max@ ffc00000 => 49c1288d 7fffffff 7fc00000 7fc00000
+#15: xvmaxsp 49192c2d @max@ 49c1288d AND 7fbfffff @max@ 7fc00000 AND 7fc00000 @max@ 7fc00000 AND 7fc00000 @max@ ffc00000 => 49c1288d 7fffffff 7fc00000 7fc00000
 
 
 #0: xvminsp ff800000 @min@ ff800000 AND ff800000 @min@ c683287b AND 49192c2d @min@ 49c1288d AND ff800000 @min@ 00000000 => ff800000 ff800000 49192c2d ff800000
-#1: xvminsp ff800000 @min@ 00000000 AND ff800000 @min@ 7f800000 AND ff800000 @min@ 7fffffff AND ff800000 @min@ 7fc00000 => ff800000 ff800000 ff800000 ff800000
+#1: xvminsp ff800000 @min@ 00000000 AND ff800000 @min@ 7f800000 AND ff800000 @min@ 7fbfffff AND ff800000 @min@ 7fc00000 => ff800000 ff800000 7fffffff ff800000
 #2: xvminsp c683287b @min@ ff800000 AND c683287b @min@ c683287b AND c683287b @min@ 80000000 AND c683287b @min@ 00000000 => ff800000 c683287b c683287b c683287b
-#3: xvminsp c683287b @min@ 00000000 AND c683287b @min@ 7f800000 AND c683287b @min@ 7fffffff AND c683287b @min@ 7fc00000 => c683287b c683287b c683287b c683287b
+#3: xvminsp c683287b @min@ 00000000 AND c683287b @min@ 7f800000 AND c683287b @min@ 7fbfffff AND c683287b @min@ 7fc00000 => c683287b c683287b 7fffffff c683287b
 #4: xvminsp 80000000 @min@ ff800000 AND 80000000 @min@ c683287b AND 80000000 @min@ 80000000 AND 80000000 @min@ 00000000 => ff800000 c683287b 80000000 80000000
-#5: xvminsp 80000000 @min@ 00000000 AND 80000000 @min@ 7f800000 AND 80000000 @min@ 7fffffff AND 80000000 @min@ 7fc00000 => 80000000 80000000 80000000 80000000
+#5: xvminsp 80000000 @min@ 00000000 AND 80000000 @min@ 7f800000 AND 80000000 @min@ 7fbfffff AND 80000000 @min@ 7fc00000 => 80000000 80000000 7fffffff 80000000
 #6: xvminsp 00000000 @min@ ff800000 AND 00000000 @min@ c683287b AND 00000000 @min@ 80000000 AND 00000000 @min@ 00000000 => ff800000 c683287b 80000000 00000000
-#7: xvminsp 00000000 @min@ 00000000 AND 00000000 @min@ 7f800000 AND 00000000 @min@ 7fffffff AND 00000000 @min@ 7fc00000 => 00000000 00000000 00000000 00000000
+#7: xvminsp 00000000 @min@ 00000000 AND 00000000 @min@ 7f800000 AND 00000000 @min@ 7fbfffff AND 00000000 @min@ 7fc00000 => 00000000 00000000 7fffffff 00000000
 #8: xvminsp 00000000 @min@ ff800000 AND 00000000 @min@ c683287b AND 00000000 @min@ 80000000 AND 00000000 @min@ 00000000 => ff800000 c683287b 80000000 00000000
-#9: xvminsp 00000000 @min@ 42780000 AND 00000000 @min@ 7f800000 AND 00000000 @min@ 7fffffff AND 00000000 @min@ 7fc00000 => 00000000 00000000 00000000 00000000
+#9: xvminsp 00000000 @min@ 42780000 AND 00000000 @min@ 7f800000 AND 00000000 @min@ 7fbfffff AND 00000000 @min@ 7fc00000 => 00000000 00000000 7fffffff 00000000
 #10: xvminsp 7f800000 @min@ ff800000 AND 7f800000 @min@ c683287b AND 7f800000 @min@ 80000000 AND 7f800000 @min@ 00000000 => ff800000 c683287b 80000000 00000000
-#11: xvminsp 7f800000 @min@ 00000000 AND 7f800000 @min@ 7f800000 AND 7f800000 @min@ 7fffffff AND 7f800000 @min@ 7fc00000 => 00000000 7f800000 7f800000 7f800000
-#12: xvminsp ffffffff @min@ ff800000 AND ffffffff @min@ c683287b AND ffc00000 @min@ 80000000 AND ffc00000 @min@ 00000000 => ff800000 c683287b 80000000 00000000
-#13: xvminsp ffffffff @min@ 00000000 AND ffffffff @min@ 7f800000 AND ffffffff @min@ 7fffffff AND ffffffff @min@ 7fc00000 => 00000000 7f800000 ffffffff ffffffff
+#11: xvminsp 7f800000 @min@ 00000000 AND 7f800000 @min@ 7f800000 AND 7f800000 @min@ 7fbfffff AND 7f800000 @min@ 7fc00000 => 00000000 7f800000 7fffffff 7f800000
+#12: xvminsp ffbfffff @min@ ff800000 AND ffbfffff @min@ c683287b AND ffc00000 @min@ 80000000 AND ffc00000 @min@ 00000000 => ffffffff ffffffff 80000000 00000000
+#13: xvminsp ffbfffff @min@ 00000000 AND ffbfffff @min@ 7f800000 AND ffbfffff @min@ 7fbfffff AND ffbfffff @min@ 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvminsp ffc00000 @min@ ff800000 AND ffc00000 @min@ c683287b AND ffc00000 @min@ 80000000 AND 49192c2d @min@ 49c1288d => ff800000 c683287b 80000000 49192c2d
-#15: xvminsp 49192c2d @min@ 49c1288d AND 7fffffff @min@ 7fc00000 AND 7fc00000 @min@ 7fc00000 AND 7fc00000 @min@ ffc00000 => 49192c2d 7fffffff 7fc00000 7fc00000
+#15: xvminsp 49192c2d @min@ 49c1288d AND 7fbfffff @min@ 7fc00000 AND 7fc00000 @min@ 7fc00000 AND 7fc00000 @min@ ffc00000 => 49192c2d 7fffffff 7fc00000 7fc00000
 
 
 #0: xvcpsgndp fff0000000000000 +-cp fff0000000000000 AND fff0000000000000 +-cp c0d0650f5a07b353 => fff0000000000000 c0d0650f5a07b353
@@ -672,21 +672,21 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvcpsgnsp ff800000 +-cp ff800000 AND ff800000 +-cp c683287b AND 49192c2d +-cp 49c1288d AND ff800000 +-cp 00000000 => ff800000 c683287b 49c1288d 80000000
-#1: xvcpsgnsp ff800000 +-cp 00000000 AND ff800000 +-cp 7f800000 AND ff800000 +-cp 7fffffff AND ff800000 +-cp 7fc00000 => 80000000 ff800000 ffffffff ffc00000
+#1: xvcpsgnsp ff800000 +-cp 00000000 AND ff800000 +-cp 7f800000 AND ff800000 +-cp 7fbfffff AND ff800000 +-cp 7fc00000 => 80000000 ff800000 ffbfffff ffc00000
 #2: xvcpsgnsp c683287b +-cp ff800000 AND c683287b +-cp c683287b AND c683287b +-cp 80000000 AND c683287b +-cp 00000000 => ff800000 c683287b 80000000 80000000
-#3: xvcpsgnsp c683287b +-cp 00000000 AND c683287b +-cp 7f800000 AND c683287b +-cp 7fffffff AND c683287b +-cp 7fc00000 => 80000000 ff800000 ffffffff ffc00000
+#3: xvcpsgnsp c683287b +-cp 00000000 AND c683287b +-cp 7f800000 AND c683287b +-cp 7fbfffff AND c683287b +-cp 7fc00000 => 80000000 ff800000 ffbfffff ffc00000
 #4: xvcpsgnsp 80000000 +-cp ff800000 AND 80000000 +-cp c683287b AND 80000000 +-cp 80000000 AND 80000000 +-cp 00000000 => ff800000 c683287b 80000000 80000000
-#5: xvcpsgnsp 80000000 +-cp 00000000 AND 80000000 +-cp 7f800000 AND 80000000 +-cp 7fffffff AND 80000000 +-cp 7fc00000 => 80000000 ff800000 ffffffff ffc00000
+#5: xvcpsgnsp 80000000 +-cp 00000000 AND 80000000 +-cp 7f800000 AND 80000000 +-cp 7fbfffff AND 80000000 +-cp 7fc00000 => 80000000 ff800000 ffbfffff ffc00000
 #6: xvcpsgnsp 00000000 +-cp ff800000 AND 00000000 +-cp c683287b AND 00000000 +-cp 80000000 AND 00000000 +-cp 00000000 => 7f800000 4683287b 00000000 00000000
-#7: xvcpsgnsp 00000000 +-cp 00000000 AND 00000000 +-cp 7f800000 AND 00000000 +-cp 7fffffff AND 00000000 +-cp 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
+#7: xvcpsgnsp 00000000 +-cp 00000000 AND 00000000 +-cp 7f800000 AND 00000000 +-cp 7fbfffff AND 00000000 +-cp 7fc00000 => 00000000 7f800000 7fbfffff 7fc00000
 #8: xvcpsgnsp 00000000 +-cp ff800000 AND 00000000 +-cp c683287b AND 00000000 +-cp 80000000 AND 00000000 +-cp 00000000 => 7f800000 4683287b 00000000 00000000
-#9: xvcpsgnsp 00000000 +-cp 42780000 AND 00000000 +-cp 7f800000 AND 00000000 +-cp 7fffffff AND 00000000 +-cp 7fc00000 => 42780000 7f800000 7fffffff 7fc00000
+#9: xvcpsgnsp 00000000 +-cp 42780000 AND 00000000 +-cp 7f800000 AND 00000000 +-cp 7fbfffff AND 00000000 +-cp 7fc00000 => 42780000 7f800000 7fbfffff 7fc00000
 #10: xvcpsgnsp 7f800000 +-cp ff800000 AND 7f800000 +-cp c683287b AND 7f800000 +-cp 80000000 AND 7f800000 +-cp 00000000 => 7f800000 4683287b 00000000 00000000
-#11: xvcpsgnsp 7f800000 +-cp 00000000 AND 7f800000 +-cp 7f800000 AND 7f800000 +-cp 7fffffff AND 7f800000 +-cp 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
-#12: xvcpsgnsp ffffffff +-cp ff800000 AND ffffffff +-cp c683287b AND ffc00000 +-cp 80000000 AND ffc00000 +-cp 00000000 => ff800000 c683287b 80000000 80000000
-#13: xvcpsgnsp ffffffff +-cp 00000000 AND ffffffff +-cp 7f800000 AND ffffffff +-cp 7fffffff AND ffffffff +-cp 7fc00000 => 80000000 ff800000 ffffffff ffc00000
+#11: xvcpsgnsp 7f800000 +-cp 00000000 AND 7f800000 +-cp 7f800000 AND 7f800000 +-cp 7fbfffff AND 7f800000 +-cp 7fc00000 => 00000000 7f800000 7fbfffff 7fc00000
+#12: xvcpsgnsp ffbfffff +-cp ff800000 AND ffbfffff +-cp c683287b AND ffc00000 +-cp 80000000 AND ffc00000 +-cp 00000000 => ff800000 c683287b 80000000 80000000
+#13: xvcpsgnsp ffbfffff +-cp 00000000 AND ffbfffff +-cp 7f800000 AND ffbfffff +-cp 7fbfffff AND ffbfffff +-cp 7fc00000 => 80000000 ff800000 ffbfffff ffc00000
 #14: xvcpsgnsp ffc00000 +-cp ff800000 AND ffc00000 +-cp c683287b AND ffc00000 +-cp 80000000 AND 49192c2d +-cp 49c1288d => ff800000 c683287b 80000000 49c1288d
-#15: xvcpsgnsp 49192c2d +-cp 49c1288d AND 7fffffff +-cp 7fc00000 AND 7fc00000 +-cp 7fc00000 AND 7fc00000 +-cp ffc00000 => 49c1288d 7fc00000 7fc00000 7fc00000
+#15: xvcpsgnsp 49192c2d +-cp 49c1288d AND 7fbfffff +-cp 7fc00000 AND 7fc00000 +-cp 7fc00000 AND 7fc00000 +-cp ffc00000 => 49c1288d 7fc00000 7fc00000 7fc00000
 
 
 Test xxsel instruction
@@ -1077,38 +1077,38 @@ Test floating point arithmetic instructions -- with a{d|s}p or m{d|s}p
 #31: xvmaddmdp *+(0018000000b77501,7ff8000000000000,7ff8000000000000) AND *+(7fe800000000051b,7ff8000000000000,fff8000000000000) => 7ff8000000000000 7ff8000000000000
 
 #0: xvmaddasp *+(ff800000,ff800000,3ec00000) AND *+(c683287b,ff800000,42780000) AND *+(49c1288d,49192c2d,00000000) AND *+(00000000,ff800000,7f800000) => ff800000 ff800000 49c1288d ff800000
-#1: xvmaddasp *+(00000000,ff800000,00000000) AND *+(7f800000,ff800000,00000000) AND *+(7fffffff,ff800000,80000000) AND *+(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvmaddasp *+(ff800000,c683287b,ff800000) AND *+(c683287b,c683287b,7fffffff) AND *+(80000000,c683287b,ffffffff) AND *+(00000000,c683287b,7fc00000) => 7fc00000 7fffffff ffffffff 7fc00000
-#3: xvmaddasp *+(00000000,c683287b,ffc00000) AND *+(7f800000,c683287b,80000000) AND *+(7fffffff,c683287b,c683287b) AND *+(7fc00000,c683287b,49192c2d) => ffc00000 7f800000 7fffffff 7fc00000
+#1: xvmaddasp *+(00000000,ff800000,00000000) AND *+(7f800000,ff800000,00000000) AND *+(7fbfffff,ff800000,80000000) AND *+(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvmaddasp *+(ff800000,c683287b,ff800000) AND *+(c683287b,c683287b,7fbfffff) AND *+(80000000,c683287b,ffbfffff) AND *+(00000000,c683287b,7fc00000) => 7fc00000 7fffffff ffffffff 7fc00000
+#3: xvmaddasp *+(00000000,c683287b,ffc00000) AND *+(7f800000,c683287b,80000000) AND *+(7fbfffff,c683287b,c683287b) AND *+(7fc00000,c683287b,49192c2d) => ffc00000 7f800000 7fffffff 7fc00000
 #4: xvmaddasp *+(ff800000,80000000,7f800000) AND *+(c683287b,80000000,00000000) AND *+(80000000,80000000,00000000) AND *+(00000000,80000000,80000000) => 7fc00000 c683287b 80000000 00000000
-#5: xvmaddasp *+(00000000,80000000,7f800000) AND *+(7f800000,80000000,ff800000) AND *+(7fffffff,80000000,7fffffff) AND *+(7fc00000,80000000,ffffffff) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvmaddasp *+(00000000,80000000,7f800000) AND *+(7f800000,80000000,ff800000) AND *+(7fbfffff,80000000,7fbfffff) AND *+(7fc00000,80000000,ffbfffff) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvmaddasp *+(ff800000,00000000,7fc00000) AND *+(c683287b,00000000,ffc00000) AND *+(80000000,00000000,80000000) AND *+(00000000,00000000,c683287b) => 7fc00000 ffc00000 80000000 00000000
-#7: xvmaddasp *+(00000000,00000000,00000000) AND *+(7f800000,00000000,7f800000) AND *+(7fffffff,00000000,00000000) AND *+(7fc00000,00000000,00000000) => 00000000 7fc00000 7fffffff 7fc00000
-#8: xvmaddasp *+(ff800000,00000000,80000000) AND *+(c683287b,00000000,7f800000) AND *+(80000000,00000000,ff800000) AND *+(00000000,00000000,7fffffff) => ff800000 7fc00000 7fc00000 7fffffff
-#9: xvmaddasp *+(42780000,00000000,ffffffff) AND *+(7f800000,00000000,7fc00000) AND *+(7fffffff,00000000,ffc00000) AND *+(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvmaddasp *+(00000000,00000000,00000000) AND *+(7f800000,00000000,7f800000) AND *+(7fbfffff,00000000,00000000) AND *+(7fc00000,00000000,00000000) => 00000000 7fc00000 7fffffff 7fc00000
+#8: xvmaddasp *+(ff800000,00000000,80000000) AND *+(c683287b,00000000,7f800000) AND *+(80000000,00000000,ff800000) AND *+(00000000,00000000,7fbfffff) => ff800000 7fc00000 7fc00000 7fffffff
+#9: xvmaddasp *+(42780000,00000000,ffbfffff) AND *+(7f800000,00000000,7fc00000) AND *+(7fbfffff,00000000,ffc00000) AND *+(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvmaddasp *+(ff800000,7f800000,42780000) AND *+(c683287b,7f800000,00000000) AND *+(80000000,7f800000,7f800000) AND *+(00000000,7f800000,00000000) => 7fc00000 7fc00000 7f800000 7fc00000
-#11: xvmaddasp *+(00000000,7f800000,00000000) AND *+(7f800000,7f800000,80000000) AND *+(7fffffff,7f800000,7f800000) AND *+(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvmaddasp *+(ff800000,ffffffff,7fffffff) AND *+(c683287b,ffffffff,ffffffff) AND *+(80000000,ffc00000,7fc00000) AND *+(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvmaddasp *+(00000000,ffffffff,3ec00000) AND *+(7f800000,ffffffff,42780000) AND *+(7fffffff,ffffffff,00000000) AND *+(7fc00000,ffffffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvmaddasp *+(00000000,7f800000,00000000) AND *+(7f800000,7f800000,80000000) AND *+(7fbfffff,7f800000,7f800000) AND *+(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvmaddasp *+(ff800000,ffbfffff,7fbfffff) AND *+(c683287b,ffbfffff,ffbfffff) AND *+(80000000,ffc00000,7fc00000) AND *+(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvmaddasp *+(00000000,ffbfffff,3ec00000) AND *+(7f800000,ffbfffff,42780000) AND *+(7fbfffff,ffbfffff,00000000) AND *+(7fc00000,ffbfffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvmaddasp *+(ff800000,ffc00000,00000000) AND *+(c683287b,ffc00000,00000000) AND *+(80000000,ffc00000,80000000) AND *+(49c1288d,49192c2d,7f800000) => ffc00000 ffc00000 ffc00000 7f800000
-#15: xvmaddasp *+(49c1288d,49192c2d,ff800000) AND *+(7fc00000,7fffffff,7fffffff) AND *+(7fc00000,7fc00000,ffffffff) AND *+(ffc00000,7fc00000,7fc00000) => ff800000 7fffffff 7fc00000 7fc00000
+#15: xvmaddasp *+(49c1288d,49192c2d,ff800000) AND *+(7fc00000,7fbfffff,7fbfffff) AND *+(7fc00000,7fc00000,ffbfffff) AND *+(ffc00000,7fc00000,7fc00000) => ff800000 7fffffff 7fc00000 7fc00000
 
 #0: xvmaddmsp *+(3ec00000,ff800000,ff800000) AND *+(42780000,ff800000,c683287b) AND *+(00000000,49192c2d,49c1288d) AND *+(7f800000,ff800000,00000000) => ff800000 ff800000 49c1288d ff800000
-#1: xvmaddmsp *+(00000000,ff800000,00000000) AND *+(00000000,ff800000,7f800000) AND *+(80000000,ff800000,7fffffff) AND *+(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvmaddmsp *+(ff800000,c683287b,ff800000) AND *+(7fffffff,c683287b,c683287b) AND *+(ffffffff,c683287b,80000000) AND *+(7fc00000,c683287b,00000000) => 7fc00000 7fffffff ffffffff 7fc00000
-#3: xvmaddmsp *+(ffc00000,c683287b,00000000) AND *+(80000000,c683287b,7f800000) AND *+(c683287b,c683287b,7fffffff) AND *+(49192c2d,c683287b,7fc00000) => ffc00000 7f800000 7fffffff 7fc00000
+#1: xvmaddmsp *+(00000000,ff800000,00000000) AND *+(00000000,ff800000,7f800000) AND *+(80000000,ff800000,7fbfffff) AND *+(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvmaddmsp *+(ff800000,c683287b,ff800000) AND *+(7fbfffff,c683287b,c683287b) AND *+(ffbfffff,c683287b,80000000) AND *+(7fc00000,c683287b,00000000) => 7fc00000 7fffffff ffffffff 7fc00000
+#3: xvmaddmsp *+(ffc00000,c683287b,00000000) AND *+(80000000,c683287b,7f800000) AND *+(c683287b,c683287b,7fbfffff) AND *+(49192c2d,c683287b,7fc00000) => ffc00000 7f800000 7fffffff 7fc00000
 #4: xvmaddmsp *+(7f800000,80000000,ff800000) AND *+(00000000,80000000,c683287b) AND *+(00000000,80000000,80000000) AND *+(80000000,80000000,00000000) => 7fc00000 c683287b 80000000 00000000
-#5: xvmaddmsp *+(7f800000,80000000,00000000) AND *+(ff800000,80000000,7f800000) AND *+(7fffffff,80000000,7fffffff) AND *+(ffffffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvmaddmsp *+(7f800000,80000000,00000000) AND *+(ff800000,80000000,7f800000) AND *+(7fbfffff,80000000,7fbfffff) AND *+(ffbfffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvmaddmsp *+(7fc00000,00000000,ff800000) AND *+(ffc00000,00000000,c683287b) AND *+(80000000,00000000,80000000) AND *+(c683287b,00000000,00000000) => 7fc00000 ffc00000 80000000 00000000
-#7: xvmaddmsp *+(00000000,00000000,00000000) AND *+(7f800000,00000000,7f800000) AND *+(00000000,00000000,7fffffff) AND *+(00000000,00000000,7fc00000) => 00000000 7fc00000 7fffffff 7fc00000
-#8: xvmaddmsp *+(80000000,00000000,ff800000) AND *+(7f800000,00000000,c683287b) AND *+(ff800000,00000000,80000000) AND *+(7fffffff,00000000,00000000) => ff800000 7fc00000 7fc00000 7fffffff
-#9: xvmaddmsp *+(ffffffff,00000000,42780000) AND *+(7fc00000,00000000,7f800000) AND *+(ffc00000,00000000,7fffffff) AND *+(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvmaddmsp *+(00000000,00000000,00000000) AND *+(7f800000,00000000,7f800000) AND *+(00000000,00000000,7fbfffff) AND *+(00000000,00000000,7fc00000) => 00000000 7fc00000 7fffffff 7fc00000
+#8: xvmaddmsp *+(80000000,00000000,ff800000) AND *+(7f800000,00000000,c683287b) AND *+(ff800000,00000000,80000000) AND *+(7fbfffff,00000000,00000000) => ff800000 7fc00000 7fc00000 7fffffff
+#9: xvmaddmsp *+(ffbfffff,00000000,42780000) AND *+(7fc00000,00000000,7f800000) AND *+(ffc00000,00000000,7fbfffff) AND *+(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvmaddmsp *+(42780000,7f800000,ff800000) AND *+(00000000,7f800000,c683287b) AND *+(7f800000,7f800000,80000000) AND *+(00000000,7f800000,00000000) => 7fc00000 7fc00000 7f800000 7fc00000
-#11: xvmaddmsp *+(00000000,7f800000,00000000) AND *+(80000000,7f800000,7f800000) AND *+(7f800000,7f800000,7fffffff) AND *+(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvmaddmsp *+(7fffffff,ffffffff,ff800000) AND *+(ffffffff,ffffffff,c683287b) AND *+(7fc00000,ffc00000,80000000) AND *+(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvmaddmsp *+(3ec00000,ffffffff,00000000) AND *+(42780000,ffffffff,7f800000) AND *+(00000000,ffffffff,7fffffff) AND *+(7f800000,ffffffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvmaddmsp *+(00000000,7f800000,00000000) AND *+(80000000,7f800000,7f800000) AND *+(7f800000,7f800000,7fbfffff) AND *+(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvmaddmsp *+(7fbfffff,ffbfffff,ff800000) AND *+(ffbfffff,ffbfffff,c683287b) AND *+(7fc00000,ffc00000,80000000) AND *+(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvmaddmsp *+(3ec00000,ffbfffff,00000000) AND *+(42780000,ffbfffff,7f800000) AND *+(00000000,ffbfffff,7fbfffff) AND *+(7f800000,ffbfffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvmaddmsp *+(00000000,ffc00000,ff800000) AND *+(00000000,ffc00000,c683287b) AND *+(80000000,ffc00000,80000000) AND *+(7f800000,49192c2d,49c1288d) => ffc00000 ffc00000 ffc00000 7f800000
-#15: xvmaddmsp *+(ff800000,49192c2d,49c1288d) AND *+(7fffffff,7fffffff,7fc00000) AND *+(ffffffff,7fc00000,7fc00000) AND *+(7fc00000,7fc00000,ffc00000) => ff800000 7fffffff 7fc00000 7fc00000
+#15: xvmaddmsp *+(ff800000,49192c2d,49c1288d) AND *+(7fbfffff,7fbfffff,7fc00000) AND *+(ffbfffff,7fc00000,7fc00000) AND *+(7fc00000,7fc00000,ffc00000) => ff800000 7fffffff 7fc00000 7fc00000
 
 #0: xvnmaddadp !*+(fff0000000000000,fff0000000000000,3fd8000000000000) AND !*+(c0d0650f5a07b353,fff0000000000000,404f000000000000) => 7ff0000000000000 7ff0000000000000
 #1: xvnmaddadp !*+(41382511a2000000,41232585a9900000,0018000000b77501) AND !*+(0000000000000000,fff0000000000000,7fe800000000051b) => c1382511a2000000 7ff0000000000000
@@ -1177,38 +1177,38 @@ Test floating point arithmetic instructions -- with a{d|s}p or m{d|s}p
 #31: xvnmaddmdp !*+(0018000000b77501,7ff8000000000000,7ff8000000000000) AND !*+(7fe800000000051b,7ff8000000000000,fff8000000000000) => 7ff8000000000000 7ff8000000000000
 
 #0: xvnmaddasp !*+(ff800000,ff800000,3ec00000) AND !*+(c683287b,ff800000,42780000) AND !*+(49c1288d,49192c2d,00000000) AND !*+(00000000,ff800000,7f800000) => 7f800000 7f800000 c9c1288d 7f800000
-#1: xvnmaddasp !*+(00000000,ff800000,00000000) AND !*+(7f800000,ff800000,00000000) AND !*+(7fffffff,ff800000,80000000) AND !*+(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvnmaddasp !*+(ff800000,c683287b,ff800000) AND !*+(c683287b,c683287b,7fffffff) AND !*+(80000000,c683287b,ffffffff) AND !*+(00000000,c683287b,7fc00000) => 7fc00000 7fffffff ffffffff 7fc00000
-#3: xvnmaddasp !*+(00000000,c683287b,ffc00000) AND !*+(7f800000,c683287b,80000000) AND !*+(7fffffff,c683287b,c683287b) AND !*+(7fc00000,c683287b,49192c2d) => ffc00000 ff800000 7fffffff 7fc00000
+#1: xvnmaddasp !*+(00000000,ff800000,00000000) AND !*+(7f800000,ff800000,00000000) AND !*+(7fbfffff,ff800000,80000000) AND !*+(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvnmaddasp !*+(ff800000,c683287b,ff800000) AND !*+(c683287b,c683287b,7fbfffff) AND !*+(80000000,c683287b,ffbfffff) AND !*+(00000000,c683287b,7fc00000) => 7fc00000 7fffffff ffffffff 7fc00000
+#3: xvnmaddasp !*+(00000000,c683287b,ffc00000) AND !*+(7f800000,c683287b,80000000) AND !*+(7fbfffff,c683287b,c683287b) AND !*+(7fc00000,c683287b,49192c2d) => ffc00000 ff800000 7fffffff 7fc00000
 #4: xvnmaddasp !*+(ff800000,80000000,7f800000) AND !*+(c683287b,80000000,00000000) AND !*+(80000000,80000000,00000000) AND !*+(00000000,80000000,80000000) => 7fc00000 4683287b 00000000 80000000
-#5: xvnmaddasp !*+(00000000,80000000,7f800000) AND !*+(7f800000,80000000,ff800000) AND !*+(7fffffff,80000000,7fffffff) AND !*+(7fc00000,80000000,ffffffff) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvnmaddasp !*+(00000000,80000000,7f800000) AND !*+(7f800000,80000000,ff800000) AND !*+(7fbfffff,80000000,7fbfffff) AND !*+(7fc00000,80000000,ffbfffff) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvnmaddasp !*+(ff800000,00000000,7fc00000) AND !*+(c683287b,00000000,ffc00000) AND !*+(80000000,00000000,80000000) AND !*+(00000000,00000000,c683287b) => 7fc00000 ffc00000 00000000 80000000
-#7: xvnmaddasp !*+(00000000,00000000,00000000) AND !*+(7f800000,00000000,7f800000) AND !*+(7fffffff,00000000,00000000) AND !*+(7fc00000,00000000,00000000) => 80000000 7fc00000 7fffffff 7fc00000
-#8: xvnmaddasp !*+(ff800000,00000000,80000000) AND !*+(c683287b,00000000,7f800000) AND !*+(80000000,00000000,ff800000) AND !*+(00000000,00000000,7fffffff) => 7f800000 7fc00000 7fc00000 7fffffff
-#9: xvnmaddasp !*+(42780000,00000000,ffffffff) AND !*+(7f800000,00000000,7fc00000) AND !*+(7fffffff,00000000,ffc00000) AND !*+(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvnmaddasp !*+(00000000,00000000,00000000) AND !*+(7f800000,00000000,7f800000) AND !*+(7fbfffff,00000000,00000000) AND !*+(7fc00000,00000000,00000000) => 80000000 7fc00000 7fffffff 7fc00000
+#8: xvnmaddasp !*+(ff800000,00000000,80000000) AND !*+(c683287b,00000000,7f800000) AND !*+(80000000,00000000,ff800000) AND !*+(00000000,00000000,7fbfffff) => 7f800000 7fc00000 7fc00000 7fffffff
+#9: xvnmaddasp !*+(42780000,00000000,ffbfffff) AND !*+(7f800000,00000000,7fc00000) AND !*+(7fbfffff,00000000,ffc00000) AND !*+(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvnmaddasp !*+(ff800000,7f800000,42780000) AND !*+(c683287b,7f800000,00000000) AND !*+(80000000,7f800000,7f800000) AND !*+(00000000,7f800000,00000000) => 7fc00000 7fc00000 ff800000 7fc00000
-#11: xvnmaddasp !*+(00000000,7f800000,00000000) AND !*+(7f800000,7f800000,80000000) AND !*+(7fffffff,7f800000,7f800000) AND !*+(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvnmaddasp !*+(ff800000,ffffffff,7fffffff) AND !*+(c683287b,ffffffff,ffffffff) AND !*+(80000000,ffc00000,7fc00000) AND !*+(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvnmaddasp !*+(00000000,ffffffff,3ec00000) AND !*+(7f800000,ffffffff,42780000) AND !*+(7fffffff,ffffffff,00000000) AND !*+(7fc00000,ffffffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvnmaddasp !*+(00000000,7f800000,00000000) AND !*+(7f800000,7f800000,80000000) AND !*+(7fbfffff,7f800000,7f800000) AND !*+(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvnmaddasp !*+(ff800000,ffbfffff,7fbfffff) AND !*+(c683287b,ffbfffff,ffbfffff) AND !*+(80000000,ffc00000,7fc00000) AND !*+(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvnmaddasp !*+(00000000,ffbfffff,3ec00000) AND !*+(7f800000,ffbfffff,42780000) AND !*+(7fbfffff,ffbfffff,00000000) AND !*+(7fc00000,ffbfffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvnmaddasp !*+(ff800000,ffc00000,00000000) AND !*+(c683287b,ffc00000,00000000) AND !*+(80000000,ffc00000,80000000) AND !*+(49c1288d,49192c2d,7f800000) => ffc00000 ffc00000 ffc00000 ff800000
-#15: xvnmaddasp !*+(49c1288d,49192c2d,ff800000) AND !*+(7fc00000,7fffffff,7fffffff) AND !*+(7fc00000,7fc00000,ffffffff) AND !*+(ffc00000,7fc00000,7fc00000) => 7f800000 7fffffff 7fc00000 7fc00000
+#15: xvnmaddasp !*+(49c1288d,49192c2d,ff800000) AND !*+(7fc00000,7fbfffff,7fbfffff) AND !*+(7fc00000,7fc00000,ffbfffff) AND !*+(ffc00000,7fc00000,7fc00000) => 7f800000 7fffffff 7fc00000 7fc00000
 
 #0: xvnmaddmsp !*+(3ec00000,ff800000,ff800000) AND !*+(42780000,ff800000,c683287b) AND !*+(00000000,49192c2d,49c1288d) AND !*+(7f800000,ff800000,00000000) => 7f800000 7f800000 c9c1288d 7f800000
-#1: xvnmaddmsp !*+(00000000,ff800000,00000000) AND !*+(00000000,ff800000,7f800000) AND !*+(80000000,ff800000,7fffffff) AND !*+(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvnmaddmsp !*+(ff800000,c683287b,ff800000) AND !*+(7fffffff,c683287b,c683287b) AND !*+(ffffffff,c683287b,80000000) AND !*+(7fc00000,c683287b,00000000) => 7fc00000 7fffffff ffffffff 7fc00000
-#3: xvnmaddmsp !*+(ffc00000,c683287b,00000000) AND !*+(80000000,c683287b,7f800000) AND !*+(c683287b,c683287b,7fffffff) AND !*+(49192c2d,c683287b,7fc00000) => ffc00000 ff800000 7fffffff 7fc00000
+#1: xvnmaddmsp !*+(00000000,ff800000,00000000) AND !*+(00000000,ff800000,7f800000) AND !*+(80000000,ff800000,7fbfffff) AND !*+(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvnmaddmsp !*+(ff800000,c683287b,ff800000) AND !*+(7fbfffff,c683287b,c683287b) AND !*+(ffbfffff,c683287b,80000000) AND !*+(7fc00000,c683287b,00000000) => 7fc00000 7fffffff ffffffff 7fc00000
+#3: xvnmaddmsp !*+(ffc00000,c683287b,00000000) AND !*+(80000000,c683287b,7f800000) AND !*+(c683287b,c683287b,7fbfffff) AND !*+(49192c2d,c683287b,7fc00000) => ffc00000 ff800000 7fffffff 7fc00000
 #4: xvnmaddmsp !*+(7f800000,80000000,ff800000) AND !*+(00000000,80000000,c683287b) AND !*+(00000000,80000000,80000000) AND !*+(80000000,80000000,00000000) => 7fc00000 4683287b 00000000 80000000
-#5: xvnmaddmsp !*+(7f800000,80000000,00000000) AND !*+(ff800000,80000000,7f800000) AND !*+(7fffffff,80000000,7fffffff) AND !*+(ffffffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvnmaddmsp !*+(7f800000,80000000,00000000) AND !*+(ff800000,80000000,7f800000) AND !*+(7fbfffff,80000000,7fbfffff) AND !*+(ffbfffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvnmaddmsp !*+(7fc00000,00000000,ff800000) AND !*+(ffc00000,00000000,c683287b) AND !*+(80000000,00000000,80000000) AND !*+(c683287b,00000000,00000000) => 7fc00000 ffc00000 00000000 80000000
-#7: xvnmaddmsp !*+(00000000,00000000,00000000) AND !*+(7f800000,00000000,7f800000) AND !*+(00000000,00000000,7fffffff) AND !*+(00000000,00000000,7fc00000) => 80000000 7fc00000 7fffffff 7fc00000
-#8: xvnmaddmsp !*+(80000000,00000000,ff800000) AND !*+(7f800000,00000000,c683287b) AND !*+(ff800000,00000000,80000000) AND !*+(7fffffff,00000000,00000000) => 7f800000 7fc00000 7fc00000 7fffffff
-#9: xvnmaddmsp !*+(ffffffff,00000000,42780000) AND !*+(7fc00000,00000000,7f800000) AND !*+(ffc00000,00000000,7fffffff) AND !*+(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvnmaddmsp !*+(00000000,00000000,00000000) AND !*+(7f800000,00000000,7f800000) AND !*+(00000000,00000000,7fbfffff) AND !*+(00000000,00000000,7fc00000) => 80000000 7fc00000 7fffffff 7fc00000
+#8: xvnmaddmsp !*+(80000000,00000000,ff800000) AND !*+(7f800000,00000000,c683287b) AND !*+(ff800000,00000000,80000000) AND !*+(7fbfffff,00000000,00000000) => 7f800000 7fc00000 7fc00000 7fffffff
+#9: xvnmaddmsp !*+(ffbfffff,00000000,42780000) AND !*+(7fc00000,00000000,7f800000) AND !*+(ffc00000,00000000,7fbfffff) AND !*+(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvnmaddmsp !*+(42780000,7f800000,ff800000) AND !*+(00000000,7f800000,c683287b) AND !*+(7f800000,7f800000,80000000) AND !*+(00000000,7f800000,00000000) => 7fc00000 7fc00000 ff800000 7fc00000
-#11: xvnmaddmsp !*+(00000000,7f800000,00000000) AND !*+(80000000,7f800000,7f800000) AND !*+(7f800000,7f800000,7fffffff) AND !*+(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvnmaddmsp !*+(7fffffff,ffffffff,ff800000) AND !*+(ffffffff,ffffffff,c683287b) AND !*+(7fc00000,ffc00000,80000000) AND !*+(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvnmaddmsp !*+(3ec00000,ffffffff,00000000) AND !*+(42780000,ffffffff,7f800000) AND !*+(00000000,ffffffff,7fffffff) AND !*+(7f800000,ffffffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvnmaddmsp !*+(00000000,7f800000,00000000) AND !*+(80000000,7f800000,7f800000) AND !*+(7f800000,7f800000,7fbfffff) AND !*+(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvnmaddmsp !*+(7fbfffff,ffbfffff,ff800000) AND !*+(ffbfffff,ffbfffff,c683287b) AND !*+(7fc00000,ffc00000,80000000) AND !*+(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvnmaddmsp !*+(3ec00000,ffbfffff,00000000) AND !*+(42780000,ffbfffff,7f800000) AND !*+(00000000,ffbfffff,7fbfffff) AND !*+(7f800000,ffbfffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvnmaddmsp !*+(00000000,ffc00000,ff800000) AND !*+(00000000,ffc00000,c683287b) AND !*+(80000000,ffc00000,80000000) AND !*+(7f800000,49192c2d,49c1288d) => ffc00000 ffc00000 ffc00000 ff800000
-#15: xvnmaddmsp !*+(ff800000,49192c2d,49c1288d) AND !*+(7fffffff,7fffffff,7fc00000) AND !*+(ffffffff,7fc00000,7fc00000) AND !*+(7fc00000,7fc00000,ffc00000) => 7f800000 7fffffff 7fc00000 7fc00000
+#15: xvnmaddmsp !*+(ff800000,49192c2d,49c1288d) AND !*+(7fbfffff,7fbfffff,7fc00000) AND !*+(ffbfffff,7fc00000,7fc00000) AND !*+(7fc00000,7fc00000,ffc00000) => 7f800000 7fffffff 7fc00000 7fc00000
 
 #0: xvmsubadp *-(fff0000000000000,fff0000000000000,3fd8000000000000) AND *-(c0d0650f5a07b353,fff0000000000000,404f000000000000) => 7ff8000000000000 fff0000000000000
 #1: xvmsubadp *-(41382511a2000000,41232585a9900000,0018000000b77501) AND *-(0000000000000000,fff0000000000000,7fe800000000051b) => c1382511a2000000 fff0000000000000
@@ -1277,38 +1277,38 @@ Test floating point arithmetic instructions -- with a{d|s}p or m{d|s}p
 #31: xvmsubmdp *-(0018000000b77501,7ff8000000000000,7ff8000000000000) AND *-(7fe800000000051b,7ff8000000000000,fff8000000000000) => 7ff8000000000000 7ff8000000000000
 
 #0: xvmsubasp *-(ff800000,ff800000,3ec00000) AND *-(c683287b,ff800000,42780000) AND *-(49c1288d,49192c2d,00000000) AND *-(00000000,ff800000,7f800000) => 7fc00000 ff800000 c9c1288d ff800000
-#1: xvmsubasp *-(00000000,ff800000,00000000) AND *-(7f800000,ff800000,00000000) AND *-(7fffffff,ff800000,80000000) AND *-(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvmsubasp *-(ff800000,c683287b,ff800000) AND *-(c683287b,c683287b,7fffffff) AND *-(80000000,c683287b,ffffffff) AND *-(00000000,c683287b,7fc00000) => 7f800000 7fffffff ffffffff 7fc00000
-#3: xvmsubasp *-(00000000,c683287b,ffc00000) AND *-(7f800000,c683287b,80000000) AND *-(7fffffff,c683287b,c683287b) AND *-(7fc00000,c683287b,49192c2d) => ffc00000 ff800000 7fffffff 7fc00000
+#1: xvmsubasp *-(00000000,ff800000,00000000) AND *-(7f800000,ff800000,00000000) AND *-(7fbfffff,ff800000,80000000) AND *-(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvmsubasp *-(ff800000,c683287b,ff800000) AND *-(c683287b,c683287b,7fbfffff) AND *-(80000000,c683287b,ffbfffff) AND *-(00000000,c683287b,7fc00000) => 7f800000 7fffffff ffffffff 7fc00000
+#3: xvmsubasp *-(00000000,c683287b,ffc00000) AND *-(7f800000,c683287b,80000000) AND *-(7fbfffff,c683287b,c683287b) AND *-(7fc00000,c683287b,49192c2d) => ffc00000 ff800000 7fffffff 7fc00000
 #4: xvmsubasp *-(ff800000,80000000,7f800000) AND *-(c683287b,80000000,00000000) AND *-(80000000,80000000,00000000) AND *-(00000000,80000000,80000000) => 7fc00000 4683287b 00000000 00000000
-#5: xvmsubasp *-(00000000,80000000,7f800000) AND *-(7f800000,80000000,ff800000) AND *-(7fffffff,80000000,7fffffff) AND *-(7fc00000,80000000,ffffffff) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvmsubasp *-(00000000,80000000,7f800000) AND *-(7f800000,80000000,ff800000) AND *-(7fbfffff,80000000,7fbfffff) AND *-(7fc00000,80000000,ffbfffff) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvmsubasp *-(ff800000,00000000,7fc00000) AND *-(c683287b,00000000,ffc00000) AND *-(80000000,00000000,80000000) AND *-(00000000,00000000,c683287b) => 7fc00000 ffc00000 00000000 80000000
-#7: xvmsubasp *-(00000000,00000000,00000000) AND *-(7f800000,00000000,7f800000) AND *-(7fffffff,00000000,00000000) AND *-(7fc00000,00000000,00000000) => 00000000 7fc00000 7fffffff 7fc00000
-#8: xvmsubasp *-(ff800000,00000000,80000000) AND *-(c683287b,00000000,7f800000) AND *-(80000000,00000000,ff800000) AND *-(00000000,00000000,7fffffff) => 7f800000 7fc00000 7fc00000 7fffffff
-#9: xvmsubasp *-(42780000,00000000,ffffffff) AND *-(7f800000,00000000,7fc00000) AND *-(7fffffff,00000000,ffc00000) AND *-(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvmsubasp *-(00000000,00000000,00000000) AND *-(7f800000,00000000,7f800000) AND *-(7fbfffff,00000000,00000000) AND *-(7fc00000,00000000,00000000) => 00000000 7fc00000 7fffffff 7fc00000
+#8: xvmsubasp *-(ff800000,00000000,80000000) AND *-(c683287b,00000000,7f800000) AND *-(80000000,00000000,ff800000) AND *-(00000000,00000000,7fbfffff) => 7f800000 7fc00000 7fc00000 7fffffff
+#9: xvmsubasp *-(42780000,00000000,ffbfffff) AND *-(7f800000,00000000,7fc00000) AND *-(7fbfffff,00000000,ffc00000) AND *-(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvmsubasp *-(ff800000,7f800000,42780000) AND *-(c683287b,7f800000,00000000) AND *-(80000000,7f800000,7f800000) AND *-(00000000,7f800000,00000000) => 7f800000 7fc00000 7f800000 7fc00000
-#11: xvmsubasp *-(00000000,7f800000,00000000) AND *-(7f800000,7f800000,80000000) AND *-(7fffffff,7f800000,7f800000) AND *-(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvmsubasp *-(ff800000,ffffffff,7fffffff) AND *-(c683287b,ffffffff,ffffffff) AND *-(80000000,ffc00000,7fc00000) AND *-(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvmsubasp *-(00000000,ffffffff,3ec00000) AND *-(7f800000,ffffffff,42780000) AND *-(7fffffff,ffffffff,00000000) AND *-(7fc00000,ffffffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvmsubasp *-(00000000,7f800000,00000000) AND *-(7f800000,7f800000,80000000) AND *-(7fbfffff,7f800000,7f800000) AND *-(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvmsubasp *-(ff800000,ffbfffff,7fbfffff) AND *-(c683287b,ffbfffff,ffbfffff) AND *-(80000000,ffc00000,7fc00000) AND *-(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvmsubasp *-(00000000,ffbfffff,3ec00000) AND *-(7f800000,ffbfffff,42780000) AND *-(7fbfffff,ffbfffff,00000000) AND *-(7fc00000,ffbfffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvmsubasp *-(ff800000,ffc00000,00000000) AND *-(c683287b,ffc00000,00000000) AND *-(80000000,ffc00000,80000000) AND *-(49c1288d,49192c2d,7f800000) => ffc00000 ffc00000 ffc00000 7f800000
-#15: xvmsubasp *-(49c1288d,49192c2d,ff800000) AND *-(7fc00000,7fffffff,7fffffff) AND *-(7fc00000,7fc00000,ffffffff) AND *-(ffc00000,7fc00000,7fc00000) => ff800000 7fffffff 7fc00000 7fc00000
+#15: xvmsubasp *-(49c1288d,49192c2d,ff800000) AND *-(7fc00000,7fbfffff,7fbfffff) AND *-(7fc00000,7fc00000,ffbfffff) AND *-(ffc00000,7fc00000,7fc00000) => ff800000 7fffffff 7fc00000 7fc00000
 
 #0: xvmsubmsp *-(3ec00000,ff800000,ff800000) AND *-(42780000,ff800000,c683287b) AND *-(00000000,49192c2d,49c1288d) AND *-(7f800000,ff800000,00000000) => 7fc00000 ff800000 c9c1288d ff800000
-#1: xvmsubmsp *-(00000000,ff800000,00000000) AND *-(00000000,ff800000,7f800000) AND *-(80000000,ff800000,7fffffff) AND *-(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvmsubmsp *-(ff800000,c683287b,ff800000) AND *-(7fffffff,c683287b,c683287b) AND *-(ffffffff,c683287b,80000000) AND *-(7fc00000,c683287b,00000000) => 7f800000 7fffffff ffffffff 7fc00000
-#3: xvmsubmsp *-(ffc00000,c683287b,00000000) AND *-(80000000,c683287b,7f800000) AND *-(c683287b,c683287b,7fffffff) AND *-(49192c2d,c683287b,7fc00000) => ffc00000 ff800000 7fffffff 7fc00000
+#1: xvmsubmsp *-(00000000,ff800000,00000000) AND *-(00000000,ff800000,7f800000) AND *-(80000000,ff800000,7fbfffff) AND *-(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvmsubmsp *-(ff800000,c683287b,ff800000) AND *-(7fbfffff,c683287b,c683287b) AND *-(ffbfffff,c683287b,80000000) AND *-(7fc00000,c683287b,00000000) => 7f800000 7fffffff ffffffff 7fc00000
+#3: xvmsubmsp *-(ffc00000,c683287b,00000000) AND *-(80000000,c683287b,7f800000) AND *-(c683287b,c683287b,7fbfffff) AND *-(49192c2d,c683287b,7fc00000) => ffc00000 ff800000 7fffffff 7fc00000
 #4: xvmsubmsp *-(7f800000,80000000,ff800000) AND *-(00000000,80000000,c683287b) AND *-(00000000,80000000,80000000) AND *-(80000000,80000000,00000000) => 7fc00000 4683287b 00000000 00000000
-#5: xvmsubmsp *-(7f800000,80000000,00000000) AND *-(ff800000,80000000,7f800000) AND *-(7fffffff,80000000,7fffffff) AND *-(ffffffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvmsubmsp *-(7f800000,80000000,00000000) AND *-(ff800000,80000000,7f800000) AND *-(7fbfffff,80000000,7fbfffff) AND *-(ffbfffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvmsubmsp *-(7fc00000,00000000,ff800000) AND *-(ffc00000,00000000,c683287b) AND *-(80000000,00000000,80000000) AND *-(c683287b,00000000,00000000) => 7fc00000 ffc00000 00000000 80000000
-#7: xvmsubmsp *-(00000000,00000000,00000000) AND *-(7f800000,00000000,7f800000) AND *-(00000000,00000000,7fffffff) AND *-(00000000,00000000,7fc00000) => 00000000 7fc00000 7fffffff 7fc00000
-#8: xvmsubmsp *-(80000000,00000000,ff800000) AND *-(7f800000,00000000,c683287b) AND *-(ff800000,00000000,80000000) AND *-(7fffffff,00000000,00000000) => 7f800000 7fc00000 7fc00000 7fffffff
-#9: xvmsubmsp *-(ffffffff,00000000,42780000) AND *-(7fc00000,00000000,7f800000) AND *-(ffc00000,00000000,7fffffff) AND *-(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvmsubmsp *-(00000000,00000000,00000000) AND *-(7f800000,00000000,7f800000) AND *-(00000000,00000000,7fbfffff) AND *-(00000000,00000000,7fc00000) => 00000000 7fc00000 7fffffff 7fc00000
+#8: xvmsubmsp *-(80000000,00000000,ff800000) AND *-(7f800000,00000000,c683287b) AND *-(ff800000,00000000,80000000) AND *-(7fbfffff,00000000,00000000) => 7f800000 7fc00000 7fc00000 7fffffff
+#9: xvmsubmsp *-(ffbfffff,00000000,42780000) AND *-(7fc00000,00000000,7f800000) AND *-(ffc00000,00000000,7fbfffff) AND *-(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvmsubmsp *-(42780000,7f800000,ff800000) AND *-(00000000,7f800000,c683287b) AND *-(7f800000,7f800000,80000000) AND *-(00000000,7f800000,00000000) => 7f800000 7fc00000 7f800000 7fc00000
-#11: xvmsubmsp *-(00000000,7f800000,00000000) AND *-(80000000,7f800000,7f800000) AND *-(7f800000,7f800000,7fffffff) AND *-(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvmsubmsp *-(7fffffff,ffffffff,ff800000) AND *-(ffffffff,ffffffff,c683287b) AND *-(7fc00000,ffc00000,80000000) AND *-(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvmsubmsp *-(3ec00000,ffffffff,00000000) AND *-(42780000,ffffffff,7f800000) AND *-(00000000,ffffffff,7fffffff) AND *-(7f800000,ffffffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvmsubmsp *-(00000000,7f800000,00000000) AND *-(80000000,7f800000,7f800000) AND *-(7f800000,7f800000,7fbfffff) AND *-(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvmsubmsp *-(7fbfffff,ffbfffff,ff800000) AND *-(ffbfffff,ffbfffff,c683287b) AND *-(7fc00000,ffc00000,80000000) AND *-(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvmsubmsp *-(3ec00000,ffbfffff,00000000) AND *-(42780000,ffbfffff,7f800000) AND *-(00000000,ffbfffff,7fbfffff) AND *-(7f800000,ffbfffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvmsubmsp *-(00000000,ffc00000,ff800000) AND *-(00000000,ffc00000,c683287b) AND *-(80000000,ffc00000,80000000) AND *-(7f800000,49192c2d,49c1288d) => ffc00000 ffc00000 ffc00000 7f800000
-#15: xvmsubmsp *-(ff800000,49192c2d,49c1288d) AND *-(7fffffff,7fffffff,7fc00000) AND *-(ffffffff,7fc00000,7fc00000) AND *-(7fc00000,7fc00000,ffc00000) => ff800000 7fffffff 7fc00000 7fc00000
+#15: xvmsubmsp *-(ff800000,49192c2d,49c1288d) AND *-(7fbfffff,7fbfffff,7fc00000) AND *-(ffbfffff,7fc00000,7fc00000) AND *-(7fc00000,7fc00000,ffc00000) => ff800000 7fffffff 7fc00000 7fc00000
 
 #0: xvnmsubadp !*-(fff0000000000000,fff0000000000000,3fd8000000000000) AND !*-(c0d0650f5a07b353,fff0000000000000,404f000000000000) => 7ff8000000000000 7ff0000000000000
 #1: xvnmsubadp !*-(41382511a2000000,41232585a9900000,0018000000b77501) AND !*-(0000000000000000,fff0000000000000,7fe800000000051b) => 41382511a2000000 7ff0000000000000
@@ -1377,38 +1377,38 @@ Test floating point arithmetic instructions -- with a{d|s}p or m{d|s}p
 #31: xvnmsubmdp !*-(0018000000b77501,7ff8000000000000,7ff8000000000000) AND !*-(7fe800000000051b,7ff8000000000000,fff8000000000000) => 7ff8000000000000 7ff8000000000000
 
 #0: xvnmsubasp !*-(ff800000,ff800000,3ec00000) AND !*-(c683287b,ff800000,42780000) AND !*-(49c1288d,49192c2d,00000000) AND !*-(00000000,ff800000,7f800000) => 7fc00000 7f800000 49c1288d 7f800000
-#1: xvnmsubasp !*-(00000000,ff800000,00000000) AND !*-(7f800000,ff800000,00000000) AND !*-(7fffffff,ff800000,80000000) AND !*-(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvnmsubasp !*-(ff800000,c683287b,ff800000) AND !*-(c683287b,c683287b,7fffffff) AND !*-(80000000,c683287b,ffffffff) AND !*-(00000000,c683287b,7fc00000) => ff800000 7fffffff ffffffff 7fc00000
-#3: xvnmsubasp !*-(00000000,c683287b,ffc00000) AND !*-(7f800000,c683287b,80000000) AND !*-(7fffffff,c683287b,c683287b) AND !*-(7fc00000,c683287b,49192c2d) => ffc00000 7f800000 7fffffff 7fc00000
+#1: xvnmsubasp !*-(00000000,ff800000,00000000) AND !*-(7f800000,ff800000,00000000) AND !*-(7fbfffff,ff800000,80000000) AND !*-(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvnmsubasp !*-(ff800000,c683287b,ff800000) AND !*-(c683287b,c683287b,7fbfffff) AND !*-(80000000,c683287b,ffbfffff) AND !*-(00000000,c683287b,7fc00000) => ff800000 7fffffff ffffffff 7fc00000
+#3: xvnmsubasp !*-(00000000,c683287b,ffc00000) AND !*-(7f800000,c683287b,80000000) AND !*-(7fbfffff,c683287b,c683287b) AND !*-(7fc00000,c683287b,49192c2d) => ffc00000 7f800000 7fffffff 7fc00000
 #4: xvnmsubasp !*-(ff800000,80000000,7f800000) AND !*-(c683287b,80000000,00000000) AND !*-(80000000,80000000,00000000) AND !*-(00000000,80000000,80000000) => 7fc00000 c683287b 80000000 80000000
-#5: xvnmsubasp !*-(00000000,80000000,7f800000) AND !*-(7f800000,80000000,ff800000) AND !*-(7fffffff,80000000,7fffffff) AND !*-(7fc00000,80000000,ffffffff) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvnmsubasp !*-(00000000,80000000,7f800000) AND !*-(7f800000,80000000,ff800000) AND !*-(7fbfffff,80000000,7fbfffff) AND !*-(7fc00000,80000000,ffbfffff) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvnmsubasp !*-(ff800000,00000000,7fc00000) AND !*-(c683287b,00000000,ffc00000) AND !*-(80000000,00000000,80000000) AND !*-(00000000,00000000,c683287b) => 7fc00000 ffc00000 80000000 00000000
-#7: xvnmsubasp !*-(00000000,00000000,00000000) AND !*-(7f800000,00000000,7f800000) AND !*-(7fffffff,00000000,00000000) AND !*-(7fc00000,00000000,00000000) => 80000000 7fc00000 7fffffff 7fc00000
-#8: xvnmsubasp !*-(ff800000,00000000,80000000) AND !*-(c683287b,00000000,7f800000) AND !*-(80000000,00000000,ff800000) AND !*-(00000000,00000000,7fffffff) => ff800000 7fc00000 7fc00000 7fffffff
-#9: xvnmsubasp !*-(42780000,00000000,ffffffff) AND !*-(7f800000,00000000,7fc00000) AND !*-(7fffffff,00000000,ffc00000) AND !*-(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvnmsubasp !*-(00000000,00000000,00000000) AND !*-(7f800000,00000000,7f800000) AND !*-(7fbfffff,00000000,00000000) AND !*-(7fc00000,00000000,00000000) => 80000000 7fc00000 7fffffff 7fc00000
+#8: xvnmsubasp !*-(ff800000,00000000,80000000) AND !*-(c683287b,00000000,7f800000) AND !*-(80000000,00000000,ff800000) AND !*-(00000000,00000000,7fbfffff) => ff800000 7fc00000 7fc00000 7fffffff
+#9: xvnmsubasp !*-(42780000,00000000,ffbfffff) AND !*-(7f800000,00000000,7fc00000) AND !*-(7fbfffff,00000000,ffc00000) AND !*-(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvnmsubasp !*-(ff800000,7f800000,42780000) AND !*-(c683287b,7f800000,00000000) AND !*-(80000000,7f800000,7f800000) AND !*-(00000000,7f800000,00000000) => ff800000 7fc00000 ff800000 7fc00000
-#11: xvnmsubasp !*-(00000000,7f800000,00000000) AND !*-(7f800000,7f800000,80000000) AND !*-(7fffffff,7f800000,7f800000) AND !*-(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvnmsubasp !*-(ff800000,ffffffff,7fffffff) AND !*-(c683287b,ffffffff,ffffffff) AND !*-(80000000,ffc00000,7fc00000) AND !*-(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvnmsubasp !*-(00000000,ffffffff,3ec00000) AND !*-(7f800000,ffffffff,42780000) AND !*-(7fffffff,ffffffff,00000000) AND !*-(7fc00000,ffffffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvnmsubasp !*-(00000000,7f800000,00000000) AND !*-(7f800000,7f800000,80000000) AND !*-(7fbfffff,7f800000,7f800000) AND !*-(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvnmsubasp !*-(ff800000,ffbfffff,7fbfffff) AND !*-(c683287b,ffbfffff,ffbfffff) AND !*-(80000000,ffc00000,7fc00000) AND !*-(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvnmsubasp !*-(00000000,ffbfffff,3ec00000) AND !*-(7f800000,ffbfffff,42780000) AND !*-(7fbfffff,ffbfffff,00000000) AND !*-(7fc00000,ffbfffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvnmsubasp !*-(ff800000,ffc00000,00000000) AND !*-(c683287b,ffc00000,00000000) AND !*-(80000000,ffc00000,80000000) AND !*-(49c1288d,49192c2d,7f800000) => ffc00000 ffc00000 ffc00000 ff800000
-#15: xvnmsubasp !*-(49c1288d,49192c2d,ff800000) AND !*-(7fc00000,7fffffff,7fffffff) AND !*-(7fc00000,7fc00000,ffffffff) AND !*-(ffc00000,7fc00000,7fc00000) => 7f800000 7fffffff 7fc00000 7fc00000
+#15: xvnmsubasp !*-(49c1288d,49192c2d,ff800000) AND !*-(7fc00000,7fbfffff,7fbfffff) AND !*-(7fc00000,7fc00000,ffbfffff) AND !*-(ffc00000,7fc00000,7fc00000) => 7f800000 7fffffff 7fc00000 7fc00000
 
 #0: xvnmsubmsp !*-(3ec00000,ff800000,ff800000) AND !*-(42780000,ff800000,c683287b) AND !*-(00000000,49192c2d,49c1288d) AND !*-(7f800000,ff800000,00000000) => 7fc00000 7f800000 49c1288d 7f800000
-#1: xvnmsubmsp !*-(00000000,ff800000,00000000) AND !*-(00000000,ff800000,7f800000) AND !*-(80000000,ff800000,7fffffff) AND !*-(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvnmsubmsp !*-(ff800000,c683287b,ff800000) AND !*-(7fffffff,c683287b,c683287b) AND !*-(ffffffff,c683287b,80000000) AND !*-(7fc00000,c683287b,00000000) => ff800000 7fffffff ffffffff 7fc00000
-#3: xvnmsubmsp !*-(ffc00000,c683287b,00000000) AND !*-(80000000,c683287b,7f800000) AND !*-(c683287b,c683287b,7fffffff) AND !*-(49192c2d,c683287b,7fc00000) => ffc00000 7f800000 7fffffff 7fc00000
+#1: xvnmsubmsp !*-(00000000,ff800000,00000000) AND !*-(00000000,ff800000,7f800000) AND !*-(80000000,ff800000,7fbfffff) AND !*-(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvnmsubmsp !*-(ff800000,c683287b,ff800000) AND !*-(7fbfffff,c683287b,c683287b) AND !*-(ffbfffff,c683287b,80000000) AND !*-(7fc00000,c683287b,00000000) => ff800000 7fffffff ffffffff 7fc00000
+#3: xvnmsubmsp !*-(ffc00000,c683287b,00000000) AND !*-(80000000,c683287b,7f800000) AND !*-(c683287b,c683287b,7fbfffff) AND !*-(49192c2d,c683287b,7fc00000) => ffc00000 7f800000 7fffffff 7fc00000
 #4: xvnmsubmsp !*-(7f800000,80000000,ff800000) AND !*-(00000000,80000000,c683287b) AND !*-(00000000,80000000,80000000) AND !*-(80000000,80000000,00000000) => 7fc00000 c683287b 80000000 80000000
-#5: xvnmsubmsp !*-(7f800000,80000000,00000000) AND !*-(ff800000,80000000,7f800000) AND !*-(7fffffff,80000000,7fffffff) AND !*-(ffffffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvnmsubmsp !*-(7f800000,80000000,00000000) AND !*-(ff800000,80000000,7f800000) AND !*-(7fbfffff,80000000,7fbfffff) AND !*-(ffbfffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvnmsubmsp !*-(7fc00000,00000000,ff800000) AND !*-(ffc00000,00000000,c683287b) AND !*-(80000000,00000000,80000000) AND !*-(c683287b,00000000,00000000) => 7fc00000 ffc00000 80000000 00000000
-#7: xvnmsubmsp !*-(00000000,00000000,00000000) AND !*-(7f800000,00000000,7f800000) AND !*-(00000000,00000000,7fffffff) AND !*-(00000000,00000000,7fc00000) => 80000000 7fc00000 7fffffff 7fc00000
-#8: xvnmsubmsp !*-(80000000,00000000,ff800000) AND !*-(7f800000,00000000,c683287b) AND !*-(ff800000,00000000,80000000) AND !*-(7fffffff,00000000,00000000) => ff800000 7fc00000 7fc00000 7fffffff
-#9: xvnmsubmsp !*-(ffffffff,00000000,42780000) AND !*-(7fc00000,00000000,7f800000) AND !*-(ffc00000,00000000,7fffffff) AND !*-(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvnmsubmsp !*-(00000000,00000000,00000000) AND !*-(7f800000,00000000,7f800000) AND !*-(00000000,00000000,7fbfffff) AND !*-(00000000,00000000,7fc00000) => 80000000 7fc00000 7fffffff 7fc00000
+#8: xvnmsubmsp !*-(80000000,00000000,ff800000) AND !*-(7f800000,00000000,c683287b) AND !*-(ff800000,00000000,80000000) AND !*-(7fbfffff,00000000,00000000) => ff800000 7fc00000 7fc00000 7fffffff
+#9: xvnmsubmsp !*-(ffbfffff,00000000,42780000) AND !*-(7fc00000,00000000,7f800000) AND !*-(ffc00000,00000000,7fbfffff) AND !*-(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvnmsubmsp !*-(42780000,7f800000,ff800000) AND !*-(00000000,7f800000,c683287b) AND !*-(7f800000,7f800000,80000000) AND !*-(00000000,7f800000,00000000) => ff800000 7fc00000 ff800000 7fc00000
-#11: xvnmsubmsp !*-(00000000,7f800000,00000000) AND !*-(80000000,7f800000,7f800000) AND !*-(7f800000,7f800000,7fffffff) AND !*-(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvnmsubmsp !*-(7fffffff,ffffffff,ff800000) AND !*-(ffffffff,ffffffff,c683287b) AND !*-(7fc00000,ffc00000,80000000) AND !*-(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvnmsubmsp !*-(3ec00000,ffffffff,00000000) AND !*-(42780000,ffffffff,7f800000) AND !*-(00000000,ffffffff,7fffffff) AND !*-(7f800000,ffffffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvnmsubmsp !*-(00000000,7f800000,00000000) AND !*-(80000000,7f800000,7f800000) AND !*-(7f800000,7f800000,7fbfffff) AND !*-(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvnmsubmsp !*-(7fbfffff,ffbfffff,ff800000) AND !*-(ffbfffff,ffbfffff,c683287b) AND !*-(7fc00000,ffc00000,80000000) AND !*-(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvnmsubmsp !*-(3ec00000,ffbfffff,00000000) AND !*-(42780000,ffbfffff,7f800000) AND !*-(00000000,ffbfffff,7fbfffff) AND !*-(7f800000,ffbfffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvnmsubmsp !*-(00000000,ffc00000,ff800000) AND !*-(00000000,ffc00000,c683287b) AND !*-(80000000,ffc00000,80000000) AND !*-(7f800000,49192c2d,49c1288d) => ffc00000 ffc00000 ffc00000 ff800000
-#15: xvnmsubmsp !*-(ff800000,49192c2d,49c1288d) AND !*-(7fffffff,7fffffff,7fc00000) AND !*-(ffffffff,7fc00000,7fc00000) AND !*-(7fc00000,7fc00000,ffc00000) => 7f800000 7fffffff 7fc00000 7fc00000
+#15: xvnmsubmsp !*-(ff800000,49192c2d,49c1288d) AND !*-(7fbfffff,7fbfffff,7fc00000) AND !*-(ffbfffff,7fc00000,7fc00000) AND !*-(7fc00000,7fc00000,ffc00000) => 7f800000 7fffffff 7fc00000 7fc00000
 
 
 Test scalar floating point arithmetic instructions

diff --git a/none/tests/ppc32/test_isa_2_06_part3.c b/none/tests/ppc32/test_isa_2_06_part3.c
index a3639a66a61b0c48020ec624dafd07f111b7a83a..13a653b4f1e2ab92f41d1b3f39d40a065e6464d7 100644 (file)
--- a/none/tests/ppc32/test_isa_2_06_part3.c
+++ b/none/tests/ppc32/test_isa_2_06_part3.c
@@ -107,6 +107,14 @@ static inline void register_farg (void *farg,
               s, _exp, mant, *(uint64_t *)farg, *(double *)farg);
 }
 
+static inline void register_sp_farg (void *farg,
+                                     int s, uint16_t _exp, uint32_t mant)
+{
+   uint32_t tmp;
+   tmp = ((uint32_t)s << 31) | ((uint32_t)_exp << 23) | mant;
+   *(uint32_t *)farg = tmp;
+}
+
 
 typedef struct fp_test_args {
    int fra_idx;
@@ -217,6 +225,7 @@ static void build_special_fargs_table(void)
 */
 
    uint64_t mant;
+   uint32_t mant_sp;
    uint16_t _exp;
    int s;
    int j, i = 0;
@@ -287,28 +296,42 @@ static void build_special_fargs_table(void)
    mant = 0x0000000000000ULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
 
-   /* +QNaN     : 0 0x7FF 0x7FFFFFFFFFFFF */
+   /*
+    * This comment applies to values #9 and #10 below:
+    * When src is a SNaN, it's converted to a QNaN first before rounding to single-precision,
+    * so we can't just copy the double-precision value to the corresponding slot in the
+    * single-precision array (i.e., in the loop at the end of this function).  Instead, we
+    * have to manually set the bits using register_sp_farg().
+    */
+
+   /* +SNaN     : 0 0x7FF 0x7FFFFFFFFFFFF */
    // #9
    s = 0;
    _exp = 0x7FF;
    mant = 0x7FFFFFFFFFFFFULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
+   _exp = 0xff;
+   mant_sp = 0x3FFFFF;
+   register_sp_farg(&spec_sp_fargs[i-1], s, _exp, mant_sp);
 
-   /* -QNaN     : 1 0x7FF 0x7FFFFFFFFFFFF */
+   /* -SNaN     : 1 0x7FF 0x7FFFFFFFFFFFF */
    // #10
    s = 1;
    _exp = 0x7FF;
    mant = 0x7FFFFFFFFFFFFULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
+   _exp = 0xff;
+   mant_sp = 0x3FFFFF;
+   register_sp_farg(&spec_sp_fargs[i-1], s, _exp, mant_sp);
 
-   /* +SNaN     : 0 0x7FF 0x8000000000000 */
+   /* +QNaN     : 0 0x7FF 0x8000000000000 */
    // #11
    s = 0;
    _exp = 0x7FF;
    mant = 0x8000000000000ULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
 
-   /* -SNaN     : 1 0x7FF 0x8000000000000 */
+   /* -QNaN     : 1 0x7FF 0x8000000000000 */
    // #12
    s = 1;
    _exp = 0x7FF;
@@ -362,7 +385,8 @@ static void build_special_fargs_table(void)
 
    nb_special_fargs = i;
    for (j = 0; j < i; j++) {
-      spec_sp_fargs[j] = spec_fargs[j];
+      if (!(j == 9 || j == 10))
+         spec_sp_fargs[j] = spec_fargs[j];
    }
 }
 

diff --git a/none/tests/ppc32/test_isa_2_06_part3.stdout.exp b/none/tests/ppc32/test_isa_2_06_part3.stdout.exp
index df25d908235a149f8b39d204aff5caf848a98826..7e713f1e43d2946cc1ba8f9a043fb35030a96cab 100644 (file)
--- a/none/tests/ppc32/test_isa_2_06_part3.stdout.exp
+++ b/none/tests/ppc32/test_isa_2_06_part3.stdout.exp
@@ -59,7 +59,7 @@ Test VSX vector and scalar single argument instructions
 
 #0: xvrsqrtesp 1/x-sqrt(3ec00000) ==> PASS); 1/x-sqrt(42780000) ==> PASS); 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(7f800000) ==> PASS)
 #1: xvrsqrtesp 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(80000000) ==> PASS); 1/x-sqrt(7f800000) ==> PASS)
-#2: xvrsqrtesp 1/x-sqrt(ff800000) ==> PASS); 1/x-sqrt(7fffffff) ==> PASS); 1/x-sqrt(ffffffff) ==> PASS); 1/x-sqrt(7fc00000) ==> PASS)
+#2: xvrsqrtesp 1/x-sqrt(ff800000) ==> PASS); 1/x-sqrt(7fbfffff) ==> PASS); 1/x-sqrt(ffbfffff) ==> PASS); 1/x-sqrt(7fc00000) ==> PASS)
 #3: xvrsqrtesp 1/x-sqrt(ffc00000) ==> PASS); 1/x-sqrt(80000000) ==> PASS); 1/x-sqrt(c683287b) ==> PASS); 1/x-sqrt(49192c2d) ==> PASS)
 #4: xvrsqrtesp 1/x-sqrt(49c1288d) ==> PASS); 1/x-sqrt(418977ad) ==> PASS); 1/x-sqrt(428a5faf) ==> PASS); 1/x-sqrt(44bb5fcc) ==> PASS)
 
@@ -75,7 +75,7 @@ Test VSX vector and scalar single argument instructions
 
 #0: xvsqrtsp sqrt(3ec00000) = 3f1cc470; sqrt(42780000) = 40fbf7dc; sqrt(00000000) = 00000000; sqrt(7f800000) = 7f800000
 #1: xvsqrtsp sqrt(00000000) = 00000000; sqrt(00000000) = 00000000; sqrt(80000000) = 80000000; sqrt(7f800000) = 7f800000
-#2: xvsqrtsp sqrt(ff800000) = 7fc00000; sqrt(7fffffff) = 7ffffffc; sqrt(ffffffff) = fffffffc; sqrt(7fc00000) = 7fc00000
+#2: xvsqrtsp sqrt(ff800000) = 7fc00000; sqrt(7fbfffff) = 7ffffffc; sqrt(ffbfffff) = fffffffc; sqrt(7fc00000) = 7fc00000
 #3: xvsqrtsp sqrt(ffc00000) = ffc00000; sqrt(80000000) = 80000000; sqrt(c683287b) = 7fc00000; sqrt(49192c2d) = 44460548
 #4: xvsqrtsp sqrt(49c1288d) = 449d3d50; sqrt(418977ad) = 4084a638; sqrt(428a5faf) = 410515f8; sqrt(44bb5fcc) = 421ade08
 
@@ -130,8 +130,8 @@ Test VSX vector and scalar single argument instructions
 #6: xscvspdp conv(80000000) = 8000000000000000
 #7: xscvspdp conv(7f800000) = 7ff0000000000000
 #8: xscvspdp conv(ff800000) = fff0000000000000
-#9: xscvspdp conv(7fffffff) = 7fffffffe0000000
-#10: xscvspdp conv(ffffffff) = ffffffffe0000000
+#9: xscvspdp conv(7fbfffff) = 7fffffffe0000000
+#10: xscvspdp conv(ffbfffff) = ffffffffe0000000
 #11: xscvspdp conv(7fc00000) = 7ff8000000000000
 #12: xscvspdp conv(ffc00000) = fff8000000000000
 #13: xscvspdp conv(80000000) = 8000000000000000
@@ -179,8 +179,8 @@ Test VSX vector and scalar single argument instructions
 #1: xvcvspdp conv(00000000) = 0000000000000000; conv(7f800000) = 7ff0000000000000
 #2: xvcvspdp conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
 #3: xvcvspdp conv(80000000) = 8000000000000000; conv(7f800000) = 7ff0000000000000
-#4: xvcvspdp conv(ff800000) = fff0000000000000; conv(7fffffff) = 7fffffffe0000000
-#5: xvcvspdp conv(ffffffff) = ffffffffe0000000; conv(7fc00000) = 7ff8000000000000
+#4: xvcvspdp conv(ff800000) = fff0000000000000; conv(7fbfffff) = 7fffffffe0000000
+#5: xvcvspdp conv(ffbfffff) = ffffffffe0000000; conv(7fc00000) = 7ff8000000000000
 #6: xvcvspdp conv(ffc00000) = fff8000000000000; conv(80000000) = 8000000000000000
 #7: xvcvspdp conv(c683287b) = c0d0650f60000000; conv(49192c2d) = 41232585a0000000
 #8: xvcvspdp conv(49c1288d) = 41382511a0000000; conv(418977ad) = 40312ef5a0000000
@@ -190,8 +190,8 @@ Test VSX vector and scalar single argument instructions
 #1: xvcvspsxds conv(00000000) = 0000000000000000; conv(7f800000) = 7fffffffffffffff
 #2: xvcvspsxds conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
 #3: xvcvspsxds conv(80000000) = 0000000000000000; conv(7f800000) = 7fffffffffffffff
-#4: xvcvspsxds conv(ff800000) = 8000000000000000; conv(7fffffff) = 8000000000000000
-#5: xvcvspsxds conv(ffffffff) = 8000000000000000; conv(7fc00000) = 8000000000000000
+#4: xvcvspsxds conv(ff800000) = 8000000000000000; conv(7fbfffff) = 8000000000000000
+#5: xvcvspsxds conv(ffbfffff) = 8000000000000000; conv(7fc00000) = 8000000000000000
 #6: xvcvspsxds conv(ffc00000) = 8000000000000000; conv(80000000) = 0000000000000000
 #7: xvcvspsxds conv(c683287b) = ffffffffffffbe6c; conv(49192c2d) = 00000000000992c2
 #8: xvcvspsxds conv(49c1288d) = 0000000000182511; conv(418977ad) = 0000000000000011
@@ -212,8 +212,8 @@ Test VSX vector and scalar single argument instructions
 #1: xvcvspuxds conv(00000000) = 0000000000000000; conv(7f800000) = ffffffffffffffff
 #2: xvcvspuxds conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
 #3: xvcvspuxds conv(80000000) = 0000000000000000; conv(7f800000) = ffffffffffffffff
-#4: xvcvspuxds conv(ff800000) = 0000000000000000; conv(7fffffff) = 0000000000000000
-#5: xvcvspuxds conv(ffffffff) = 0000000000000000; conv(7fc00000) = 0000000000000000
+#4: xvcvspuxds conv(ff800000) = 0000000000000000; conv(7fbfffff) = 0000000000000000
+#5: xvcvspuxds conv(ffbfffff) = 0000000000000000; conv(7fc00000) = 0000000000000000
 #6: xvcvspuxds conv(ffc00000) = 0000000000000000; conv(80000000) = 0000000000000000
 #7: xvcvspuxds conv(c683287b) = 0000000000000000; conv(49192c2d) = 00000000000992c2
 #8: xvcvspuxds conv(49c1288d) = 0000000000182511; conv(418977ad) = 0000000000000011
@@ -221,7 +221,7 @@ Test VSX vector and scalar single argument instructions
 
 #0: xvcvspuxws conv(3ec00000) = 00000000; conv(42780000) = 0000003e; conv(00000000) = 00000000; conv(7f800000) = ffffffff
 #1: xvcvspuxws conv(00000000) = 00000000; conv(00000000) = 00000000; conv(80000000) = 00000000; conv(7f800000) = ffffffff
-#2: xvcvspuxws conv(ff800000) = 00000000; conv(7fffffff) = 00000000; conv(ffffffff) = 00000000; conv(7fc00000) = 00000000
+#2: xvcvspuxws conv(ff800000) = 00000000; conv(7fbfffff) = 00000000; conv(ffbfffff) = 00000000; conv(7fc00000) = 00000000
 #3: xvcvspuxws conv(ffc00000) = 00000000; conv(80000000) = 00000000; conv(c683287b) = 00000000; conv(49192c2d) = 000992c2
 #4: xvcvspuxws conv(49c1288d) = 00182511; conv(418977ad) = 00000011; conv(428a5faf) = 00000045; conv(44bb5fcc) = 000005da
 
@@ -323,13 +323,13 @@ Test VSX vector and scalar single argument instructions
 
 #0: xvabssp abs(3ec00000) = 3ec00000; abs(42780000) = 42780000; abs(00000000) = 00000000; abs(7f800000) = 7f800000
 #1: xvabssp abs(00000000) = 00000000; abs(00000000) = 00000000; abs(80000000) = 00000000; abs(7f800000) = 7f800000
-#2: xvabssp abs(ff800000) = 7f800000; abs(7fffffff) = 7fffffff; abs(ffffffff) = 7fffffff; abs(7fc00000) = 7fc00000
+#2: xvabssp abs(ff800000) = 7f800000; abs(7fbfffff) = 7fbfffff; abs(ffbfffff) = 7fbfffff; abs(7fc00000) = 7fc00000
 #3: xvabssp abs(ffc00000) = 7fc00000; abs(80000000) = 00000000; abs(c683287b) = 4683287b; abs(49192c2d) = 49192c2d
 #4: xvabssp abs(49c1288d) = 49c1288d; abs(418977ad) = 418977ad; abs(428a5faf) = 428a5faf; abs(44bb5fcc) = 44bb5fcc
 
 #0: xvnabssp nabs(3ec00000) = bec00000; nabs(42780000) = c2780000; nabs(00000000) = 80000000; nabs(7f800000) = ff800000
 #1: xvnabssp nabs(00000000) = 80000000; nabs(00000000) = 80000000; nabs(80000000) = 80000000; nabs(7f800000) = ff800000
-#2: xvnabssp nabs(ff800000) = ff800000; nabs(7fffffff) = ffffffff; nabs(ffffffff) = ffffffff; nabs(7fc00000) = ffc00000
+#2: xvnabssp nabs(ff800000) = ff800000; nabs(7fbfffff) = ffbfffff; nabs(ffbfffff) = ffbfffff; nabs(7fc00000) = ffc00000
 #3: xvnabssp nabs(ffc00000) = ffc00000; nabs(80000000) = 80000000; nabs(c683287b) = c683287b; nabs(49192c2d) = c9192c2d
 #4: xvnabssp nabs(49c1288d) = c9c1288d; nabs(418977ad) = c18977ad; nabs(428a5faf) = c28a5faf; nabs(44bb5fcc) = c4bb5fcc
 
@@ -390,31 +390,31 @@ Test VSX vector and scalar single argument instructions
 
 #0: xvrspi round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
 #1: xvrspi round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
-#2: xvrspi round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#2: xvrspi round(ff800000) = ff800000; round(7fbfffff) = 7fffffff; round(ffbfffff) = ffffffff; round(7fc00000) = 7fc00000
 #3: xvrspi round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
 #4: xvrspi round(49c1288d) = 49c12890; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb6000
 
 #0: xvrspic round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
 #1: xvrspic round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
-#2: xvrspic round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#2: xvrspic round(ff800000) = ff800000; round(7fbfffff) = 7fffffff; round(ffbfffff) = ffffffff; round(7fc00000) = 7fc00000
 #3: xvrspic round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
 #4: xvrspic round(49c1288d) = 49c12890; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb6000
 
 #0: xvrspim round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
 #1: xvrspim round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
-#2: xvrspim round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#2: xvrspim round(ff800000) = ff800000; round(7fbfffff) = 7fffffff; round(ffbfffff) = ffffffff; round(7fc00000) = 7fc00000
 #3: xvrspim round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832a00; round(49192c2d) = 49192c20
 #4: xvrspim round(49c1288d) = 49c12888; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb4000
 
 #0: xvrspip round(3ec00000) = 3f800000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
 #1: xvrspip round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
-#2: xvrspip round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#2: xvrspip round(ff800000) = ff800000; round(7fbfffff) = 7fffffff; round(ffbfffff) = ffffffff; round(7fc00000) = 7fc00000
 #3: xvrspip round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
 #4: xvrspip round(49c1288d) = 49c12890; round(418977ad) = 41900000; round(428a5faf) = 428c0000; round(44bb5fcc) = 44bb6000
 
 #0: xvrspiz round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
 #1: xvrspiz round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
-#2: xvrspiz round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#2: xvrspiz round(ff800000) = ff800000; round(7fbfffff) = 7fffffff; round(ffbfffff) = ffffffff; round(7fc00000) = 7fc00000
 #3: xvrspiz round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c20
 #4: xvrspiz round(49c1288d) = 49c12888; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb4000
 
@@ -543,7 +543,7 @@ Test vector and scalar tdiv and tsqrt instructions
 
 #0: xvtsqrtsp test-sqrt(3ec00000); test-sqrt(42780000); test-sqrt(00000000); test-sqrt(7f800000) ? e (CRx)
 #1: xvtsqrtsp test-sqrt(00000000); test-sqrt(00000000); test-sqrt(80000000); test-sqrt(7f800000) ? e (CRx)
-#2: xvtsqrtsp test-sqrt(ff800000); test-sqrt(7fffffff); test-sqrt(ffffffff); test-sqrt(7fc00000) ? e (CRx)
+#2: xvtsqrtsp test-sqrt(ff800000); test-sqrt(7fbfffff); test-sqrt(ffbfffff); test-sqrt(7fc00000) ? e (CRx)
 #3: xvtsqrtsp test-sqrt(ffc00000); test-sqrt(80000000); test-sqrt(c683287b); test-sqrt(49192c2d) ? e (CRx)
 #4: xvtsqrtsp test-sqrt(49c1288d); test-sqrt(418977ad); test-sqrt(428a5faf); test-sqrt(44bb5fcc) ? 8 (CRx)
 
@@ -583,21 +583,21 @@ Test vector and scalar tdiv and tsqrt instructions
 #33: xvtdivdp 40976bf982440000 test-div 40976bf982440000 AND 40976bf982440000 test-div 40514bf5d2300000 ? cc=8
 
 #0: xvtdivsp ff800000 test-div ff800000 AND ff800000 test-div c683287b AND 49192c2d test-div 49c1288d AND ff800000 test-div 00000000 ? cc=e
-#1: xvtdivsp ff800000 test-div 00000000 AND ff800000 test-div 7f800000 AND ff800000 test-div 7fffffff AND ff800000 test-div 7fc00000 ? cc=e
+#1: xvtdivsp ff800000 test-div 00000000 AND ff800000 test-div 7f800000 AND ff800000 test-div 7fbfffff AND ff800000 test-div 7fc00000 ? cc=e
 #2: xvtdivsp c683287b test-div ff800000 AND c683287b test-div c683287b AND c683287b test-div 80000000 AND c683287b test-div 00000000 ? cc=e
-#3: xvtdivsp c683287b test-div 00000000 AND c683287b test-div 7f800000 AND c683287b test-div 7fffffff AND c683287b test-div 7fc00000 ? cc=e
+#3: xvtdivsp c683287b test-div 00000000 AND c683287b test-div 7f800000 AND c683287b test-div 7fbfffff AND c683287b test-div 7fc00000 ? cc=e
 #4: xvtdivsp 80000000 test-div ff800000 AND 80000000 test-div c683287b AND 80000000 test-div 80000000 AND 80000000 test-div 00000000 ? cc=e
-#5: xvtdivsp 80000000 test-div 00000000 AND 80000000 test-div 7f800000 AND 80000000 test-div 7fffffff AND 80000000 test-div 7fc00000 ? cc=e
+#5: xvtdivsp 80000000 test-div 00000000 AND 80000000 test-div 7f800000 AND 80000000 test-div 7fbfffff AND 80000000 test-div 7fc00000 ? cc=e
 #6: xvtdivsp 00000000 test-div ff800000 AND 00000000 test-div c683287b AND 00000000 test-div 80000000 AND 00000000 test-div 00000000 ? cc=e
-#7: xvtdivsp 00000000 test-div 00000000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fffffff AND 00000000 test-div 7fc00000 ? cc=e
+#7: xvtdivsp 00000000 test-div 00000000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fbfffff AND 00000000 test-div 7fc00000 ? cc=e
 #8: xvtdivsp 00000000 test-div ff800000 AND 00000000 test-div c683287b AND 00000000 test-div 80000000 AND 00000000 test-div 00000000 ? cc=e
-#9: xvtdivsp 00000000 test-div 42780000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fffffff AND 00000000 test-div 7fc00000 ? cc=e
+#9: xvtdivsp 00000000 test-div 42780000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fbfffff AND 00000000 test-div 7fc00000 ? cc=e
 #10: xvtdivsp 7f800000 test-div ff800000 AND 7f800000 test-div c683287b AND 7f800000 test-div 80000000 AND 7f800000 test-div 00000000 ? cc=e
-#11: xvtdivsp 7f800000 test-div 00000000 AND 7f800000 test-div 7f800000 AND 7f800000 test-div 7fffffff AND 7f800000 test-div 7fc00000 ? cc=e
-#12: xvtdivsp ffffffff test-div ff800000 AND ffffffff test-div c683287b AND ffc00000 test-div 80000000 AND ffc00000 test-div 00000000 ? cc=e
-#13: xvtdivsp ffffffff test-div 00000000 AND ffffffff test-div 7f800000 AND ffffffff test-div 7fffffff AND ffffffff test-div 7fc00000 ? cc=e
+#11: xvtdivsp 7f800000 test-div 00000000 AND 7f800000 test-div 7f800000 AND 7f800000 test-div 7fbfffff AND 7f800000 test-div 7fc00000 ? cc=e
+#12: xvtdivsp ffbfffff test-div ff800000 AND ffbfffff test-div c683287b AND ffc00000 test-div 80000000 AND ffc00000 test-div 00000000 ? cc=e
+#13: xvtdivsp ffbfffff test-div 00000000 AND ffbfffff test-div 7f800000 AND ffbfffff test-div 7fbfffff AND ffbfffff test-div 7fc00000 ? cc=e
 #14: xvtdivsp ffc00000 test-div ff800000 AND ffc00000 test-div c683287b AND ffc00000 test-div 80000000 AND 49192c2d test-div 49c1288d ? cc=e
-#15: xvtdivsp 49192c2d test-div 49c1288d AND 7fffffff test-div 7fc00000 AND 7fc00000 test-div 7fc00000 AND 7fc00000 test-div ffc00000 ? cc=a
+#15: xvtdivsp 49192c2d test-div 49c1288d AND 7fbfffff test-div 7fc00000 AND 7fc00000 test-div 7fc00000 AND 7fc00000 test-div ffc00000 ? cc=a
 #16: xvtdivsp 49c1288d test-div 428a5faf AND 418977ad test-div 49c1288d AND 44bb5fcc test-div 44bb5fcc AND 44bb5fcc test-div 428a5faf ? cc=8
 
 Test popcntw instruction

diff --git a/none/tests/ppc32/test_isa_2_07_part2.stdout.exp b/none/tests/ppc32/test_isa_2_07_part2.stdout.exp
index c65c574722c58c03e37db5cf0c920c1af3a6a8d9..e9085ea9704323832d3ae1157de8099083767ea0 100644 (file)
--- a/none/tests/ppc32/test_isa_2_07_part2.stdout.exp
+++ b/none/tests/ppc32/test_isa_2_07_part2.stdout.exp
@@ -29,8 +29,8 @@ Test VSX vector and scalar single argument instructions
 #6: xscvspdpn conv(80000000) = 8000000000000000
 #7: xscvspdpn conv(7f800000) = 7ff0000000000000
 #8: xscvspdpn conv(ff800000) = fff0000000000000
-#9: xscvspdpn conv(7fffffff) = 7fffffffe0000000
-#10: xscvspdpn conv(ffffffff) = ffffffffe0000000
+#9: xscvspdpn conv(7fbfffff) = 7ff7ffffe0000000
+#10: xscvspdpn conv(ffbfffff) = fff7ffffe0000000
 #11: xscvspdpn conv(7fc00000) = 7ff8000000000000
 #12: xscvspdpn conv(ffc00000) = fff8000000000000
 #13: xscvspdpn conv(80000000) = 8000000000000000

diff --git a/none/tests/ppc64/test_isa_2_06_part2.stdout.exp b/none/tests/ppc64/test_isa_2_06_part2.stdout.exp
index 4c9b43935f74250464ccf8ae7ff13863f43bd68b..22631d0f604732f62db8d720683bf60d5cfe1dfb 100644 (file)
--- a/none/tests/ppc64/test_isa_2_06_part2.stdout.exp
+++ b/none/tests/ppc64/test_isa_2_06_part2.stdout.exp
@@ -1,7 +1,7 @@
 Test VSX vector single arg instructions
 #0: xvresp 1/x(3ec00000) ==> PASS; 1/x(42780000) ==> PASS; 1/x(00000000) ==> PASS; 1/x(7f800000) ==> PASS
 #1: xvresp 1/x(00000000) ==> PASS; 1/x(00000000) ==> PASS; 1/x(80000000) ==> PASS; 1/x(7f800000) ==> PASS
-#2: xvresp 1/x(ff800000) ==> PASS; 1/x(7fffffff) ==> PASS; 1/x(ffffffff) ==> PASS; 1/x(7fc00000) ==> PASS
+#2: xvresp 1/x(ff800000) ==> PASS; 1/x(7fbfffff) ==> PASS; 1/x(ffbfffff) ==> PASS; 1/x(7fc00000) ==> PASS
 #3: xvresp 1/x(ffc00000) ==> PASS; 1/x(80000000) ==> PASS; 1/x(c683287b) ==> PASS; 1/x(49192c2d) ==> PASS
 
 #0: xvcvdpsxws conv(3fd8000000000000) = 0000000000000000; conv(404f000000000000) = 000000000000003e
@@ -15,7 +15,7 @@ Test VSX vector single arg instructions
 
 #0: xvcvspsxws conv(3ec00000) = 00000000; conv(42780000) = 0000003e; conv(00000000) = 00000000; conv(7f800000) = 7fffffff
 #1: xvcvspsxws conv(00000000) = 00000000; conv(00000000) = 00000000; conv(80000000) = 00000000; conv(7f800000) = 7fffffff
-#2: xvcvspsxws conv(ff800000) = 80000000; conv(7fffffff) = 80000000; conv(ffffffff) = 80000000; conv(7fc00000) = 80000000
+#2: xvcvspsxws conv(ff800000) = 80000000; conv(7fbfffff) = 80000000; conv(ffbfffff) = 80000000; conv(7fc00000) = 80000000
 #3: xvcvspsxws conv(ffc00000) = 80000000; conv(80000000) = 00000000; conv(c683287b) = ffffbe6c; conv(49192c2d) = 000992c2
 
 Test VSX floating point compare and basic arithmetic instructions
@@ -221,106 +221,106 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvcmpeqsp ff800000 eq ff800000 AND ff800000 eq c683287b AND ff800000 eq 80000000 AND ff800000 eq 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#1: xvcmpeqsp ff800000 eq 00000000 AND ff800000 eq 7f800000 AND ff800000 eq 7fffffff AND ff800000 eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#1: xvcmpeqsp ff800000 eq 00000000 AND ff800000 eq 7f800000 AND ff800000 eq 7fbfffff AND ff800000 eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #2: xvcmpeqsp c683287b eq ff800000 AND c683287b eq c683287b AND c683287b eq 80000000 AND c683287b eq 00000000 ? cc=0 => 00000000 ffffffff 00000000 00000000
-#3: xvcmpeqsp c683287b eq 00000000 AND c683287b eq 7f800000 AND c683287b eq 7fffffff AND c683287b eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#3: xvcmpeqsp c683287b eq 00000000 AND c683287b eq 7f800000 AND c683287b eq 7fbfffff AND c683287b eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #4: xvcmpeqsp 80000000 eq ff800000 AND 80000000 eq c683287b AND 80000000 eq 80000000 AND 80000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#5: xvcmpeqsp 80000000 eq 00000000 AND 80000000 eq 7f800000 AND 80000000 eq 7fffffff AND 80000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#5: xvcmpeqsp 80000000 eq 00000000 AND 80000000 eq 7f800000 AND 80000000 eq 7fbfffff AND 80000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #6: xvcmpeqsp 00000000 eq ff800000 AND 00000000 eq c683287b AND 00000000 eq 80000000 AND 00000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#7: xvcmpeqsp 00000000 eq 00000000 AND 00000000 eq 7f800000 AND 00000000 eq 7fffffff AND 00000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#7: xvcmpeqsp 00000000 eq 00000000 AND 00000000 eq 7f800000 AND 00000000 eq 7fbfffff AND 00000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #8: xvcmpeqsp 00000000 eq ff800000 AND 00000000 eq c683287b AND 00000000 eq 80000000 AND 00000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#9: xvcmpeqsp 00000000 eq 42780000 AND 00000000 eq 7f800000 AND 00000000 eq 7fffffff AND 00000000 eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#9: xvcmpeqsp 00000000 eq 42780000 AND 00000000 eq 7f800000 AND 00000000 eq 7fbfffff AND 00000000 eq 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #10: xvcmpeqsp 7f800000 eq ff800000 AND 7f800000 eq c683287b AND 7f800000 eq 80000000 AND 7f800000 eq 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
-#11: xvcmpeqsp 7f800000 eq 00000000 AND 7f800000 eq 7f800000 AND 7f800000 eq 7fffffff AND 7f800000 eq 7fc00000 ? cc=0 => 00000000 ffffffff 00000000 00000000
-#12: xvcmpeqsp ffffffff eq ff800000 AND ffffffff eq c683287b AND ffffffff eq 80000000 AND ffffffff eq 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
-#13: xvcmpeqsp ffffffff eq 00000000 AND ffffffff eq 7f800000 AND ffffffff eq 7fffffff AND ffffffff eq ffffffff ? cc=0 => 00000000 00000000 00000000 00000000
+#11: xvcmpeqsp 7f800000 eq 00000000 AND 7f800000 eq 7f800000 AND 7f800000 eq 7fbfffff AND 7f800000 eq 7fc00000 ? cc=0 => 00000000 ffffffff 00000000 00000000
+#12: xvcmpeqsp ffbfffff eq ff800000 AND ffbfffff eq c683287b AND ffbfffff eq 80000000 AND ffbfffff eq 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
+#13: xvcmpeqsp ffbfffff eq 00000000 AND ffbfffff eq 7f800000 AND ffbfffff eq 7fbfffff AND ffbfffff eq ffbfffff ? cc=0 => 00000000 00000000 00000000 00000000
 #14: xvcmpeqsp ffc00000 eq ff800000 AND ffc00000 eq c683287b AND ffc00000 eq 80000000 AND ffc00000 eq 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
 #15: xvcmpeqsp 42780000 eq 42780000 AND 00000000 eq 00000000 AND 7f800000 eq 7f800000 AND 00000000 eq 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
 
 #0: xvcmpeqsp. ff800000 eq ff800000 AND ff800000 eq c683287b AND ff800000 eq 80000000 AND ff800000 eq 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#1: xvcmpeqsp. ff800000 eq 00000000 AND ff800000 eq 7f800000 AND ff800000 eq 7fffffff AND ff800000 eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#1: xvcmpeqsp. ff800000 eq 00000000 AND ff800000 eq 7f800000 AND ff800000 eq 7fbfffff AND ff800000 eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #2: xvcmpeqsp. c683287b eq ff800000 AND c683287b eq c683287b AND c683287b eq 80000000 AND c683287b eq 00000000 ? cc=0 => 00000000 ffffffff 00000000 00000000
-#3: xvcmpeqsp. c683287b eq 00000000 AND c683287b eq 7f800000 AND c683287b eq 7fffffff AND c683287b eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#3: xvcmpeqsp. c683287b eq 00000000 AND c683287b eq 7f800000 AND c683287b eq 7fbfffff AND c683287b eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #4: xvcmpeqsp. 80000000 eq ff800000 AND 80000000 eq c683287b AND 80000000 eq 80000000 AND 80000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#5: xvcmpeqsp. 80000000 eq 00000000 AND 80000000 eq 7f800000 AND 80000000 eq 7fffffff AND 80000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#5: xvcmpeqsp. 80000000 eq 00000000 AND 80000000 eq 7f800000 AND 80000000 eq 7fbfffff AND 80000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #6: xvcmpeqsp. 00000000 eq ff800000 AND 00000000 eq c683287b AND 00000000 eq 80000000 AND 00000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#7: xvcmpeqsp. 00000000 eq 00000000 AND 00000000 eq 7f800000 AND 00000000 eq 7fffffff AND 00000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#7: xvcmpeqsp. 00000000 eq 00000000 AND 00000000 eq 7f800000 AND 00000000 eq 7fbfffff AND 00000000 eq 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #8: xvcmpeqsp. 00000000 eq ff800000 AND 00000000 eq c683287b AND 00000000 eq 80000000 AND 00000000 eq 00000000 ? cc=0 => 00000000 00000000 ffffffff ffffffff
-#9: xvcmpeqsp. 00000000 eq 42780000 AND 00000000 eq 7f800000 AND 00000000 eq 7fffffff AND 00000000 eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#9: xvcmpeqsp. 00000000 eq 42780000 AND 00000000 eq 7f800000 AND 00000000 eq 7fbfffff AND 00000000 eq 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #10: xvcmpeqsp. 7f800000 eq ff800000 AND 7f800000 eq c683287b AND 7f800000 eq 80000000 AND 7f800000 eq 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
-#11: xvcmpeqsp. 7f800000 eq 00000000 AND 7f800000 eq 7f800000 AND 7f800000 eq 7fffffff AND 7f800000 eq 7fc00000 ? cc=0 => 00000000 ffffffff 00000000 00000000
-#12: xvcmpeqsp. ffffffff eq ff800000 AND ffffffff eq c683287b AND ffffffff eq 80000000 AND ffffffff eq 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
-#13: xvcmpeqsp. ffffffff eq 00000000 AND ffffffff eq 7f800000 AND ffffffff eq 7fffffff AND ffffffff eq ffffffff ? cc=2 => 00000000 00000000 00000000 00000000
+#11: xvcmpeqsp. 7f800000 eq 00000000 AND 7f800000 eq 7f800000 AND 7f800000 eq 7fbfffff AND 7f800000 eq 7fc00000 ? cc=0 => 00000000 ffffffff 00000000 00000000
+#12: xvcmpeqsp. ffbfffff eq ff800000 AND ffbfffff eq c683287b AND ffbfffff eq 80000000 AND ffbfffff eq 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
+#13: xvcmpeqsp. ffbfffff eq 00000000 AND ffbfffff eq 7f800000 AND ffbfffff eq 7fbfffff AND ffbfffff eq ffbfffff ? cc=2 => 00000000 00000000 00000000 00000000
 #14: xvcmpeqsp. ffc00000 eq ff800000 AND ffc00000 eq c683287b AND ffc00000 eq 80000000 AND ffc00000 eq 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
 #15: xvcmpeqsp. 42780000 eq 42780000 AND 00000000 eq 00000000 AND 7f800000 eq 7f800000 AND 00000000 eq 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
 
 
 #0: xvcmpgesp ff800000 ge ff800000 AND ff800000 ge c683287b AND ff800000 ge 80000000 AND ff800000 ge 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#1: xvcmpgesp ff800000 ge 00000000 AND ff800000 ge 7f800000 AND ff800000 ge 7fffffff AND ff800000 ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#1: xvcmpgesp ff800000 ge 00000000 AND ff800000 ge 7f800000 AND ff800000 ge 7fbfffff AND ff800000 ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #2: xvcmpgesp c683287b ge ff800000 AND c683287b ge c683287b AND c683287b ge 80000000 AND c683287b ge 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#3: xvcmpgesp c683287b ge 00000000 AND c683287b ge 7f800000 AND c683287b ge 7fffffff AND c683287b ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#3: xvcmpgesp c683287b ge 00000000 AND c683287b ge 7f800000 AND c683287b ge 7fbfffff AND c683287b ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #4: xvcmpgesp 80000000 ge ff800000 AND 80000000 ge c683287b AND 80000000 ge 80000000 AND 80000000 ge 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
-#5: xvcmpgesp 80000000 ge 00000000 AND 80000000 ge 7f800000 AND 80000000 ge 7fffffff AND 80000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#5: xvcmpgesp 80000000 ge 00000000 AND 80000000 ge 7f800000 AND 80000000 ge 7fbfffff AND 80000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #6: xvcmpgesp 00000000 ge ff800000 AND 00000000 ge c683287b AND 00000000 ge 80000000 AND 00000000 ge 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
-#7: xvcmpgesp 00000000 ge 00000000 AND 00000000 ge 7f800000 AND 00000000 ge 7fffffff AND 00000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#7: xvcmpgesp 00000000 ge 00000000 AND 00000000 ge 7f800000 AND 00000000 ge 7fbfffff AND 00000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #8: xvcmpgesp 00000000 ge ff800000 AND 00000000 ge c683287b AND 00000000 ge 80000000 AND 00000000 ge 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
-#9: xvcmpgesp 00000000 ge 42780000 AND 00000000 ge 7f800000 AND 00000000 ge 7fffffff AND 00000000 ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#9: xvcmpgesp 00000000 ge 42780000 AND 00000000 ge 7f800000 AND 00000000 ge 7fbfffff AND 00000000 ge 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #10: xvcmpgesp 7f800000 ge ff800000 AND 7f800000 ge c683287b AND 7f800000 ge 80000000 AND 7f800000 ge 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
-#11: xvcmpgesp 7f800000 ge 00000000 AND 7f800000 ge 7f800000 AND 7f800000 ge 7fffffff AND 7f800000 ge 7fc00000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#12: xvcmpgesp ffffffff ge ff800000 AND ffffffff ge c683287b AND ffffffff ge 80000000 AND ffffffff ge 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
-#13: xvcmpgesp ffffffff ge 00000000 AND ffffffff ge 7f800000 AND ffffffff ge 7fffffff AND ffffffff ge ffffffff ? cc=0 => 00000000 00000000 00000000 00000000
+#11: xvcmpgesp 7f800000 ge 00000000 AND 7f800000 ge 7f800000 AND 7f800000 ge 7fbfffff AND 7f800000 ge 7fc00000 ? cc=0 => ffffffff ffffffff 00000000 00000000
+#12: xvcmpgesp ffbfffff ge ff800000 AND ffbfffff ge c683287b AND ffbfffff ge 80000000 AND ffbfffff ge 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
+#13: xvcmpgesp ffbfffff ge 00000000 AND ffbfffff ge 7f800000 AND ffbfffff ge 7fbfffff AND ffbfffff ge ffbfffff ? cc=0 => 00000000 00000000 00000000 00000000
 #14: xvcmpgesp ffc00000 ge ff800000 AND ffc00000 ge c683287b AND ffc00000 ge 80000000 AND ffc00000 ge 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
 #15: xvcmpgesp 42780000 ge 42780000 AND 00000000 ge 00000000 AND 7f800000 ge 7f800000 AND 00000000 ge 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
 
 #0: xvcmpgesp. ff800000 ge ff800000 AND ff800000 ge c683287b AND ff800000 ge 80000000 AND ff800000 ge 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#1: xvcmpgesp. ff800000 ge 00000000 AND ff800000 ge 7f800000 AND ff800000 ge 7fffffff AND ff800000 ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#1: xvcmpgesp. ff800000 ge 00000000 AND ff800000 ge 7f800000 AND ff800000 ge 7fbfffff AND ff800000 ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #2: xvcmpgesp. c683287b ge ff800000 AND c683287b ge c683287b AND c683287b ge 80000000 AND c683287b ge 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#3: xvcmpgesp. c683287b ge 00000000 AND c683287b ge 7f800000 AND c683287b ge 7fffffff AND c683287b ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#3: xvcmpgesp. c683287b ge 00000000 AND c683287b ge 7f800000 AND c683287b ge 7fbfffff AND c683287b ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #4: xvcmpgesp. 80000000 ge ff800000 AND 80000000 ge c683287b AND 80000000 ge 80000000 AND 80000000 ge 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
-#5: xvcmpgesp. 80000000 ge 00000000 AND 80000000 ge 7f800000 AND 80000000 ge 7fffffff AND 80000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#5: xvcmpgesp. 80000000 ge 00000000 AND 80000000 ge 7f800000 AND 80000000 ge 7fbfffff AND 80000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #6: xvcmpgesp. 00000000 ge ff800000 AND 00000000 ge c683287b AND 00000000 ge 80000000 AND 00000000 ge 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
-#7: xvcmpgesp. 00000000 ge 00000000 AND 00000000 ge 7f800000 AND 00000000 ge 7fffffff AND 00000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#7: xvcmpgesp. 00000000 ge 00000000 AND 00000000 ge 7f800000 AND 00000000 ge 7fbfffff AND 00000000 ge 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
 #8: xvcmpgesp. 00000000 ge ff800000 AND 00000000 ge c683287b AND 00000000 ge 80000000 AND 00000000 ge 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
-#9: xvcmpgesp. 00000000 ge 42780000 AND 00000000 ge 7f800000 AND 00000000 ge 7fffffff AND 00000000 ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#9: xvcmpgesp. 00000000 ge 42780000 AND 00000000 ge 7f800000 AND 00000000 ge 7fbfffff AND 00000000 ge 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #10: xvcmpgesp. 7f800000 ge ff800000 AND 7f800000 ge c683287b AND 7f800000 ge 80000000 AND 7f800000 ge 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
-#11: xvcmpgesp. 7f800000 ge 00000000 AND 7f800000 ge 7f800000 AND 7f800000 ge 7fffffff AND 7f800000 ge 7fc00000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#12: xvcmpgesp. ffffffff ge ff800000 AND ffffffff ge c683287b AND ffffffff ge 80000000 AND ffffffff ge 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
-#13: xvcmpgesp. ffffffff ge 00000000 AND ffffffff ge 7f800000 AND ffffffff ge 7fffffff AND ffffffff ge ffffffff ? cc=2 => 00000000 00000000 00000000 00000000
+#11: xvcmpgesp. 7f800000 ge 00000000 AND 7f800000 ge 7f800000 AND 7f800000 ge 7fbfffff AND 7f800000 ge 7fc00000 ? cc=0 => ffffffff ffffffff 00000000 00000000
+#12: xvcmpgesp. ffbfffff ge ff800000 AND ffbfffff ge c683287b AND ffbfffff ge 80000000 AND ffbfffff ge 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
+#13: xvcmpgesp. ffbfffff ge 00000000 AND ffbfffff ge 7f800000 AND ffbfffff ge 7fbfffff AND ffbfffff ge ffbfffff ? cc=2 => 00000000 00000000 00000000 00000000
 #14: xvcmpgesp. ffc00000 ge ff800000 AND ffc00000 ge c683287b AND ffc00000 ge 80000000 AND ffc00000 ge 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
 #15: xvcmpgesp. 42780000 ge 42780000 AND 00000000 ge 00000000 AND 7f800000 ge 7f800000 AND 00000000 ge 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
 
 
 #0: xvcmpgtsp ff800000 gt ff800000 AND ff800000 gt c683287b AND ff800000 gt 80000000 AND ff800000 gt 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
-#1: xvcmpgtsp ff800000 gt 00000000 AND ff800000 gt 7f800000 AND ff800000 gt 7fffffff AND ff800000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#1: xvcmpgtsp ff800000 gt 00000000 AND ff800000 gt 7f800000 AND ff800000 gt 7fbfffff AND ff800000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #2: xvcmpgtsp c683287b gt ff800000 AND c683287b gt c683287b AND c683287b gt 80000000 AND c683287b gt 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#3: xvcmpgtsp c683287b gt 00000000 AND c683287b gt 7f800000 AND c683287b gt 7fffffff AND c683287b gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#3: xvcmpgtsp c683287b gt 00000000 AND c683287b gt 7f800000 AND c683287b gt 7fbfffff AND c683287b gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #4: xvcmpgtsp 80000000 gt ff800000 AND 80000000 gt c683287b AND 80000000 gt 80000000 AND 80000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#5: xvcmpgtsp 80000000 gt 00000000 AND 80000000 gt 7f800000 AND 80000000 gt 7fffffff AND 80000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#5: xvcmpgtsp 80000000 gt 00000000 AND 80000000 gt 7f800000 AND 80000000 gt 7fbfffff AND 80000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #6: xvcmpgtsp 00000000 gt ff800000 AND 00000000 gt c683287b AND 00000000 gt 80000000 AND 00000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#7: xvcmpgtsp 00000000 gt 00000000 AND 00000000 gt 7f800000 AND 00000000 gt 7fffffff AND 00000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#7: xvcmpgtsp 00000000 gt 00000000 AND 00000000 gt 7f800000 AND 00000000 gt 7fbfffff AND 00000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #8: xvcmpgtsp 00000000 gt ff800000 AND 00000000 gt c683287b AND 00000000 gt 80000000 AND 00000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#9: xvcmpgtsp 00000000 gt 42780000 AND 00000000 gt 7f800000 AND 00000000 gt 7fffffff AND 00000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
+#9: xvcmpgtsp 00000000 gt 42780000 AND 00000000 gt 7f800000 AND 00000000 gt 7fbfffff AND 00000000 gt 7fc00000 ? cc=0 => 00000000 00000000 00000000 00000000
 #10: xvcmpgtsp 7f800000 gt ff800000 AND 7f800000 gt c683287b AND 7f800000 gt 80000000 AND 7f800000 gt 00000000 ? cc=0 => ffffffff ffffffff ffffffff ffffffff
-#11: xvcmpgtsp 7f800000 gt 00000000 AND 7f800000 gt 7f800000 AND 7f800000 gt 7fffffff AND 7f800000 gt 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#12: xvcmpgtsp ffffffff gt ff800000 AND ffffffff gt c683287b AND ffffffff gt 80000000 AND ffffffff gt 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
-#13: xvcmpgtsp ffffffff gt 00000000 AND ffffffff gt 7f800000 AND ffffffff gt 7fffffff AND ffffffff gt ffffffff ? cc=0 => 00000000 00000000 00000000 00000000
+#11: xvcmpgtsp 7f800000 gt 00000000 AND 7f800000 gt 7f800000 AND 7f800000 gt 7fbfffff AND 7f800000 gt 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#12: xvcmpgtsp ffbfffff gt ff800000 AND ffbfffff gt c683287b AND ffbfffff gt 80000000 AND ffbfffff gt 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
+#13: xvcmpgtsp ffbfffff gt 00000000 AND ffbfffff gt 7f800000 AND ffbfffff gt 7fbfffff AND ffbfffff gt ffbfffff ? cc=0 => 00000000 00000000 00000000 00000000
 #14: xvcmpgtsp ffc00000 gt ff800000 AND ffc00000 gt c683287b AND ffc00000 gt 80000000 AND ffc00000 gt 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
 #15: xvcmpgtsp 42780000 gt 42780000 AND 00000000 gt 00000000 AND 7f800000 gt 7f800000 AND 00000000 gt 00000000 ? cc=0 => 00000000 00000000 00000000 00000000
 
 #0: xvcmpgtsp. ff800000 gt ff800000 AND ff800000 gt c683287b AND ff800000 gt 80000000 AND ff800000 gt 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
-#1: xvcmpgtsp. ff800000 gt 00000000 AND ff800000 gt 7f800000 AND ff800000 gt 7fffffff AND ff800000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#1: xvcmpgtsp. ff800000 gt 00000000 AND ff800000 gt 7f800000 AND ff800000 gt 7fbfffff AND ff800000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #2: xvcmpgtsp. c683287b gt ff800000 AND c683287b gt c683287b AND c683287b gt 80000000 AND c683287b gt 00000000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#3: xvcmpgtsp. c683287b gt 00000000 AND c683287b gt 7f800000 AND c683287b gt 7fffffff AND c683287b gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#3: xvcmpgtsp. c683287b gt 00000000 AND c683287b gt 7f800000 AND c683287b gt 7fbfffff AND c683287b gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #4: xvcmpgtsp. 80000000 gt ff800000 AND 80000000 gt c683287b AND 80000000 gt 80000000 AND 80000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#5: xvcmpgtsp. 80000000 gt 00000000 AND 80000000 gt 7f800000 AND 80000000 gt 7fffffff AND 80000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#5: xvcmpgtsp. 80000000 gt 00000000 AND 80000000 gt 7f800000 AND 80000000 gt 7fbfffff AND 80000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #6: xvcmpgtsp. 00000000 gt ff800000 AND 00000000 gt c683287b AND 00000000 gt 80000000 AND 00000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#7: xvcmpgtsp. 00000000 gt 00000000 AND 00000000 gt 7f800000 AND 00000000 gt 7fffffff AND 00000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#7: xvcmpgtsp. 00000000 gt 00000000 AND 00000000 gt 7f800000 AND 00000000 gt 7fbfffff AND 00000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #8: xvcmpgtsp. 00000000 gt ff800000 AND 00000000 gt c683287b AND 00000000 gt 80000000 AND 00000000 gt 00000000 ? cc=0 => ffffffff ffffffff 00000000 00000000
-#9: xvcmpgtsp. 00000000 gt 42780000 AND 00000000 gt 7f800000 AND 00000000 gt 7fffffff AND 00000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
+#9: xvcmpgtsp. 00000000 gt 42780000 AND 00000000 gt 7f800000 AND 00000000 gt 7fbfffff AND 00000000 gt 7fc00000 ? cc=2 => 00000000 00000000 00000000 00000000
 #10: xvcmpgtsp. 7f800000 gt ff800000 AND 7f800000 gt c683287b AND 7f800000 gt 80000000 AND 7f800000 gt 00000000 ? cc=8 => ffffffff ffffffff ffffffff ffffffff
-#11: xvcmpgtsp. 7f800000 gt 00000000 AND 7f800000 gt 7f800000 AND 7f800000 gt 7fffffff AND 7f800000 gt 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
-#12: xvcmpgtsp. ffffffff gt ff800000 AND ffffffff gt c683287b AND ffffffff gt 80000000 AND ffffffff gt 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
-#13: xvcmpgtsp. ffffffff gt 00000000 AND ffffffff gt 7f800000 AND ffffffff gt 7fffffff AND ffffffff gt ffffffff ? cc=2 => 00000000 00000000 00000000 00000000
+#11: xvcmpgtsp. 7f800000 gt 00000000 AND 7f800000 gt 7f800000 AND 7f800000 gt 7fbfffff AND 7f800000 gt 7fc00000 ? cc=0 => ffffffff 00000000 00000000 00000000
+#12: xvcmpgtsp. ffbfffff gt ff800000 AND ffbfffff gt c683287b AND ffbfffff gt 80000000 AND ffbfffff gt 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
+#13: xvcmpgtsp. ffbfffff gt 00000000 AND ffbfffff gt 7f800000 AND ffbfffff gt 7fbfffff AND ffbfffff gt ffbfffff ? cc=2 => 00000000 00000000 00000000 00000000
 #14: xvcmpgtsp. ffc00000 gt ff800000 AND ffc00000 gt c683287b AND ffc00000 gt 80000000 AND ffc00000 gt 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
 #15: xvcmpgtsp. 42780000 gt 42780000 AND 00000000 gt 00000000 AND 7f800000 gt 7f800000 AND 00000000 gt 00000000 ? cc=2 => 00000000 00000000 00000000 00000000
 
@@ -360,21 +360,21 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvaddsp ff800000 + ff800000 AND ff800000 + c683287b AND 49192c2d + 49c1288d AND ff800000 + 00000000 => ff800000 ff800000 4a06df52 ff800000
-#1: xvaddsp ff800000 + 00000000 AND ff800000 + 7f800000 AND ff800000 + 7fffffff AND ff800000 + 7fc00000 => ff800000 7fc00000 7fffffff 7fc00000
+#1: xvaddsp ff800000 + 00000000 AND ff800000 + 7f800000 AND ff800000 + 7fbfffff AND ff800000 + 7fc00000 => ff800000 7fc00000 7fffffff 7fc00000
 #2: xvaddsp c683287b + ff800000 AND c683287b + c683287b AND c683287b + 80000000 AND c683287b + 00000000 => ff800000 c703287b c683287b c683287b
-#3: xvaddsp c683287b + 00000000 AND c683287b + 7f800000 AND c683287b + 7fffffff AND c683287b + 7fc00000 => c683287b 7f800000 7fffffff 7fc00000
+#3: xvaddsp c683287b + 00000000 AND c683287b + 7f800000 AND c683287b + 7fbfffff AND c683287b + 7fc00000 => c683287b 7f800000 7fffffff 7fc00000
 #4: xvaddsp 80000000 + ff800000 AND 80000000 + c683287b AND 80000000 + 80000000 AND 80000000 + 00000000 => ff800000 c683287b 80000000 00000000
-#5: xvaddsp 80000000 + 00000000 AND 80000000 + 7f800000 AND 80000000 + 7fffffff AND 80000000 + 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
+#5: xvaddsp 80000000 + 00000000 AND 80000000 + 7f800000 AND 80000000 + 7fbfffff AND 80000000 + 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
 #6: xvaddsp 00000000 + ff800000 AND 00000000 + c683287b AND 00000000 + 80000000 AND 00000000 + 00000000 => ff800000 c683287b 00000000 00000000
-#7: xvaddsp 00000000 + 00000000 AND 00000000 + 7f800000 AND 00000000 + 7fffffff AND 00000000 + 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
+#7: xvaddsp 00000000 + 00000000 AND 00000000 + 7f800000 AND 00000000 + 7fbfffff AND 00000000 + 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
 #8: xvaddsp 00000000 + ff800000 AND 00000000 + c683287b AND 00000000 + 80000000 AND 00000000 + 00000000 => ff800000 c683287b 00000000 00000000
-#9: xvaddsp 00000000 + 42780000 AND 00000000 + 7f800000 AND 00000000 + 7fffffff AND 00000000 + 7fc00000 => 42780000 7f800000 7fffffff 7fc00000
+#9: xvaddsp 00000000 + 42780000 AND 00000000 + 7f800000 AND 00000000 + 7fbfffff AND 00000000 + 7fc00000 => 42780000 7f800000 7fffffff 7fc00000
 #10: xvaddsp 7f800000 + ff800000 AND 7f800000 + c683287b AND 7f800000 + 80000000 AND 7f800000 + 00000000 => 7fc00000 7f800000 7f800000 7f800000
-#11: xvaddsp 7f800000 + 00000000 AND 7f800000 + 7f800000 AND 7f800000 + 7fffffff AND 7f800000 + 7fc00000 => 7f800000 7f800000 7fffffff 7fc00000
-#12: xvaddsp ffffffff + ff800000 AND ffffffff + c683287b AND ffc00000 + 80000000 AND ffc00000 + 00000000 => ffffffff ffffffff ffc00000 ffc00000
-#13: xvaddsp ffffffff + 00000000 AND ffffffff + 7f800000 AND ffffffff + 7fffffff AND ffffffff + 7fc00000 => ffffffff ffffffff ffffffff ffffffff
+#11: xvaddsp 7f800000 + 00000000 AND 7f800000 + 7f800000 AND 7f800000 + 7fbfffff AND 7f800000 + 7fc00000 => 7f800000 7f800000 7fffffff 7fc00000
+#12: xvaddsp ffbfffff + ff800000 AND ffbfffff + c683287b AND ffc00000 + 80000000 AND ffc00000 + 00000000 => ffffffff ffffffff ffc00000 ffc00000
+#13: xvaddsp ffbfffff + 00000000 AND ffbfffff + 7f800000 AND ffbfffff + 7fbfffff AND ffbfffff + 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvaddsp ffc00000 + ff800000 AND ffc00000 + c683287b AND ffc00000 + 80000000 AND 49192c2d + 49c1288d => ffc00000 ffc00000 ffc00000 4a06df52
-#15: xvaddsp 49192c2d + 49c1288d AND 7fffffff + 7fc00000 AND 7fc00000 + 7fc00000 AND 7fc00000 + ffc00000 => 4a06df52 7fffffff 7fc00000 7fc00000
+#15: xvaddsp 49192c2d + 49c1288d AND 7fbfffff + 7fc00000 AND 7fc00000 + 7fc00000 AND 7fc00000 + ffc00000 => 4a06df52 7fffffff 7fc00000 7fc00000
 
 
 #0: xvdivdp fff0000000000000 / fff0000000000000 AND fff0000000000000 / c0d0650f5a07b353 => 7ff8000000000000 7ff0000000000000
@@ -412,21 +412,21 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvdivsp ff800000 / ff800000 AND ff800000 / c683287b AND 49192c2d / 49c1288d AND ff800000 / 00000000 => 7fc00000 7f800000 3ecb015a ff800000
-#1: xvdivsp ff800000 / 00000000 AND ff800000 / 7f800000 AND ff800000 / 7fffffff AND ff800000 / 7fc00000 => ff800000 7fc00000 7fffffff 7fc00000
+#1: xvdivsp ff800000 / 00000000 AND ff800000 / 7f800000 AND ff800000 / 7fbfffff AND ff800000 / 7fc00000 => ff800000 7fc00000 7fffffff 7fc00000
 #2: xvdivsp c683287b / ff800000 AND c683287b / c683287b AND c683287b / 80000000 AND c683287b / 00000000 => 00000000 3f800000 7f800000 ff800000
-#3: xvdivsp c683287b / 00000000 AND c683287b / 7f800000 AND c683287b / 7fffffff AND c683287b / 7fc00000 => ff800000 80000000 7fffffff 7fc00000
+#3: xvdivsp c683287b / 00000000 AND c683287b / 7f800000 AND c683287b / 7fbfffff AND c683287b / 7fc00000 => ff800000 80000000 7fffffff 7fc00000
 #4: xvdivsp 80000000 / ff800000 AND 80000000 / c683287b AND 80000000 / 80000000 AND 80000000 / 00000000 => 00000000 00000000 7fc00000 7fc00000
-#5: xvdivsp 80000000 / 00000000 AND 80000000 / 7f800000 AND 80000000 / 7fffffff AND 80000000 / 7fc00000 => 7fc00000 80000000 7fffffff 7fc00000
+#5: xvdivsp 80000000 / 00000000 AND 80000000 / 7f800000 AND 80000000 / 7fbfffff AND 80000000 / 7fc00000 => 7fc00000 80000000 7fffffff 7fc00000
 #6: xvdivsp 00000000 / ff800000 AND 00000000 / c683287b AND 00000000 / 80000000 AND 00000000 / 00000000 => 80000000 80000000 7fc00000 7fc00000
-#7: xvdivsp 00000000 / 00000000 AND 00000000 / 7f800000 AND 00000000 / 7fffffff AND 00000000 / 7fc00000 => 7fc00000 00000000 7fffffff 7fc00000
+#7: xvdivsp 00000000 / 00000000 AND 00000000 / 7f800000 AND 00000000 / 7fbfffff AND 00000000 / 7fc00000 => 7fc00000 00000000 7fffffff 7fc00000
 #8: xvdivsp 00000000 / ff800000 AND 00000000 / c683287b AND 00000000 / 80000000 AND 00000000 / 00000000 => 80000000 80000000 7fc00000 7fc00000
-#9: xvdivsp 00000000 / 42780000 AND 00000000 / 7f800000 AND 00000000 / 7fffffff AND 00000000 / 7fc00000 => 00000000 00000000 7fffffff 7fc00000
+#9: xvdivsp 00000000 / 42780000 AND 00000000 / 7f800000 AND 00000000 / 7fbfffff AND 00000000 / 7fc00000 => 00000000 00000000 7fffffff 7fc00000
 #10: xvdivsp 7f800000 / ff800000 AND 7f800000 / c683287b AND 7f800000 / 80000000 AND 7f800000 / 00000000 => 7fc00000 ff800000 ff800000 7f800000
-#11: xvdivsp 7f800000 / 00000000 AND 7f800000 / 7f800000 AND 7f800000 / 7fffffff AND 7f800000 / 7fc00000 => 7f800000 7fc00000 7fffffff 7fc00000
-#12: xvdivsp ffffffff / ff800000 AND ffffffff / c683287b AND ffc00000 / 80000000 AND ffc00000 / 00000000 => ffffffff ffffffff ffc00000 ffc00000
-#13: xvdivsp ffffffff / 00000000 AND ffffffff / 7f800000 AND ffffffff / 7fffffff AND ffffffff / 7fc00000 => ffffffff ffffffff ffffffff ffffffff
+#11: xvdivsp 7f800000 / 00000000 AND 7f800000 / 7f800000 AND 7f800000 / 7fbfffff AND 7f800000 / 7fc00000 => 7f800000 7fc00000 7fffffff 7fc00000
+#12: xvdivsp ffbfffff / ff800000 AND ffbfffff / c683287b AND ffc00000 / 80000000 AND ffc00000 / 00000000 => ffffffff ffffffff ffc00000 ffc00000
+#13: xvdivsp ffbfffff / 00000000 AND ffbfffff / 7f800000 AND ffbfffff / 7fbfffff AND ffbfffff / 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvdivsp ffc00000 / ff800000 AND ffc00000 / c683287b AND ffc00000 / 80000000 AND 49192c2d / 49c1288d => ffc00000 ffc00000 ffc00000 3ecb015a
-#15: xvdivsp 49192c2d / 49c1288d AND 7fffffff / 7fc00000 AND 7fc00000 / 7fc00000 AND 7fc00000 / ffc00000 => 3ecb015a 7fffffff 7fc00000 7fc00000
+#15: xvdivsp 49192c2d / 49c1288d AND 7fbfffff / 7fc00000 AND 7fc00000 / 7fc00000 AND 7fc00000 / ffc00000 => 3ecb015a 7fffffff 7fc00000 7fc00000
 
 
 #0: xvmuldp fff0000000000000 * fff0000000000000 AND fff0000000000000 * c0d0650f5a07b353 => 7ff0000000000000 7ff0000000000000
@@ -464,21 +464,21 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvmulsp ff800000 * ff800000 AND ff800000 * c683287b AND 49192c2d * 49c1288d AND ff800000 * 00000000 => 7f800000 7f800000 53672522 7fc00000
-#1: xvmulsp ff800000 * 00000000 AND ff800000 * 7f800000 AND ff800000 * 7fffffff AND ff800000 * 7fc00000 => 7fc00000 ff800000 7fffffff 7fc00000
+#1: xvmulsp ff800000 * 00000000 AND ff800000 * 7f800000 AND ff800000 * 7fbfffff AND ff800000 * 7fc00000 => 7fc00000 ff800000 7fffffff 7fc00000
 #2: xvmulsp c683287b * ff800000 AND c683287b * c683287b AND c683287b * 80000000 AND c683287b * 00000000 => 7f800000 4d8664e9 00000000 80000000
-#3: xvmulsp c683287b * 00000000 AND c683287b * 7f800000 AND c683287b * 7fffffff AND c683287b * 7fc00000 => 80000000 ff800000 7fffffff 7fc00000
+#3: xvmulsp c683287b * 00000000 AND c683287b * 7f800000 AND c683287b * 7fbfffff AND c683287b * 7fc00000 => 80000000 ff800000 7fffffff 7fc00000
 #4: xvmulsp 80000000 * ff800000 AND 80000000 * c683287b AND 80000000 * 80000000 AND 80000000 * 00000000 => 7fc00000 00000000 00000000 80000000
-#5: xvmulsp 80000000 * 00000000 AND 80000000 * 7f800000 AND 80000000 * 7fffffff AND 80000000 * 7fc00000 => 80000000 7fc00000 7fffffff 7fc00000
+#5: xvmulsp 80000000 * 00000000 AND 80000000 * 7f800000 AND 80000000 * 7fbfffff AND 80000000 * 7fc00000 => 80000000 7fc00000 7fffffff 7fc00000
 #6: xvmulsp 00000000 * ff800000 AND 00000000 * c683287b AND 00000000 * 80000000 AND 00000000 * 00000000 => 7fc00000 80000000 80000000 00000000
-#7: xvmulsp 00000000 * 00000000 AND 00000000 * 7f800000 AND 00000000 * 7fffffff AND 00000000 * 7fc00000 => 00000000 7fc00000 7fffffff 7fc00000
+#7: xvmulsp 00000000 * 00000000 AND 00000000 * 7f800000 AND 00000000 * 7fbfffff AND 00000000 * 7fc00000 => 00000000 7fc00000 7fffffff 7fc00000
 #8: xvmulsp 00000000 * ff800000 AND 00000000 * c683287b AND 00000000 * 80000000 AND 00000000 * 00000000 => 7fc00000 80000000 80000000 00000000
-#9: xvmulsp 00000000 * 42780000 AND 00000000 * 7f800000 AND 00000000 * 7fffffff AND 00000000 * 7fc00000 => 00000000 7fc00000 7fffffff 7fc00000
+#9: xvmulsp 00000000 * 42780000 AND 00000000 * 7f800000 AND 00000000 * 7fbfffff AND 00000000 * 7fc00000 => 00000000 7fc00000 7fffffff 7fc00000
 #10: xvmulsp 7f800000 * ff800000 AND 7f800000 * c683287b AND 7f800000 * 80000000 AND 7f800000 * 00000000 => ff800000 ff800000 7fc00000 7fc00000
-#11: xvmulsp 7f800000 * 00000000 AND 7f800000 * 7f800000 AND 7f800000 * 7fffffff AND 7f800000 * 7fc00000 => 7fc00000 7f800000 7fffffff 7fc00000
-#12: xvmulsp ffffffff * ff800000 AND ffffffff * c683287b AND ffc00000 * 80000000 AND ffc00000 * 00000000 => ffffffff ffffffff ffc00000 ffc00000
-#13: xvmulsp ffffffff * 00000000 AND ffffffff * 7f800000 AND ffffffff * 7fffffff AND ffffffff * 7fc00000 => ffffffff ffffffff ffffffff ffffffff
+#11: xvmulsp 7f800000 * 00000000 AND 7f800000 * 7f800000 AND 7f800000 * 7fbfffff AND 7f800000 * 7fc00000 => 7fc00000 7f800000 7fffffff 7fc00000
+#12: xvmulsp ffbfffff * ff800000 AND ffbfffff * c683287b AND ffc00000 * 80000000 AND ffc00000 * 00000000 => ffffffff ffffffff ffc00000 ffc00000
+#13: xvmulsp ffbfffff * 00000000 AND ffbfffff * 7f800000 AND ffbfffff * 7fbfffff AND ffbfffff * 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvmulsp ffc00000 * ff800000 AND ffc00000 * c683287b AND ffc00000 * 80000000 AND 49192c2d * 49c1288d => ffc00000 ffc00000 ffc00000 53672522
-#15: xvmulsp 49192c2d * 49c1288d AND 7fffffff * 7fc00000 AND 7fc00000 * 7fc00000 AND 7fc00000 * ffc00000 => 53672522 7fffffff 7fc00000 7fc00000
+#15: xvmulsp 49192c2d * 49c1288d AND 7fbfffff * 7fc00000 AND 7fc00000 * 7fc00000 AND 7fc00000 * ffc00000 => 53672522 7fffffff 7fc00000 7fc00000
 
 
 #0: xvsubdp fff0000000000000 - fff0000000000000 AND fff0000000000000 - c0d0650f5a07b353 => 7ff8000000000000 fff0000000000000
@@ -516,21 +516,21 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvsubsp ff800000 - ff800000 AND ff800000 - c683287b AND 49192c2d - 49c1288d AND ff800000 - 00000000 => 7fc00000 ff800000 c96924ed ff800000
-#1: xvsubsp ff800000 - 00000000 AND ff800000 - 7f800000 AND ff800000 - 7fffffff AND ff800000 - 7fc00000 => ff800000 ff800000 7fffffff 7fc00000
+#1: xvsubsp ff800000 - 00000000 AND ff800000 - 7f800000 AND ff800000 - 7fbfffff AND ff800000 - 7fc00000 => ff800000 ff800000 7fffffff 7fc00000
 #2: xvsubsp c683287b - ff800000 AND c683287b - c683287b AND c683287b - 80000000 AND c683287b - 00000000 => 7f800000 00000000 c683287b c683287b
-#3: xvsubsp c683287b - 00000000 AND c683287b - 7f800000 AND c683287b - 7fffffff AND c683287b - 7fc00000 => c683287b ff800000 7fffffff 7fc00000
+#3: xvsubsp c683287b - 00000000 AND c683287b - 7f800000 AND c683287b - 7fbfffff AND c683287b - 7fc00000 => c683287b ff800000 7fffffff 7fc00000
 #4: xvsubsp 80000000 - ff800000 AND 80000000 - c683287b AND 80000000 - 80000000 AND 80000000 - 00000000 => 7f800000 4683287b 00000000 80000000
-#5: xvsubsp 80000000 - 00000000 AND 80000000 - 7f800000 AND 80000000 - 7fffffff AND 80000000 - 7fc00000 => 80000000 ff800000 7fffffff 7fc00000
+#5: xvsubsp 80000000 - 00000000 AND 80000000 - 7f800000 AND 80000000 - 7fbfffff AND 80000000 - 7fc00000 => 80000000 ff800000 7fffffff 7fc00000
 #6: xvsubsp 00000000 - ff800000 AND 00000000 - c683287b AND 00000000 - 80000000 AND 00000000 - 00000000 => 7f800000 4683287b 00000000 00000000
-#7: xvsubsp 00000000 - 00000000 AND 00000000 - 7f800000 AND 00000000 - 7fffffff AND 00000000 - 7fc00000 => 00000000 ff800000 7fffffff 7fc00000
+#7: xvsubsp 00000000 - 00000000 AND 00000000 - 7f800000 AND 00000000 - 7fbfffff AND 00000000 - 7fc00000 => 00000000 ff800000 7fffffff 7fc00000
 #8: xvsubsp 00000000 - ff800000 AND 00000000 - c683287b AND 00000000 - 80000000 AND 00000000 - 00000000 => 7f800000 4683287b 00000000 00000000
-#9: xvsubsp 00000000 - 42780000 AND 00000000 - 7f800000 AND 00000000 - 7fffffff AND 00000000 - 7fc00000 => c2780000 ff800000 7fffffff 7fc00000
+#9: xvsubsp 00000000 - 42780000 AND 00000000 - 7f800000 AND 00000000 - 7fbfffff AND 00000000 - 7fc00000 => c2780000 ff800000 7fffffff 7fc00000
 #10: xvsubsp 7f800000 - ff800000 AND 7f800000 - c683287b AND 7f800000 - 80000000 AND 7f800000 - 00000000 => 7f800000 7f800000 7f800000 7f800000
-#11: xvsubsp 7f800000 - 00000000 AND 7f800000 - 7f800000 AND 7f800000 - 7fffffff AND 7f800000 - 7fc00000 => 7f800000 7fc00000 7fffffff 7fc00000
-#12: xvsubsp ffffffff - ff800000 AND ffffffff - c683287b AND ffc00000 - 80000000 AND ffc00000 - 00000000 => ffffffff ffffffff ffc00000 ffc00000
-#13: xvsubsp ffffffff - 00000000 AND ffffffff - 7f800000 AND ffffffff - 7fffffff AND ffffffff - 7fc00000 => ffffffff ffffffff ffffffff ffffffff
+#11: xvsubsp 7f800000 - 00000000 AND 7f800000 - 7f800000 AND 7f800000 - 7fbfffff AND 7f800000 - 7fc00000 => 7f800000 7fc00000 7fffffff 7fc00000
+#12: xvsubsp ffbfffff - ff800000 AND ffbfffff - c683287b AND ffc00000 - 80000000 AND ffc00000 - 00000000 => ffffffff ffffffff ffc00000 ffc00000
+#13: xvsubsp ffbfffff - 00000000 AND ffbfffff - 7f800000 AND ffbfffff - 7fbfffff AND ffbfffff - 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvsubsp ffc00000 - ff800000 AND ffc00000 - c683287b AND ffc00000 - 80000000 AND 49192c2d - 49c1288d => ffc00000 ffc00000 ffc00000 c96924ed
-#15: xvsubsp 49192c2d - 49c1288d AND 7fffffff - 7fc00000 AND 7fc00000 - 7fc00000 AND 7fc00000 - ffc00000 => c96924ed 7fffffff 7fc00000 7fc00000
+#15: xvsubsp 49192c2d - 49c1288d AND 7fbfffff - 7fc00000 AND 7fc00000 - 7fc00000 AND 7fc00000 - ffc00000 => c96924ed 7fffffff 7fc00000 7fc00000
 
 
 #0: xvmaxdp fff0000000000000 @max@ fff0000000000000 AND fff0000000000000 @max@ c0d0650f5a07b353 => fff0000000000000 c0d0650f5a07b353
@@ -602,39 +602,39 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvmaxsp ff800000 @max@ ff800000 AND ff800000 @max@ c683287b AND 49192c2d @max@ 49c1288d AND ff800000 @max@ 00000000 => ff800000 c683287b 49c1288d 00000000
-#1: xvmaxsp ff800000 @max@ 00000000 AND ff800000 @max@ 7f800000 AND ff800000 @max@ 7fffffff AND ff800000 @max@ 7fc00000 => 00000000 7f800000 ff800000 ff800000
+#1: xvmaxsp ff800000 @max@ 00000000 AND ff800000 @max@ 7f800000 AND ff800000 @max@ 7fbfffff AND ff800000 @max@ 7fc00000 => 00000000 7f800000 7fffffff ff800000
 #2: xvmaxsp c683287b @max@ ff800000 AND c683287b @max@ c683287b AND c683287b @max@ 80000000 AND c683287b @max@ 00000000 => c683287b c683287b 80000000 00000000
-#3: xvmaxsp c683287b @max@ 00000000 AND c683287b @max@ 7f800000 AND c683287b @max@ 7fffffff AND c683287b @max@ 7fc00000 => 00000000 7f800000 c683287b c683287b
+#3: xvmaxsp c683287b @max@ 00000000 AND c683287b @max@ 7f800000 AND c683287b @max@ 7fbfffff AND c683287b @max@ 7fc00000 => 00000000 7f800000 7fffffff c683287b
 #4: xvmaxsp 80000000 @max@ ff800000 AND 80000000 @max@ c683287b AND 80000000 @max@ 80000000 AND 80000000 @max@ 00000000 => 80000000 80000000 80000000 00000000
-#5: xvmaxsp 80000000 @max@ 00000000 AND 80000000 @max@ 7f800000 AND 80000000 @max@ 7fffffff AND 80000000 @max@ 7fc00000 => 00000000 7f800000 80000000 80000000
+#5: xvmaxsp 80000000 @max@ 00000000 AND 80000000 @max@ 7f800000 AND 80000000 @max@ 7fbfffff AND 80000000 @max@ 7fc00000 => 00000000 7f800000 7fffffff 80000000
 #6: xvmaxsp 00000000 @max@ ff800000 AND 00000000 @max@ c683287b AND 00000000 @max@ 80000000 AND 00000000 @max@ 00000000 => 00000000 00000000 00000000 00000000
-#7: xvmaxsp 00000000 @max@ 00000000 AND 00000000 @max@ 7f800000 AND 00000000 @max@ 7fffffff AND 00000000 @max@ 7fc00000 => 00000000 7f800000 00000000 00000000
+#7: xvmaxsp 00000000 @max@ 00000000 AND 00000000 @max@ 7f800000 AND 00000000 @max@ 7fbfffff AND 00000000 @max@ 7fc00000 => 00000000 7f800000 7fffffff 00000000
 #8: xvmaxsp 00000000 @max@ ff800000 AND 00000000 @max@ c683287b AND 00000000 @max@ 80000000 AND 00000000 @max@ 00000000 => 00000000 00000000 00000000 00000000
-#9: xvmaxsp 00000000 @max@ 42780000 AND 00000000 @max@ 7f800000 AND 00000000 @max@ 7fffffff AND 00000000 @max@ 7fc00000 => 42780000 7f800000 00000000 00000000
+#9: xvmaxsp 00000000 @max@ 42780000 AND 00000000 @max@ 7f800000 AND 00000000 @max@ 7fbfffff AND 00000000 @max@ 7fc00000 => 42780000 7f800000 7fffffff 00000000
 #10: xvmaxsp 7f800000 @max@ ff800000 AND 7f800000 @max@ c683287b AND 7f800000 @max@ 80000000 AND 7f800000 @max@ 00000000 => 7f800000 7f800000 7f800000 7f800000
-#11: xvmaxsp 7f800000 @max@ 00000000 AND 7f800000 @max@ 7f800000 AND 7f800000 @max@ 7fffffff AND 7f800000 @max@ 7fc00000 => 7f800000 7f800000 7f800000 7f800000
-#12: xvmaxsp ffffffff @max@ ff800000 AND ffffffff @max@ c683287b AND ffc00000 @max@ 80000000 AND ffc00000 @max@ 00000000 => ff800000 c683287b 80000000 00000000
-#13: xvmaxsp ffffffff @max@ 00000000 AND ffffffff @max@ 7f800000 AND ffffffff @max@ 7fffffff AND ffffffff @max@ 7fc00000 => 00000000 7f800000 ffffffff ffffffff
+#11: xvmaxsp 7f800000 @max@ 00000000 AND 7f800000 @max@ 7f800000 AND 7f800000 @max@ 7fbfffff AND 7f800000 @max@ 7fc00000 => 7f800000 7f800000 7fffffff 7f800000
+#12: xvmaxsp ffbfffff @max@ ff800000 AND ffbfffff @max@ c683287b AND ffc00000 @max@ 80000000 AND ffc00000 @max@ 00000000 => ffffffff ffffffff 80000000 00000000
+#13: xvmaxsp ffbfffff @max@ 00000000 AND ffbfffff @max@ 7f800000 AND ffbfffff @max@ 7fbfffff AND ffbfffff @max@ 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvmaxsp ffc00000 @max@ ff800000 AND ffc00000 @max@ c683287b AND ffc00000 @max@ 80000000 AND 49192c2d @max@ 49c1288d => ff800000 c683287b 80000000 49c1288d
-#15: xvmaxsp 49192c2d @max@ 49c1288d AND 7fffffff @max@ 7fc00000 AND 7fc00000 @max@ 7fc00000 AND 7fc00000 @max@ ffc00000 => 49c1288d 7fffffff 7fc00000 7fc00000
+#15: xvmaxsp 49192c2d @max@ 49c1288d AND 7fbfffff @max@ 7fc00000 AND 7fc00000 @max@ 7fc00000 AND 7fc00000 @max@ ffc00000 => 49c1288d 7fffffff 7fc00000 7fc00000
 
 
 #0: xvminsp ff800000 @min@ ff800000 AND ff800000 @min@ c683287b AND 49192c2d @min@ 49c1288d AND ff800000 @min@ 00000000 => ff800000 ff800000 49192c2d ff800000
-#1: xvminsp ff800000 @min@ 00000000 AND ff800000 @min@ 7f800000 AND ff800000 @min@ 7fffffff AND ff800000 @min@ 7fc00000 => ff800000 ff800000 ff800000 ff800000
+#1: xvminsp ff800000 @min@ 00000000 AND ff800000 @min@ 7f800000 AND ff800000 @min@ 7fbfffff AND ff800000 @min@ 7fc00000 => ff800000 ff800000 7fffffff ff800000
 #2: xvminsp c683287b @min@ ff800000 AND c683287b @min@ c683287b AND c683287b @min@ 80000000 AND c683287b @min@ 00000000 => ff800000 c683287b c683287b c683287b
-#3: xvminsp c683287b @min@ 00000000 AND c683287b @min@ 7f800000 AND c683287b @min@ 7fffffff AND c683287b @min@ 7fc00000 => c683287b c683287b c683287b c683287b
+#3: xvminsp c683287b @min@ 00000000 AND c683287b @min@ 7f800000 AND c683287b @min@ 7fbfffff AND c683287b @min@ 7fc00000 => c683287b c683287b 7fffffff c683287b
 #4: xvminsp 80000000 @min@ ff800000 AND 80000000 @min@ c683287b AND 80000000 @min@ 80000000 AND 80000000 @min@ 00000000 => ff800000 c683287b 80000000 80000000
-#5: xvminsp 80000000 @min@ 00000000 AND 80000000 @min@ 7f800000 AND 80000000 @min@ 7fffffff AND 80000000 @min@ 7fc00000 => 80000000 80000000 80000000 80000000
+#5: xvminsp 80000000 @min@ 00000000 AND 80000000 @min@ 7f800000 AND 80000000 @min@ 7fbfffff AND 80000000 @min@ 7fc00000 => 80000000 80000000 7fffffff 80000000
 #6: xvminsp 00000000 @min@ ff800000 AND 00000000 @min@ c683287b AND 00000000 @min@ 80000000 AND 00000000 @min@ 00000000 => ff800000 c683287b 80000000 00000000
-#7: xvminsp 00000000 @min@ 00000000 AND 00000000 @min@ 7f800000 AND 00000000 @min@ 7fffffff AND 00000000 @min@ 7fc00000 => 00000000 00000000 00000000 00000000
+#7: xvminsp 00000000 @min@ 00000000 AND 00000000 @min@ 7f800000 AND 00000000 @min@ 7fbfffff AND 00000000 @min@ 7fc00000 => 00000000 00000000 7fffffff 00000000
 #8: xvminsp 00000000 @min@ ff800000 AND 00000000 @min@ c683287b AND 00000000 @min@ 80000000 AND 00000000 @min@ 00000000 => ff800000 c683287b 80000000 00000000
-#9: xvminsp 00000000 @min@ 42780000 AND 00000000 @min@ 7f800000 AND 00000000 @min@ 7fffffff AND 00000000 @min@ 7fc00000 => 00000000 00000000 00000000 00000000
+#9: xvminsp 00000000 @min@ 42780000 AND 00000000 @min@ 7f800000 AND 00000000 @min@ 7fbfffff AND 00000000 @min@ 7fc00000 => 00000000 00000000 7fffffff 00000000
 #10: xvminsp 7f800000 @min@ ff800000 AND 7f800000 @min@ c683287b AND 7f800000 @min@ 80000000 AND 7f800000 @min@ 00000000 => ff800000 c683287b 80000000 00000000
-#11: xvminsp 7f800000 @min@ 00000000 AND 7f800000 @min@ 7f800000 AND 7f800000 @min@ 7fffffff AND 7f800000 @min@ 7fc00000 => 00000000 7f800000 7f800000 7f800000
-#12: xvminsp ffffffff @min@ ff800000 AND ffffffff @min@ c683287b AND ffc00000 @min@ 80000000 AND ffc00000 @min@ 00000000 => ff800000 c683287b 80000000 00000000
-#13: xvminsp ffffffff @min@ 00000000 AND ffffffff @min@ 7f800000 AND ffffffff @min@ 7fffffff AND ffffffff @min@ 7fc00000 => 00000000 7f800000 ffffffff ffffffff
+#11: xvminsp 7f800000 @min@ 00000000 AND 7f800000 @min@ 7f800000 AND 7f800000 @min@ 7fbfffff AND 7f800000 @min@ 7fc00000 => 00000000 7f800000 7fffffff 7f800000
+#12: xvminsp ffbfffff @min@ ff800000 AND ffbfffff @min@ c683287b AND ffc00000 @min@ 80000000 AND ffc00000 @min@ 00000000 => ffffffff ffffffff 80000000 00000000
+#13: xvminsp ffbfffff @min@ 00000000 AND ffbfffff @min@ 7f800000 AND ffbfffff @min@ 7fbfffff AND ffbfffff @min@ 7fc00000 => ffffffff ffffffff ffffffff ffffffff
 #14: xvminsp ffc00000 @min@ ff800000 AND ffc00000 @min@ c683287b AND ffc00000 @min@ 80000000 AND 49192c2d @min@ 49c1288d => ff800000 c683287b 80000000 49192c2d
-#15: xvminsp 49192c2d @min@ 49c1288d AND 7fffffff @min@ 7fc00000 AND 7fc00000 @min@ 7fc00000 AND 7fc00000 @min@ ffc00000 => 49192c2d 7fffffff 7fc00000 7fc00000
+#15: xvminsp 49192c2d @min@ 49c1288d AND 7fbfffff @min@ 7fc00000 AND 7fc00000 @min@ 7fc00000 AND 7fc00000 @min@ ffc00000 => 49192c2d 7fffffff 7fc00000 7fc00000
 
 
 #0: xvcpsgndp fff0000000000000 +-cp fff0000000000000 AND fff0000000000000 +-cp c0d0650f5a07b353 => fff0000000000000 c0d0650f5a07b353
@@ -672,21 +672,21 @@ Test VSX floating point compare and basic arithmetic instructions
 
 
 #0: xvcpsgnsp ff800000 +-cp ff800000 AND ff800000 +-cp c683287b AND 49192c2d +-cp 49c1288d AND ff800000 +-cp 00000000 => ff800000 c683287b 49c1288d 80000000
-#1: xvcpsgnsp ff800000 +-cp 00000000 AND ff800000 +-cp 7f800000 AND ff800000 +-cp 7fffffff AND ff800000 +-cp 7fc00000 => 80000000 ff800000 ffffffff ffc00000
+#1: xvcpsgnsp ff800000 +-cp 00000000 AND ff800000 +-cp 7f800000 AND ff800000 +-cp 7fbfffff AND ff800000 +-cp 7fc00000 => 80000000 ff800000 ffbfffff ffc00000
 #2: xvcpsgnsp c683287b +-cp ff800000 AND c683287b +-cp c683287b AND c683287b +-cp 80000000 AND c683287b +-cp 00000000 => ff800000 c683287b 80000000 80000000
-#3: xvcpsgnsp c683287b +-cp 00000000 AND c683287b +-cp 7f800000 AND c683287b +-cp 7fffffff AND c683287b +-cp 7fc00000 => 80000000 ff800000 ffffffff ffc00000
+#3: xvcpsgnsp c683287b +-cp 00000000 AND c683287b +-cp 7f800000 AND c683287b +-cp 7fbfffff AND c683287b +-cp 7fc00000 => 80000000 ff800000 ffbfffff ffc00000
 #4: xvcpsgnsp 80000000 +-cp ff800000 AND 80000000 +-cp c683287b AND 80000000 +-cp 80000000 AND 80000000 +-cp 00000000 => ff800000 c683287b 80000000 80000000
-#5: xvcpsgnsp 80000000 +-cp 00000000 AND 80000000 +-cp 7f800000 AND 80000000 +-cp 7fffffff AND 80000000 +-cp 7fc00000 => 80000000 ff800000 ffffffff ffc00000
+#5: xvcpsgnsp 80000000 +-cp 00000000 AND 80000000 +-cp 7f800000 AND 80000000 +-cp 7fbfffff AND 80000000 +-cp 7fc00000 => 80000000 ff800000 ffbfffff ffc00000
 #6: xvcpsgnsp 00000000 +-cp ff800000 AND 00000000 +-cp c683287b AND 00000000 +-cp 80000000 AND 00000000 +-cp 00000000 => 7f800000 4683287b 00000000 00000000
-#7: xvcpsgnsp 00000000 +-cp 00000000 AND 00000000 +-cp 7f800000 AND 00000000 +-cp 7fffffff AND 00000000 +-cp 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
+#7: xvcpsgnsp 00000000 +-cp 00000000 AND 00000000 +-cp 7f800000 AND 00000000 +-cp 7fbfffff AND 00000000 +-cp 7fc00000 => 00000000 7f800000 7fbfffff 7fc00000
 #8: xvcpsgnsp 00000000 +-cp ff800000 AND 00000000 +-cp c683287b AND 00000000 +-cp 80000000 AND 00000000 +-cp 00000000 => 7f800000 4683287b 00000000 00000000
-#9: xvcpsgnsp 00000000 +-cp 42780000 AND 00000000 +-cp 7f800000 AND 00000000 +-cp 7fffffff AND 00000000 +-cp 7fc00000 => 42780000 7f800000 7fffffff 7fc00000
+#9: xvcpsgnsp 00000000 +-cp 42780000 AND 00000000 +-cp 7f800000 AND 00000000 +-cp 7fbfffff AND 00000000 +-cp 7fc00000 => 42780000 7f800000 7fbfffff 7fc00000
 #10: xvcpsgnsp 7f800000 +-cp ff800000 AND 7f800000 +-cp c683287b AND 7f800000 +-cp 80000000 AND 7f800000 +-cp 00000000 => 7f800000 4683287b 00000000 00000000
-#11: xvcpsgnsp 7f800000 +-cp 00000000 AND 7f800000 +-cp 7f800000 AND 7f800000 +-cp 7fffffff AND 7f800000 +-cp 7fc00000 => 00000000 7f800000 7fffffff 7fc00000
-#12: xvcpsgnsp ffffffff +-cp ff800000 AND ffffffff +-cp c683287b AND ffc00000 +-cp 80000000 AND ffc00000 +-cp 00000000 => ff800000 c683287b 80000000 80000000
-#13: xvcpsgnsp ffffffff +-cp 00000000 AND ffffffff +-cp 7f800000 AND ffffffff +-cp 7fffffff AND ffffffff +-cp 7fc00000 => 80000000 ff800000 ffffffff ffc00000
+#11: xvcpsgnsp 7f800000 +-cp 00000000 AND 7f800000 +-cp 7f800000 AND 7f800000 +-cp 7fbfffff AND 7f800000 +-cp 7fc00000 => 00000000 7f800000 7fbfffff 7fc00000
+#12: xvcpsgnsp ffbfffff +-cp ff800000 AND ffbfffff +-cp c683287b AND ffc00000 +-cp 80000000 AND ffc00000 +-cp 00000000 => ff800000 c683287b 80000000 80000000
+#13: xvcpsgnsp ffbfffff +-cp 00000000 AND ffbfffff +-cp 7f800000 AND ffbfffff +-cp 7fbfffff AND ffbfffff +-cp 7fc00000 => 80000000 ff800000 ffbfffff ffc00000
 #14: xvcpsgnsp ffc00000 +-cp ff800000 AND ffc00000 +-cp c683287b AND ffc00000 +-cp 80000000 AND 49192c2d +-cp 49c1288d => ff800000 c683287b 80000000 49c1288d
-#15: xvcpsgnsp 49192c2d +-cp 49c1288d AND 7fffffff +-cp 7fc00000 AND 7fc00000 +-cp 7fc00000 AND 7fc00000 +-cp ffc00000 => 49c1288d 7fc00000 7fc00000 7fc00000
+#15: xvcpsgnsp 49192c2d +-cp 49c1288d AND 7fbfffff +-cp 7fc00000 AND 7fc00000 +-cp 7fc00000 AND 7fc00000 +-cp ffc00000 => 49c1288d 7fc00000 7fc00000 7fc00000
 
 
 Test bit permute double
@@ -1141,38 +1141,38 @@ Test floating point arithmetic instructions -- with a{d|s}p or m{d|s}p
 #31: xvmaddmdp *+(0018000000b77501,7ff8000000000000,7ff8000000000000) AND *+(7fe800000000051b,7ff8000000000000,fff8000000000000) => 7ff8000000000000 7ff8000000000000
 
 #0: xvmaddasp *+(ff800000,ff800000,3ec00000) AND *+(c683287b,ff800000,42780000) AND *+(49c1288d,49192c2d,00000000) AND *+(00000000,ff800000,7f800000) => ff800000 ff800000 49c1288d ff800000
-#1: xvmaddasp *+(00000000,ff800000,00000000) AND *+(7f800000,ff800000,00000000) AND *+(7fffffff,ff800000,80000000) AND *+(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvmaddasp *+(ff800000,c683287b,ff800000) AND *+(c683287b,c683287b,7fffffff) AND *+(80000000,c683287b,ffffffff) AND *+(00000000,c683287b,7fc00000) => 7fc00000 7fffffff ffffffff 7fc00000
-#3: xvmaddasp *+(00000000,c683287b,ffc00000) AND *+(7f800000,c683287b,80000000) AND *+(7fffffff,c683287b,c683287b) AND *+(7fc00000,c683287b,49192c2d) => ffc00000 7f800000 7fffffff 7fc00000
+#1: xvmaddasp *+(00000000,ff800000,00000000) AND *+(7f800000,ff800000,00000000) AND *+(7fbfffff,ff800000,80000000) AND *+(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvmaddasp *+(ff800000,c683287b,ff800000) AND *+(c683287b,c683287b,7fbfffff) AND *+(80000000,c683287b,ffbfffff) AND *+(00000000,c683287b,7fc00000) => 7fc00000 7fffffff ffffffff 7fc00000
+#3: xvmaddasp *+(00000000,c683287b,ffc00000) AND *+(7f800000,c683287b,80000000) AND *+(7fbfffff,c683287b,c683287b) AND *+(7fc00000,c683287b,49192c2d) => ffc00000 7f800000 7fffffff 7fc00000
 #4: xvmaddasp *+(ff800000,80000000,7f800000) AND *+(c683287b,80000000,00000000) AND *+(80000000,80000000,00000000) AND *+(00000000,80000000,80000000) => 7fc00000 c683287b 80000000 00000000
-#5: xvmaddasp *+(00000000,80000000,7f800000) AND *+(7f800000,80000000,ff800000) AND *+(7fffffff,80000000,7fffffff) AND *+(7fc00000,80000000,ffffffff) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvmaddasp *+(00000000,80000000,7f800000) AND *+(7f800000,80000000,ff800000) AND *+(7fbfffff,80000000,7fbfffff) AND *+(7fc00000,80000000,ffbfffff) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvmaddasp *+(ff800000,00000000,7fc00000) AND *+(c683287b,00000000,ffc00000) AND *+(80000000,00000000,80000000) AND *+(00000000,00000000,c683287b) => 7fc00000 ffc00000 80000000 00000000
-#7: xvmaddasp *+(00000000,00000000,00000000) AND *+(7f800000,00000000,7f800000) AND *+(7fffffff,00000000,00000000) AND *+(7fc00000,00000000,00000000) => 00000000 7fc00000 7fffffff 7fc00000
-#8: xvmaddasp *+(ff800000,00000000,80000000) AND *+(c683287b,00000000,7f800000) AND *+(80000000,00000000,ff800000) AND *+(00000000,00000000,7fffffff) => ff800000 7fc00000 7fc00000 7fffffff
-#9: xvmaddasp *+(42780000,00000000,ffffffff) AND *+(7f800000,00000000,7fc00000) AND *+(7fffffff,00000000,ffc00000) AND *+(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvmaddasp *+(00000000,00000000,00000000) AND *+(7f800000,00000000,7f800000) AND *+(7fbfffff,00000000,00000000) AND *+(7fc00000,00000000,00000000) => 00000000 7fc00000 7fffffff 7fc00000
+#8: xvmaddasp *+(ff800000,00000000,80000000) AND *+(c683287b,00000000,7f800000) AND *+(80000000,00000000,ff800000) AND *+(00000000,00000000,7fbfffff) => ff800000 7fc00000 7fc00000 7fffffff
+#9: xvmaddasp *+(42780000,00000000,ffbfffff) AND *+(7f800000,00000000,7fc00000) AND *+(7fbfffff,00000000,ffc00000) AND *+(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvmaddasp *+(ff800000,7f800000,42780000) AND *+(c683287b,7f800000,00000000) AND *+(80000000,7f800000,7f800000) AND *+(00000000,7f800000,00000000) => 7fc00000 7fc00000 7f800000 7fc00000
-#11: xvmaddasp *+(00000000,7f800000,00000000) AND *+(7f800000,7f800000,80000000) AND *+(7fffffff,7f800000,7f800000) AND *+(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvmaddasp *+(ff800000,ffffffff,7fffffff) AND *+(c683287b,ffffffff,ffffffff) AND *+(80000000,ffc00000,7fc00000) AND *+(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvmaddasp *+(00000000,ffffffff,3ec00000) AND *+(7f800000,ffffffff,42780000) AND *+(7fffffff,ffffffff,00000000) AND *+(7fc00000,ffffffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvmaddasp *+(00000000,7f800000,00000000) AND *+(7f800000,7f800000,80000000) AND *+(7fbfffff,7f800000,7f800000) AND *+(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvmaddasp *+(ff800000,ffbfffff,7fbfffff) AND *+(c683287b,ffbfffff,ffbfffff) AND *+(80000000,ffc00000,7fc00000) AND *+(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvmaddasp *+(00000000,ffbfffff,3ec00000) AND *+(7f800000,ffbfffff,42780000) AND *+(7fbfffff,ffbfffff,00000000) AND *+(7fc00000,ffbfffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvmaddasp *+(ff800000,ffc00000,00000000) AND *+(c683287b,ffc00000,00000000) AND *+(80000000,ffc00000,80000000) AND *+(49c1288d,49192c2d,7f800000) => ffc00000 ffc00000 ffc00000 7f800000
-#15: xvmaddasp *+(49c1288d,49192c2d,ff800000) AND *+(7fc00000,7fffffff,7fffffff) AND *+(7fc00000,7fc00000,ffffffff) AND *+(ffc00000,7fc00000,7fc00000) => ff800000 7fffffff 7fc00000 7fc00000
+#15: xvmaddasp *+(49c1288d,49192c2d,ff800000) AND *+(7fc00000,7fbfffff,7fbfffff) AND *+(7fc00000,7fc00000,ffbfffff) AND *+(ffc00000,7fc00000,7fc00000) => ff800000 7fffffff 7fc00000 7fc00000
 
 #0: xvmaddmsp *+(3ec00000,ff800000,ff800000) AND *+(42780000,ff800000,c683287b) AND *+(00000000,49192c2d,49c1288d) AND *+(7f800000,ff800000,00000000) => ff800000 ff800000 49c1288d ff800000
-#1: xvmaddmsp *+(00000000,ff800000,00000000) AND *+(00000000,ff800000,7f800000) AND *+(80000000,ff800000,7fffffff) AND *+(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvmaddmsp *+(ff800000,c683287b,ff800000) AND *+(7fffffff,c683287b,c683287b) AND *+(ffffffff,c683287b,80000000) AND *+(7fc00000,c683287b,00000000) => 7fc00000 7fffffff ffffffff 7fc00000
-#3: xvmaddmsp *+(ffc00000,c683287b,00000000) AND *+(80000000,c683287b,7f800000) AND *+(c683287b,c683287b,7fffffff) AND *+(49192c2d,c683287b,7fc00000) => ffc00000 7f800000 7fffffff 7fc00000
+#1: xvmaddmsp *+(00000000,ff800000,00000000) AND *+(00000000,ff800000,7f800000) AND *+(80000000,ff800000,7fbfffff) AND *+(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvmaddmsp *+(ff800000,c683287b,ff800000) AND *+(7fbfffff,c683287b,c683287b) AND *+(ffbfffff,c683287b,80000000) AND *+(7fc00000,c683287b,00000000) => 7fc00000 7fffffff ffffffff 7fc00000
+#3: xvmaddmsp *+(ffc00000,c683287b,00000000) AND *+(80000000,c683287b,7f800000) AND *+(c683287b,c683287b,7fbfffff) AND *+(49192c2d,c683287b,7fc00000) => ffc00000 7f800000 7fffffff 7fc00000
 #4: xvmaddmsp *+(7f800000,80000000,ff800000) AND *+(00000000,80000000,c683287b) AND *+(00000000,80000000,80000000) AND *+(80000000,80000000,00000000) => 7fc00000 c683287b 80000000 00000000
-#5: xvmaddmsp *+(7f800000,80000000,00000000) AND *+(ff800000,80000000,7f800000) AND *+(7fffffff,80000000,7fffffff) AND *+(ffffffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvmaddmsp *+(7f800000,80000000,00000000) AND *+(ff800000,80000000,7f800000) AND *+(7fbfffff,80000000,7fbfffff) AND *+(ffbfffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvmaddmsp *+(7fc00000,00000000,ff800000) AND *+(ffc00000,00000000,c683287b) AND *+(80000000,00000000,80000000) AND *+(c683287b,00000000,00000000) => 7fc00000 ffc00000 80000000 00000000
-#7: xvmaddmsp *+(00000000,00000000,00000000) AND *+(7f800000,00000000,7f800000) AND *+(00000000,00000000,7fffffff) AND *+(00000000,00000000,7fc00000) => 00000000 7fc00000 7fffffff 7fc00000
-#8: xvmaddmsp *+(80000000,00000000,ff800000) AND *+(7f800000,00000000,c683287b) AND *+(ff800000,00000000,80000000) AND *+(7fffffff,00000000,00000000) => ff800000 7fc00000 7fc00000 7fffffff
-#9: xvmaddmsp *+(ffffffff,00000000,42780000) AND *+(7fc00000,00000000,7f800000) AND *+(ffc00000,00000000,7fffffff) AND *+(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvmaddmsp *+(00000000,00000000,00000000) AND *+(7f800000,00000000,7f800000) AND *+(00000000,00000000,7fbfffff) AND *+(00000000,00000000,7fc00000) => 00000000 7fc00000 7fffffff 7fc00000
+#8: xvmaddmsp *+(80000000,00000000,ff800000) AND *+(7f800000,00000000,c683287b) AND *+(ff800000,00000000,80000000) AND *+(7fbfffff,00000000,00000000) => ff800000 7fc00000 7fc00000 7fffffff
+#9: xvmaddmsp *+(ffbfffff,00000000,42780000) AND *+(7fc00000,00000000,7f800000) AND *+(ffc00000,00000000,7fbfffff) AND *+(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvmaddmsp *+(42780000,7f800000,ff800000) AND *+(00000000,7f800000,c683287b) AND *+(7f800000,7f800000,80000000) AND *+(00000000,7f800000,00000000) => 7fc00000 7fc00000 7f800000 7fc00000
-#11: xvmaddmsp *+(00000000,7f800000,00000000) AND *+(80000000,7f800000,7f800000) AND *+(7f800000,7f800000,7fffffff) AND *+(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvmaddmsp *+(7fffffff,ffffffff,ff800000) AND *+(ffffffff,ffffffff,c683287b) AND *+(7fc00000,ffc00000,80000000) AND *+(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvmaddmsp *+(3ec00000,ffffffff,00000000) AND *+(42780000,ffffffff,7f800000) AND *+(00000000,ffffffff,7fffffff) AND *+(7f800000,ffffffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvmaddmsp *+(00000000,7f800000,00000000) AND *+(80000000,7f800000,7f800000) AND *+(7f800000,7f800000,7fbfffff) AND *+(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvmaddmsp *+(7fbfffff,ffbfffff,ff800000) AND *+(ffbfffff,ffbfffff,c683287b) AND *+(7fc00000,ffc00000,80000000) AND *+(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvmaddmsp *+(3ec00000,ffbfffff,00000000) AND *+(42780000,ffbfffff,7f800000) AND *+(00000000,ffbfffff,7fbfffff) AND *+(7f800000,ffbfffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvmaddmsp *+(00000000,ffc00000,ff800000) AND *+(00000000,ffc00000,c683287b) AND *+(80000000,ffc00000,80000000) AND *+(7f800000,49192c2d,49c1288d) => ffc00000 ffc00000 ffc00000 7f800000
-#15: xvmaddmsp *+(ff800000,49192c2d,49c1288d) AND *+(7fffffff,7fffffff,7fc00000) AND *+(ffffffff,7fc00000,7fc00000) AND *+(7fc00000,7fc00000,ffc00000) => ff800000 7fffffff 7fc00000 7fc00000
+#15: xvmaddmsp *+(ff800000,49192c2d,49c1288d) AND *+(7fbfffff,7fbfffff,7fc00000) AND *+(ffbfffff,7fc00000,7fc00000) AND *+(7fc00000,7fc00000,ffc00000) => ff800000 7fffffff 7fc00000 7fc00000
 
 #0: xvnmaddadp !*+(fff0000000000000,fff0000000000000,3fd8000000000000) AND !*+(c0d0650f5a07b353,fff0000000000000,404f000000000000) => 7ff0000000000000 7ff0000000000000
 #1: xvnmaddadp !*+(41382511a2000000,41232585a9900000,0018000000b77501) AND !*+(0000000000000000,fff0000000000000,7fe800000000051b) => c1382511a2000000 7ff0000000000000
@@ -1241,38 +1241,38 @@ Test floating point arithmetic instructions -- with a{d|s}p or m{d|s}p
 #31: xvnmaddmdp !*+(0018000000b77501,7ff8000000000000,7ff8000000000000) AND !*+(7fe800000000051b,7ff8000000000000,fff8000000000000) => 7ff8000000000000 7ff8000000000000
 
 #0: xvnmaddasp !*+(ff800000,ff800000,3ec00000) AND !*+(c683287b,ff800000,42780000) AND !*+(49c1288d,49192c2d,00000000) AND !*+(00000000,ff800000,7f800000) => 7f800000 7f800000 c9c1288d 7f800000
-#1: xvnmaddasp !*+(00000000,ff800000,00000000) AND !*+(7f800000,ff800000,00000000) AND !*+(7fffffff,ff800000,80000000) AND !*+(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvnmaddasp !*+(ff800000,c683287b,ff800000) AND !*+(c683287b,c683287b,7fffffff) AND !*+(80000000,c683287b,ffffffff) AND !*+(00000000,c683287b,7fc00000) => 7fc00000 7fffffff ffffffff 7fc00000
-#3: xvnmaddasp !*+(00000000,c683287b,ffc00000) AND !*+(7f800000,c683287b,80000000) AND !*+(7fffffff,c683287b,c683287b) AND !*+(7fc00000,c683287b,49192c2d) => ffc00000 ff800000 7fffffff 7fc00000
+#1: xvnmaddasp !*+(00000000,ff800000,00000000) AND !*+(7f800000,ff800000,00000000) AND !*+(7fbfffff,ff800000,80000000) AND !*+(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvnmaddasp !*+(ff800000,c683287b,ff800000) AND !*+(c683287b,c683287b,7fbfffff) AND !*+(80000000,c683287b,ffbfffff) AND !*+(00000000,c683287b,7fc00000) => 7fc00000 7fffffff ffffffff 7fc00000
+#3: xvnmaddasp !*+(00000000,c683287b,ffc00000) AND !*+(7f800000,c683287b,80000000) AND !*+(7fbfffff,c683287b,c683287b) AND !*+(7fc00000,c683287b,49192c2d) => ffc00000 ff800000 7fffffff 7fc00000
 #4: xvnmaddasp !*+(ff800000,80000000,7f800000) AND !*+(c683287b,80000000,00000000) AND !*+(80000000,80000000,00000000) AND !*+(00000000,80000000,80000000) => 7fc00000 4683287b 00000000 80000000
-#5: xvnmaddasp !*+(00000000,80000000,7f800000) AND !*+(7f800000,80000000,ff800000) AND !*+(7fffffff,80000000,7fffffff) AND !*+(7fc00000,80000000,ffffffff) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvnmaddasp !*+(00000000,80000000,7f800000) AND !*+(7f800000,80000000,ff800000) AND !*+(7fbfffff,80000000,7fbfffff) AND !*+(7fc00000,80000000,ffbfffff) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvnmaddasp !*+(ff800000,00000000,7fc00000) AND !*+(c683287b,00000000,ffc00000) AND !*+(80000000,00000000,80000000) AND !*+(00000000,00000000,c683287b) => 7fc00000 ffc00000 00000000 80000000
-#7: xvnmaddasp !*+(00000000,00000000,00000000) AND !*+(7f800000,00000000,7f800000) AND !*+(7fffffff,00000000,00000000) AND !*+(7fc00000,00000000,00000000) => 80000000 7fc00000 7fffffff 7fc00000
-#8: xvnmaddasp !*+(ff800000,00000000,80000000) AND !*+(c683287b,00000000,7f800000) AND !*+(80000000,00000000,ff800000) AND !*+(00000000,00000000,7fffffff) => 7f800000 7fc00000 7fc00000 7fffffff
-#9: xvnmaddasp !*+(42780000,00000000,ffffffff) AND !*+(7f800000,00000000,7fc00000) AND !*+(7fffffff,00000000,ffc00000) AND !*+(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvnmaddasp !*+(00000000,00000000,00000000) AND !*+(7f800000,00000000,7f800000) AND !*+(7fbfffff,00000000,00000000) AND !*+(7fc00000,00000000,00000000) => 80000000 7fc00000 7fffffff 7fc00000
+#8: xvnmaddasp !*+(ff800000,00000000,80000000) AND !*+(c683287b,00000000,7f800000) AND !*+(80000000,00000000,ff800000) AND !*+(00000000,00000000,7fbfffff) => 7f800000 7fc00000 7fc00000 7fffffff
+#9: xvnmaddasp !*+(42780000,00000000,ffbfffff) AND !*+(7f800000,00000000,7fc00000) AND !*+(7fbfffff,00000000,ffc00000) AND !*+(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvnmaddasp !*+(ff800000,7f800000,42780000) AND !*+(c683287b,7f800000,00000000) AND !*+(80000000,7f800000,7f800000) AND !*+(00000000,7f800000,00000000) => 7fc00000 7fc00000 ff800000 7fc00000
-#11: xvnmaddasp !*+(00000000,7f800000,00000000) AND !*+(7f800000,7f800000,80000000) AND !*+(7fffffff,7f800000,7f800000) AND !*+(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvnmaddasp !*+(ff800000,ffffffff,7fffffff) AND !*+(c683287b,ffffffff,ffffffff) AND !*+(80000000,ffc00000,7fc00000) AND !*+(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvnmaddasp !*+(00000000,ffffffff,3ec00000) AND !*+(7f800000,ffffffff,42780000) AND !*+(7fffffff,ffffffff,00000000) AND !*+(7fc00000,ffffffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvnmaddasp !*+(00000000,7f800000,00000000) AND !*+(7f800000,7f800000,80000000) AND !*+(7fbfffff,7f800000,7f800000) AND !*+(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvnmaddasp !*+(ff800000,ffbfffff,7fbfffff) AND !*+(c683287b,ffbfffff,ffbfffff) AND !*+(80000000,ffc00000,7fc00000) AND !*+(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvnmaddasp !*+(00000000,ffbfffff,3ec00000) AND !*+(7f800000,ffbfffff,42780000) AND !*+(7fbfffff,ffbfffff,00000000) AND !*+(7fc00000,ffbfffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvnmaddasp !*+(ff800000,ffc00000,00000000) AND !*+(c683287b,ffc00000,00000000) AND !*+(80000000,ffc00000,80000000) AND !*+(49c1288d,49192c2d,7f800000) => ffc00000 ffc00000 ffc00000 ff800000
-#15: xvnmaddasp !*+(49c1288d,49192c2d,ff800000) AND !*+(7fc00000,7fffffff,7fffffff) AND !*+(7fc00000,7fc00000,ffffffff) AND !*+(ffc00000,7fc00000,7fc00000) => 7f800000 7fffffff 7fc00000 7fc00000
+#15: xvnmaddasp !*+(49c1288d,49192c2d,ff800000) AND !*+(7fc00000,7fbfffff,7fbfffff) AND !*+(7fc00000,7fc00000,ffbfffff) AND !*+(ffc00000,7fc00000,7fc00000) => 7f800000 7fffffff 7fc00000 7fc00000
 
 #0: xvnmaddmsp !*+(3ec00000,ff800000,ff800000) AND !*+(42780000,ff800000,c683287b) AND !*+(00000000,49192c2d,49c1288d) AND !*+(7f800000,ff800000,00000000) => 7f800000 7f800000 c9c1288d 7f800000
-#1: xvnmaddmsp !*+(00000000,ff800000,00000000) AND !*+(00000000,ff800000,7f800000) AND !*+(80000000,ff800000,7fffffff) AND !*+(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvnmaddmsp !*+(ff800000,c683287b,ff800000) AND !*+(7fffffff,c683287b,c683287b) AND !*+(ffffffff,c683287b,80000000) AND !*+(7fc00000,c683287b,00000000) => 7fc00000 7fffffff ffffffff 7fc00000
-#3: xvnmaddmsp !*+(ffc00000,c683287b,00000000) AND !*+(80000000,c683287b,7f800000) AND !*+(c683287b,c683287b,7fffffff) AND !*+(49192c2d,c683287b,7fc00000) => ffc00000 ff800000 7fffffff 7fc00000
+#1: xvnmaddmsp !*+(00000000,ff800000,00000000) AND !*+(00000000,ff800000,7f800000) AND !*+(80000000,ff800000,7fbfffff) AND !*+(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvnmaddmsp !*+(ff800000,c683287b,ff800000) AND !*+(7fbfffff,c683287b,c683287b) AND !*+(ffbfffff,c683287b,80000000) AND !*+(7fc00000,c683287b,00000000) => 7fc00000 7fffffff ffffffff 7fc00000
+#3: xvnmaddmsp !*+(ffc00000,c683287b,00000000) AND !*+(80000000,c683287b,7f800000) AND !*+(c683287b,c683287b,7fbfffff) AND !*+(49192c2d,c683287b,7fc00000) => ffc00000 ff800000 7fffffff 7fc00000
 #4: xvnmaddmsp !*+(7f800000,80000000,ff800000) AND !*+(00000000,80000000,c683287b) AND !*+(00000000,80000000,80000000) AND !*+(80000000,80000000,00000000) => 7fc00000 4683287b 00000000 80000000
-#5: xvnmaddmsp !*+(7f800000,80000000,00000000) AND !*+(ff800000,80000000,7f800000) AND !*+(7fffffff,80000000,7fffffff) AND !*+(ffffffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvnmaddmsp !*+(7f800000,80000000,00000000) AND !*+(ff800000,80000000,7f800000) AND !*+(7fbfffff,80000000,7fbfffff) AND !*+(ffbfffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvnmaddmsp !*+(7fc00000,00000000,ff800000) AND !*+(ffc00000,00000000,c683287b) AND !*+(80000000,00000000,80000000) AND !*+(c683287b,00000000,00000000) => 7fc00000 ffc00000 00000000 80000000
-#7: xvnmaddmsp !*+(00000000,00000000,00000000) AND !*+(7f800000,00000000,7f800000) AND !*+(00000000,00000000,7fffffff) AND !*+(00000000,00000000,7fc00000) => 80000000 7fc00000 7fffffff 7fc00000
-#8: xvnmaddmsp !*+(80000000,00000000,ff800000) AND !*+(7f800000,00000000,c683287b) AND !*+(ff800000,00000000,80000000) AND !*+(7fffffff,00000000,00000000) => 7f800000 7fc00000 7fc00000 7fffffff
-#9: xvnmaddmsp !*+(ffffffff,00000000,42780000) AND !*+(7fc00000,00000000,7f800000) AND !*+(ffc00000,00000000,7fffffff) AND !*+(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvnmaddmsp !*+(00000000,00000000,00000000) AND !*+(7f800000,00000000,7f800000) AND !*+(00000000,00000000,7fbfffff) AND !*+(00000000,00000000,7fc00000) => 80000000 7fc00000 7fffffff 7fc00000
+#8: xvnmaddmsp !*+(80000000,00000000,ff800000) AND !*+(7f800000,00000000,c683287b) AND !*+(ff800000,00000000,80000000) AND !*+(7fbfffff,00000000,00000000) => 7f800000 7fc00000 7fc00000 7fffffff
+#9: xvnmaddmsp !*+(ffbfffff,00000000,42780000) AND !*+(7fc00000,00000000,7f800000) AND !*+(ffc00000,00000000,7fbfffff) AND !*+(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvnmaddmsp !*+(42780000,7f800000,ff800000) AND !*+(00000000,7f800000,c683287b) AND !*+(7f800000,7f800000,80000000) AND !*+(00000000,7f800000,00000000) => 7fc00000 7fc00000 ff800000 7fc00000
-#11: xvnmaddmsp !*+(00000000,7f800000,00000000) AND !*+(80000000,7f800000,7f800000) AND !*+(7f800000,7f800000,7fffffff) AND !*+(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvnmaddmsp !*+(7fffffff,ffffffff,ff800000) AND !*+(ffffffff,ffffffff,c683287b) AND !*+(7fc00000,ffc00000,80000000) AND !*+(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvnmaddmsp !*+(3ec00000,ffffffff,00000000) AND !*+(42780000,ffffffff,7f800000) AND !*+(00000000,ffffffff,7fffffff) AND !*+(7f800000,ffffffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvnmaddmsp !*+(00000000,7f800000,00000000) AND !*+(80000000,7f800000,7f800000) AND !*+(7f800000,7f800000,7fbfffff) AND !*+(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvnmaddmsp !*+(7fbfffff,ffbfffff,ff800000) AND !*+(ffbfffff,ffbfffff,c683287b) AND !*+(7fc00000,ffc00000,80000000) AND !*+(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvnmaddmsp !*+(3ec00000,ffbfffff,00000000) AND !*+(42780000,ffbfffff,7f800000) AND !*+(00000000,ffbfffff,7fbfffff) AND !*+(7f800000,ffbfffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvnmaddmsp !*+(00000000,ffc00000,ff800000) AND !*+(00000000,ffc00000,c683287b) AND !*+(80000000,ffc00000,80000000) AND !*+(7f800000,49192c2d,49c1288d) => ffc00000 ffc00000 ffc00000 ff800000
-#15: xvnmaddmsp !*+(ff800000,49192c2d,49c1288d) AND !*+(7fffffff,7fffffff,7fc00000) AND !*+(ffffffff,7fc00000,7fc00000) AND !*+(7fc00000,7fc00000,ffc00000) => 7f800000 7fffffff 7fc00000 7fc00000
+#15: xvnmaddmsp !*+(ff800000,49192c2d,49c1288d) AND !*+(7fbfffff,7fbfffff,7fc00000) AND !*+(ffbfffff,7fc00000,7fc00000) AND !*+(7fc00000,7fc00000,ffc00000) => 7f800000 7fffffff 7fc00000 7fc00000
 
 #0: xvmsubadp *-(fff0000000000000,fff0000000000000,3fd8000000000000) AND *-(c0d0650f5a07b353,fff0000000000000,404f000000000000) => 7ff8000000000000 fff0000000000000
 #1: xvmsubadp *-(41382511a2000000,41232585a9900000,0018000000b77501) AND *-(0000000000000000,fff0000000000000,7fe800000000051b) => c1382511a2000000 fff0000000000000
@@ -1341,38 +1341,38 @@ Test floating point arithmetic instructions -- with a{d|s}p or m{d|s}p
 #31: xvmsubmdp *-(0018000000b77501,7ff8000000000000,7ff8000000000000) AND *-(7fe800000000051b,7ff8000000000000,fff8000000000000) => 7ff8000000000000 7ff8000000000000
 
 #0: xvmsubasp *-(ff800000,ff800000,3ec00000) AND *-(c683287b,ff800000,42780000) AND *-(49c1288d,49192c2d,00000000) AND *-(00000000,ff800000,7f800000) => 7fc00000 ff800000 c9c1288d ff800000
-#1: xvmsubasp *-(00000000,ff800000,00000000) AND *-(7f800000,ff800000,00000000) AND *-(7fffffff,ff800000,80000000) AND *-(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvmsubasp *-(ff800000,c683287b,ff800000) AND *-(c683287b,c683287b,7fffffff) AND *-(80000000,c683287b,ffffffff) AND *-(00000000,c683287b,7fc00000) => 7f800000 7fffffff ffffffff 7fc00000
-#3: xvmsubasp *-(00000000,c683287b,ffc00000) AND *-(7f800000,c683287b,80000000) AND *-(7fffffff,c683287b,c683287b) AND *-(7fc00000,c683287b,49192c2d) => ffc00000 ff800000 7fffffff 7fc00000
+#1: xvmsubasp *-(00000000,ff800000,00000000) AND *-(7f800000,ff800000,00000000) AND *-(7fbfffff,ff800000,80000000) AND *-(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvmsubasp *-(ff800000,c683287b,ff800000) AND *-(c683287b,c683287b,7fbfffff) AND *-(80000000,c683287b,ffbfffff) AND *-(00000000,c683287b,7fc00000) => 7f800000 7fffffff ffffffff 7fc00000
+#3: xvmsubasp *-(00000000,c683287b,ffc00000) AND *-(7f800000,c683287b,80000000) AND *-(7fbfffff,c683287b,c683287b) AND *-(7fc00000,c683287b,49192c2d) => ffc00000 ff800000 7fffffff 7fc00000
 #4: xvmsubasp *-(ff800000,80000000,7f800000) AND *-(c683287b,80000000,00000000) AND *-(80000000,80000000,00000000) AND *-(00000000,80000000,80000000) => 7fc00000 4683287b 00000000 00000000
-#5: xvmsubasp *-(00000000,80000000,7f800000) AND *-(7f800000,80000000,ff800000) AND *-(7fffffff,80000000,7fffffff) AND *-(7fc00000,80000000,ffffffff) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvmsubasp *-(00000000,80000000,7f800000) AND *-(7f800000,80000000,ff800000) AND *-(7fbfffff,80000000,7fbfffff) AND *-(7fc00000,80000000,ffbfffff) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvmsubasp *-(ff800000,00000000,7fc00000) AND *-(c683287b,00000000,ffc00000) AND *-(80000000,00000000,80000000) AND *-(00000000,00000000,c683287b) => 7fc00000 ffc00000 00000000 80000000
-#7: xvmsubasp *-(00000000,00000000,00000000) AND *-(7f800000,00000000,7f800000) AND *-(7fffffff,00000000,00000000) AND *-(7fc00000,00000000,00000000) => 00000000 7fc00000 7fffffff 7fc00000
-#8: xvmsubasp *-(ff800000,00000000,80000000) AND *-(c683287b,00000000,7f800000) AND *-(80000000,00000000,ff800000) AND *-(00000000,00000000,7fffffff) => 7f800000 7fc00000 7fc00000 7fffffff
-#9: xvmsubasp *-(42780000,00000000,ffffffff) AND *-(7f800000,00000000,7fc00000) AND *-(7fffffff,00000000,ffc00000) AND *-(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvmsubasp *-(00000000,00000000,00000000) AND *-(7f800000,00000000,7f800000) AND *-(7fbfffff,00000000,00000000) AND *-(7fc00000,00000000,00000000) => 00000000 7fc00000 7fffffff 7fc00000
+#8: xvmsubasp *-(ff800000,00000000,80000000) AND *-(c683287b,00000000,7f800000) AND *-(80000000,00000000,ff800000) AND *-(00000000,00000000,7fbfffff) => 7f800000 7fc00000 7fc00000 7fffffff
+#9: xvmsubasp *-(42780000,00000000,ffbfffff) AND *-(7f800000,00000000,7fc00000) AND *-(7fbfffff,00000000,ffc00000) AND *-(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvmsubasp *-(ff800000,7f800000,42780000) AND *-(c683287b,7f800000,00000000) AND *-(80000000,7f800000,7f800000) AND *-(00000000,7f800000,00000000) => 7f800000 7fc00000 7f800000 7fc00000
-#11: xvmsubasp *-(00000000,7f800000,00000000) AND *-(7f800000,7f800000,80000000) AND *-(7fffffff,7f800000,7f800000) AND *-(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvmsubasp *-(ff800000,ffffffff,7fffffff) AND *-(c683287b,ffffffff,ffffffff) AND *-(80000000,ffc00000,7fc00000) AND *-(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvmsubasp *-(00000000,ffffffff,3ec00000) AND *-(7f800000,ffffffff,42780000) AND *-(7fffffff,ffffffff,00000000) AND *-(7fc00000,ffffffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvmsubasp *-(00000000,7f800000,00000000) AND *-(7f800000,7f800000,80000000) AND *-(7fbfffff,7f800000,7f800000) AND *-(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvmsubasp *-(ff800000,ffbfffff,7fbfffff) AND *-(c683287b,ffbfffff,ffbfffff) AND *-(80000000,ffc00000,7fc00000) AND *-(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvmsubasp *-(00000000,ffbfffff,3ec00000) AND *-(7f800000,ffbfffff,42780000) AND *-(7fbfffff,ffbfffff,00000000) AND *-(7fc00000,ffbfffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvmsubasp *-(ff800000,ffc00000,00000000) AND *-(c683287b,ffc00000,00000000) AND *-(80000000,ffc00000,80000000) AND *-(49c1288d,49192c2d,7f800000) => ffc00000 ffc00000 ffc00000 7f800000
-#15: xvmsubasp *-(49c1288d,49192c2d,ff800000) AND *-(7fc00000,7fffffff,7fffffff) AND *-(7fc00000,7fc00000,ffffffff) AND *-(ffc00000,7fc00000,7fc00000) => ff800000 7fffffff 7fc00000 7fc00000
+#15: xvmsubasp *-(49c1288d,49192c2d,ff800000) AND *-(7fc00000,7fbfffff,7fbfffff) AND *-(7fc00000,7fc00000,ffbfffff) AND *-(ffc00000,7fc00000,7fc00000) => ff800000 7fffffff 7fc00000 7fc00000
 
 #0: xvmsubmsp *-(3ec00000,ff800000,ff800000) AND *-(42780000,ff800000,c683287b) AND *-(00000000,49192c2d,49c1288d) AND *-(7f800000,ff800000,00000000) => 7fc00000 ff800000 c9c1288d ff800000
-#1: xvmsubmsp *-(00000000,ff800000,00000000) AND *-(00000000,ff800000,7f800000) AND *-(80000000,ff800000,7fffffff) AND *-(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvmsubmsp *-(ff800000,c683287b,ff800000) AND *-(7fffffff,c683287b,c683287b) AND *-(ffffffff,c683287b,80000000) AND *-(7fc00000,c683287b,00000000) => 7f800000 7fffffff ffffffff 7fc00000
-#3: xvmsubmsp *-(ffc00000,c683287b,00000000) AND *-(80000000,c683287b,7f800000) AND *-(c683287b,c683287b,7fffffff) AND *-(49192c2d,c683287b,7fc00000) => ffc00000 ff800000 7fffffff 7fc00000
+#1: xvmsubmsp *-(00000000,ff800000,00000000) AND *-(00000000,ff800000,7f800000) AND *-(80000000,ff800000,7fbfffff) AND *-(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvmsubmsp *-(ff800000,c683287b,ff800000) AND *-(7fbfffff,c683287b,c683287b) AND *-(ffbfffff,c683287b,80000000) AND *-(7fc00000,c683287b,00000000) => 7f800000 7fffffff ffffffff 7fc00000
+#3: xvmsubmsp *-(ffc00000,c683287b,00000000) AND *-(80000000,c683287b,7f800000) AND *-(c683287b,c683287b,7fbfffff) AND *-(49192c2d,c683287b,7fc00000) => ffc00000 ff800000 7fffffff 7fc00000
 #4: xvmsubmsp *-(7f800000,80000000,ff800000) AND *-(00000000,80000000,c683287b) AND *-(00000000,80000000,80000000) AND *-(80000000,80000000,00000000) => 7fc00000 4683287b 00000000 00000000
-#5: xvmsubmsp *-(7f800000,80000000,00000000) AND *-(ff800000,80000000,7f800000) AND *-(7fffffff,80000000,7fffffff) AND *-(ffffffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvmsubmsp *-(7f800000,80000000,00000000) AND *-(ff800000,80000000,7f800000) AND *-(7fbfffff,80000000,7fbfffff) AND *-(ffbfffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvmsubmsp *-(7fc00000,00000000,ff800000) AND *-(ffc00000,00000000,c683287b) AND *-(80000000,00000000,80000000) AND *-(c683287b,00000000,00000000) => 7fc00000 ffc00000 00000000 80000000
-#7: xvmsubmsp *-(00000000,00000000,00000000) AND *-(7f800000,00000000,7f800000) AND *-(00000000,00000000,7fffffff) AND *-(00000000,00000000,7fc00000) => 00000000 7fc00000 7fffffff 7fc00000
-#8: xvmsubmsp *-(80000000,00000000,ff800000) AND *-(7f800000,00000000,c683287b) AND *-(ff800000,00000000,80000000) AND *-(7fffffff,00000000,00000000) => 7f800000 7fc00000 7fc00000 7fffffff
-#9: xvmsubmsp *-(ffffffff,00000000,42780000) AND *-(7fc00000,00000000,7f800000) AND *-(ffc00000,00000000,7fffffff) AND *-(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvmsubmsp *-(00000000,00000000,00000000) AND *-(7f800000,00000000,7f800000) AND *-(00000000,00000000,7fbfffff) AND *-(00000000,00000000,7fc00000) => 00000000 7fc00000 7fffffff 7fc00000
+#8: xvmsubmsp *-(80000000,00000000,ff800000) AND *-(7f800000,00000000,c683287b) AND *-(ff800000,00000000,80000000) AND *-(7fbfffff,00000000,00000000) => 7f800000 7fc00000 7fc00000 7fffffff
+#9: xvmsubmsp *-(ffbfffff,00000000,42780000) AND *-(7fc00000,00000000,7f800000) AND *-(ffc00000,00000000,7fbfffff) AND *-(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvmsubmsp *-(42780000,7f800000,ff800000) AND *-(00000000,7f800000,c683287b) AND *-(7f800000,7f800000,80000000) AND *-(00000000,7f800000,00000000) => 7f800000 7fc00000 7f800000 7fc00000
-#11: xvmsubmsp *-(00000000,7f800000,00000000) AND *-(80000000,7f800000,7f800000) AND *-(7f800000,7f800000,7fffffff) AND *-(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvmsubmsp *-(7fffffff,ffffffff,ff800000) AND *-(ffffffff,ffffffff,c683287b) AND *-(7fc00000,ffc00000,80000000) AND *-(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvmsubmsp *-(3ec00000,ffffffff,00000000) AND *-(42780000,ffffffff,7f800000) AND *-(00000000,ffffffff,7fffffff) AND *-(7f800000,ffffffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvmsubmsp *-(00000000,7f800000,00000000) AND *-(80000000,7f800000,7f800000) AND *-(7f800000,7f800000,7fbfffff) AND *-(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvmsubmsp *-(7fbfffff,ffbfffff,ff800000) AND *-(ffbfffff,ffbfffff,c683287b) AND *-(7fc00000,ffc00000,80000000) AND *-(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvmsubmsp *-(3ec00000,ffbfffff,00000000) AND *-(42780000,ffbfffff,7f800000) AND *-(00000000,ffbfffff,7fbfffff) AND *-(7f800000,ffbfffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvmsubmsp *-(00000000,ffc00000,ff800000) AND *-(00000000,ffc00000,c683287b) AND *-(80000000,ffc00000,80000000) AND *-(7f800000,49192c2d,49c1288d) => ffc00000 ffc00000 ffc00000 7f800000
-#15: xvmsubmsp *-(ff800000,49192c2d,49c1288d) AND *-(7fffffff,7fffffff,7fc00000) AND *-(ffffffff,7fc00000,7fc00000) AND *-(7fc00000,7fc00000,ffc00000) => ff800000 7fffffff 7fc00000 7fc00000
+#15: xvmsubmsp *-(ff800000,49192c2d,49c1288d) AND *-(7fbfffff,7fbfffff,7fc00000) AND *-(ffbfffff,7fc00000,7fc00000) AND *-(7fc00000,7fc00000,ffc00000) => ff800000 7fffffff 7fc00000 7fc00000
 
 #0: xvnmsubadp !*-(fff0000000000000,fff0000000000000,3fd8000000000000) AND !*-(c0d0650f5a07b353,fff0000000000000,404f000000000000) => 7ff8000000000000 7ff0000000000000
 #1: xvnmsubadp !*-(41382511a2000000,41232585a9900000,0018000000b77501) AND !*-(0000000000000000,fff0000000000000,7fe800000000051b) => 41382511a2000000 7ff0000000000000
@@ -1441,38 +1441,38 @@ Test floating point arithmetic instructions -- with a{d|s}p or m{d|s}p
 #31: xvnmsubmdp !*-(0018000000b77501,7ff8000000000000,7ff8000000000000) AND !*-(7fe800000000051b,7ff8000000000000,fff8000000000000) => 7ff8000000000000 7ff8000000000000
 
 #0: xvnmsubasp !*-(ff800000,ff800000,3ec00000) AND !*-(c683287b,ff800000,42780000) AND !*-(49c1288d,49192c2d,00000000) AND !*-(00000000,ff800000,7f800000) => 7fc00000 7f800000 49c1288d 7f800000
-#1: xvnmsubasp !*-(00000000,ff800000,00000000) AND !*-(7f800000,ff800000,00000000) AND !*-(7fffffff,ff800000,80000000) AND !*-(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvnmsubasp !*-(ff800000,c683287b,ff800000) AND !*-(c683287b,c683287b,7fffffff) AND !*-(80000000,c683287b,ffffffff) AND !*-(00000000,c683287b,7fc00000) => ff800000 7fffffff ffffffff 7fc00000
-#3: xvnmsubasp !*-(00000000,c683287b,ffc00000) AND !*-(7f800000,c683287b,80000000) AND !*-(7fffffff,c683287b,c683287b) AND !*-(7fc00000,c683287b,49192c2d) => ffc00000 7f800000 7fffffff 7fc00000
+#1: xvnmsubasp !*-(00000000,ff800000,00000000) AND !*-(7f800000,ff800000,00000000) AND !*-(7fbfffff,ff800000,80000000) AND !*-(7fc00000,ff800000,7f800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvnmsubasp !*-(ff800000,c683287b,ff800000) AND !*-(c683287b,c683287b,7fbfffff) AND !*-(80000000,c683287b,ffbfffff) AND !*-(00000000,c683287b,7fc00000) => ff800000 7fffffff ffffffff 7fc00000
+#3: xvnmsubasp !*-(00000000,c683287b,ffc00000) AND !*-(7f800000,c683287b,80000000) AND !*-(7fbfffff,c683287b,c683287b) AND !*-(7fc00000,c683287b,49192c2d) => ffc00000 7f800000 7fffffff 7fc00000
 #4: xvnmsubasp !*-(ff800000,80000000,7f800000) AND !*-(c683287b,80000000,00000000) AND !*-(80000000,80000000,00000000) AND !*-(00000000,80000000,80000000) => 7fc00000 c683287b 80000000 80000000
-#5: xvnmsubasp !*-(00000000,80000000,7f800000) AND !*-(7f800000,80000000,ff800000) AND !*-(7fffffff,80000000,7fffffff) AND !*-(7fc00000,80000000,ffffffff) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvnmsubasp !*-(00000000,80000000,7f800000) AND !*-(7f800000,80000000,ff800000) AND !*-(7fbfffff,80000000,7fbfffff) AND !*-(7fc00000,80000000,ffbfffff) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvnmsubasp !*-(ff800000,00000000,7fc00000) AND !*-(c683287b,00000000,ffc00000) AND !*-(80000000,00000000,80000000) AND !*-(00000000,00000000,c683287b) => 7fc00000 ffc00000 80000000 00000000
-#7: xvnmsubasp !*-(00000000,00000000,00000000) AND !*-(7f800000,00000000,7f800000) AND !*-(7fffffff,00000000,00000000) AND !*-(7fc00000,00000000,00000000) => 80000000 7fc00000 7fffffff 7fc00000
-#8: xvnmsubasp !*-(ff800000,00000000,80000000) AND !*-(c683287b,00000000,7f800000) AND !*-(80000000,00000000,ff800000) AND !*-(00000000,00000000,7fffffff) => ff800000 7fc00000 7fc00000 7fffffff
-#9: xvnmsubasp !*-(42780000,00000000,ffffffff) AND !*-(7f800000,00000000,7fc00000) AND !*-(7fffffff,00000000,ffc00000) AND !*-(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvnmsubasp !*-(00000000,00000000,00000000) AND !*-(7f800000,00000000,7f800000) AND !*-(7fbfffff,00000000,00000000) AND !*-(7fc00000,00000000,00000000) => 80000000 7fc00000 7fffffff 7fc00000
+#8: xvnmsubasp !*-(ff800000,00000000,80000000) AND !*-(c683287b,00000000,7f800000) AND !*-(80000000,00000000,ff800000) AND !*-(00000000,00000000,7fbfffff) => ff800000 7fc00000 7fc00000 7fffffff
+#9: xvnmsubasp !*-(42780000,00000000,ffbfffff) AND !*-(7f800000,00000000,7fc00000) AND !*-(7fbfffff,00000000,ffc00000) AND !*-(7fc00000,00000000,80000000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvnmsubasp !*-(ff800000,7f800000,42780000) AND !*-(c683287b,7f800000,00000000) AND !*-(80000000,7f800000,7f800000) AND !*-(00000000,7f800000,00000000) => ff800000 7fc00000 ff800000 7fc00000
-#11: xvnmsubasp !*-(00000000,7f800000,00000000) AND !*-(7f800000,7f800000,80000000) AND !*-(7fffffff,7f800000,7f800000) AND !*-(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvnmsubasp !*-(ff800000,ffffffff,7fffffff) AND !*-(c683287b,ffffffff,ffffffff) AND !*-(80000000,ffc00000,7fc00000) AND !*-(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvnmsubasp !*-(00000000,ffffffff,3ec00000) AND !*-(7f800000,ffffffff,42780000) AND !*-(7fffffff,ffffffff,00000000) AND !*-(7fc00000,ffffffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvnmsubasp !*-(00000000,7f800000,00000000) AND !*-(7f800000,7f800000,80000000) AND !*-(7fbfffff,7f800000,7f800000) AND !*-(7fc00000,7f800000,ff800000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvnmsubasp !*-(ff800000,ffbfffff,7fbfffff) AND !*-(c683287b,ffbfffff,ffbfffff) AND !*-(80000000,ffc00000,7fc00000) AND !*-(00000000,ffc00000,ffc00000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvnmsubasp !*-(00000000,ffbfffff,3ec00000) AND !*-(7f800000,ffbfffff,42780000) AND !*-(7fbfffff,ffbfffff,00000000) AND !*-(7fc00000,ffbfffff,7f800000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvnmsubasp !*-(ff800000,ffc00000,00000000) AND !*-(c683287b,ffc00000,00000000) AND !*-(80000000,ffc00000,80000000) AND !*-(49c1288d,49192c2d,7f800000) => ffc00000 ffc00000 ffc00000 ff800000
-#15: xvnmsubasp !*-(49c1288d,49192c2d,ff800000) AND !*-(7fc00000,7fffffff,7fffffff) AND !*-(7fc00000,7fc00000,ffffffff) AND !*-(ffc00000,7fc00000,7fc00000) => 7f800000 7fffffff 7fc00000 7fc00000
+#15: xvnmsubasp !*-(49c1288d,49192c2d,ff800000) AND !*-(7fc00000,7fbfffff,7fbfffff) AND !*-(7fc00000,7fc00000,ffbfffff) AND !*-(ffc00000,7fc00000,7fc00000) => 7f800000 7fffffff 7fc00000 7fc00000
 
 #0: xvnmsubmsp !*-(3ec00000,ff800000,ff800000) AND !*-(42780000,ff800000,c683287b) AND !*-(00000000,49192c2d,49c1288d) AND !*-(7f800000,ff800000,00000000) => 7fc00000 7f800000 49c1288d 7f800000
-#1: xvnmsubmsp !*-(00000000,ff800000,00000000) AND !*-(00000000,ff800000,7f800000) AND !*-(80000000,ff800000,7fffffff) AND !*-(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#2: xvnmsubmsp !*-(ff800000,c683287b,ff800000) AND !*-(7fffffff,c683287b,c683287b) AND !*-(ffffffff,c683287b,80000000) AND !*-(7fc00000,c683287b,00000000) => ff800000 7fffffff ffffffff 7fc00000
-#3: xvnmsubmsp !*-(ffc00000,c683287b,00000000) AND !*-(80000000,c683287b,7f800000) AND !*-(c683287b,c683287b,7fffffff) AND !*-(49192c2d,c683287b,7fc00000) => ffc00000 7f800000 7fffffff 7fc00000
+#1: xvnmsubmsp !*-(00000000,ff800000,00000000) AND !*-(00000000,ff800000,7f800000) AND !*-(80000000,ff800000,7fbfffff) AND !*-(7f800000,ff800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#2: xvnmsubmsp !*-(ff800000,c683287b,ff800000) AND !*-(7fbfffff,c683287b,c683287b) AND !*-(ffbfffff,c683287b,80000000) AND !*-(7fc00000,c683287b,00000000) => ff800000 7fffffff ffffffff 7fc00000
+#3: xvnmsubmsp !*-(ffc00000,c683287b,00000000) AND !*-(80000000,c683287b,7f800000) AND !*-(c683287b,c683287b,7fbfffff) AND !*-(49192c2d,c683287b,7fc00000) => ffc00000 7f800000 7fffffff 7fc00000
 #4: xvnmsubmsp !*-(7f800000,80000000,ff800000) AND !*-(00000000,80000000,c683287b) AND !*-(00000000,80000000,80000000) AND !*-(80000000,80000000,00000000) => 7fc00000 c683287b 80000000 80000000
-#5: xvnmsubmsp !*-(7f800000,80000000,00000000) AND !*-(ff800000,80000000,7f800000) AND !*-(7fffffff,80000000,7fffffff) AND !*-(ffffffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#5: xvnmsubmsp !*-(7f800000,80000000,00000000) AND !*-(ff800000,80000000,7f800000) AND !*-(7fbfffff,80000000,7fbfffff) AND !*-(ffbfffff,80000000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
 #6: xvnmsubmsp !*-(7fc00000,00000000,ff800000) AND !*-(ffc00000,00000000,c683287b) AND !*-(80000000,00000000,80000000) AND !*-(c683287b,00000000,00000000) => 7fc00000 ffc00000 80000000 00000000
-#7: xvnmsubmsp !*-(00000000,00000000,00000000) AND !*-(7f800000,00000000,7f800000) AND !*-(00000000,00000000,7fffffff) AND !*-(00000000,00000000,7fc00000) => 80000000 7fc00000 7fffffff 7fc00000
-#8: xvnmsubmsp !*-(80000000,00000000,ff800000) AND !*-(7f800000,00000000,c683287b) AND !*-(ff800000,00000000,80000000) AND !*-(7fffffff,00000000,00000000) => ff800000 7fc00000 7fc00000 7fffffff
-#9: xvnmsubmsp !*-(ffffffff,00000000,42780000) AND !*-(7fc00000,00000000,7f800000) AND !*-(ffc00000,00000000,7fffffff) AND !*-(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
+#7: xvnmsubmsp !*-(00000000,00000000,00000000) AND !*-(7f800000,00000000,7f800000) AND !*-(00000000,00000000,7fbfffff) AND !*-(00000000,00000000,7fc00000) => 80000000 7fc00000 7fffffff 7fc00000
+#8: xvnmsubmsp !*-(80000000,00000000,ff800000) AND !*-(7f800000,00000000,c683287b) AND !*-(ff800000,00000000,80000000) AND !*-(7fbfffff,00000000,00000000) => ff800000 7fc00000 7fc00000 7fffffff
+#9: xvnmsubmsp !*-(ffbfffff,00000000,42780000) AND !*-(7fc00000,00000000,7f800000) AND !*-(ffc00000,00000000,7fbfffff) AND !*-(80000000,00000000,7fc00000) => ffffffff 7fc00000 7fffffff 7fc00000
 #10: xvnmsubmsp !*-(42780000,7f800000,ff800000) AND !*-(00000000,7f800000,c683287b) AND !*-(7f800000,7f800000,80000000) AND !*-(00000000,7f800000,00000000) => ff800000 7fc00000 ff800000 7fc00000
-#11: xvnmsubmsp !*-(00000000,7f800000,00000000) AND !*-(80000000,7f800000,7f800000) AND !*-(7f800000,7f800000,7fffffff) AND !*-(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
-#12: xvnmsubmsp !*-(7fffffff,ffffffff,ff800000) AND !*-(ffffffff,ffffffff,c683287b) AND !*-(7fc00000,ffc00000,80000000) AND !*-(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
-#13: xvnmsubmsp !*-(3ec00000,ffffffff,00000000) AND !*-(42780000,ffffffff,7f800000) AND !*-(00000000,ffffffff,7fffffff) AND !*-(7f800000,ffffffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
+#11: xvnmsubmsp !*-(00000000,7f800000,00000000) AND !*-(80000000,7f800000,7f800000) AND !*-(7f800000,7f800000,7fbfffff) AND !*-(ff800000,7f800000,7fc00000) => 7fc00000 7fc00000 7fffffff 7fc00000
+#12: xvnmsubmsp !*-(7fbfffff,ffbfffff,ff800000) AND !*-(ffbfffff,ffbfffff,c683287b) AND !*-(7fc00000,ffc00000,80000000) AND !*-(ffc00000,ffc00000,00000000) => ffffffff ffffffff ffc00000 ffc00000
+#13: xvnmsubmsp !*-(3ec00000,ffbfffff,00000000) AND !*-(42780000,ffbfffff,7f800000) AND !*-(00000000,ffbfffff,7fbfffff) AND !*-(7f800000,ffbfffff,7fc00000) => ffffffff ffffffff ffffffff ffffffff
 #14: xvnmsubmsp !*-(00000000,ffc00000,ff800000) AND !*-(00000000,ffc00000,c683287b) AND !*-(80000000,ffc00000,80000000) AND !*-(7f800000,49192c2d,49c1288d) => ffc00000 ffc00000 ffc00000 ff800000
-#15: xvnmsubmsp !*-(ff800000,49192c2d,49c1288d) AND !*-(7fffffff,7fffffff,7fc00000) AND !*-(ffffffff,7fc00000,7fc00000) AND !*-(7fc00000,7fc00000,ffc00000) => 7f800000 7fffffff 7fc00000 7fc00000
+#15: xvnmsubmsp !*-(ff800000,49192c2d,49c1288d) AND !*-(7fbfffff,7fbfffff,7fc00000) AND !*-(ffbfffff,7fc00000,7fc00000) AND !*-(7fc00000,7fc00000,ffc00000) => 7f800000 7fffffff 7fc00000 7fc00000
 
 
 Test scalar floating point arithmetic instructions

diff --git a/none/tests/ppc64/test_isa_2_06_part3.stdout.exp b/none/tests/ppc64/test_isa_2_06_part3.stdout.exp
index c3da39f884f9126ea97a0a2dbc1f3796d7f91743..90f17a48edf7d9280c734a5d10370a88dc0c5eb8 100644 (file)
--- a/none/tests/ppc64/test_isa_2_06_part3.stdout.exp
+++ b/none/tests/ppc64/test_isa_2_06_part3.stdout.exp
@@ -59,7 +59,7 @@ Test VSX vector and scalar single argument instructions
 
 #0: xvrsqrtesp 1/x-sqrt(3ec00000) ==> PASS); 1/x-sqrt(42780000) ==> PASS); 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(7f800000) ==> PASS)
 #1: xvrsqrtesp 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(00000000) ==> PASS); 1/x-sqrt(80000000) ==> PASS); 1/x-sqrt(7f800000) ==> PASS)
-#2: xvrsqrtesp 1/x-sqrt(ff800000) ==> PASS); 1/x-sqrt(7fffffff) ==> PASS); 1/x-sqrt(ffffffff) ==> PASS); 1/x-sqrt(7fc00000) ==> PASS)
+#2: xvrsqrtesp 1/x-sqrt(ff800000) ==> PASS); 1/x-sqrt(7fbfffff) ==> PASS); 1/x-sqrt(ffbfffff) ==> PASS); 1/x-sqrt(7fc00000) ==> PASS)
 #3: xvrsqrtesp 1/x-sqrt(ffc00000) ==> PASS); 1/x-sqrt(80000000) ==> PASS); 1/x-sqrt(c683287b) ==> PASS); 1/x-sqrt(49192c2d) ==> PASS)
 #4: xvrsqrtesp 1/x-sqrt(49c1288d) ==> PASS); 1/x-sqrt(418977ad) ==> PASS); 1/x-sqrt(428a5faf) ==> PASS); 1/x-sqrt(44bb5fcc) ==> PASS)
 
@@ -75,7 +75,7 @@ Test VSX vector and scalar single argument instructions
 
 #0: xvsqrtsp sqrt(3ec00000) = 3f1cc470; sqrt(42780000) = 40fbf7dc; sqrt(00000000) = 00000000; sqrt(7f800000) = 7f800000
 #1: xvsqrtsp sqrt(00000000) = 00000000; sqrt(00000000) = 00000000; sqrt(80000000) = 80000000; sqrt(7f800000) = 7f800000
-#2: xvsqrtsp sqrt(ff800000) = 7fc00000; sqrt(7fffffff) = 7ffffffc; sqrt(ffffffff) = fffffffc; sqrt(7fc00000) = 7fc00000
+#2: xvsqrtsp sqrt(ff800000) = 7fc00000; sqrt(7fbfffff) = 7ffffffc; sqrt(ffbfffff) = fffffffc; sqrt(7fc00000) = 7fc00000
 #3: xvsqrtsp sqrt(ffc00000) = ffc00000; sqrt(80000000) = 80000000; sqrt(c683287b) = 7fc00000; sqrt(49192c2d) = 44460548
 #4: xvsqrtsp sqrt(49c1288d) = 449d3d50; sqrt(418977ad) = 4084a638; sqrt(428a5faf) = 410515f8; sqrt(44bb5fcc) = 421ade08
 
@@ -130,8 +130,8 @@ Test VSX vector and scalar single argument instructions
 #6: xscvspdp conv(80000000) = 8000000000000000
 #7: xscvspdp conv(7f800000) = 7ff0000000000000
 #8: xscvspdp conv(ff800000) = fff0000000000000
-#9: xscvspdp conv(7fffffff) = 7fffffffe0000000
-#10: xscvspdp conv(ffffffff) = ffffffffe0000000
+#9: xscvspdp conv(7fbfffff) = 7fffffffe0000000
+#10: xscvspdp conv(ffbfffff) = ffffffffe0000000
 #11: xscvspdp conv(7fc00000) = 7ff8000000000000
 #12: xscvspdp conv(ffc00000) = fff8000000000000
 #13: xscvspdp conv(80000000) = 8000000000000000
@@ -179,8 +179,8 @@ Test VSX vector and scalar single argument instructions
 #1: xvcvspdp conv(00000000) = 0000000000000000; conv(7f800000) = 7ff0000000000000
 #2: xvcvspdp conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
 #3: xvcvspdp conv(80000000) = 8000000000000000; conv(7f800000) = 7ff0000000000000
-#4: xvcvspdp conv(ff800000) = fff0000000000000; conv(7fffffff) = 7fffffffe0000000
-#5: xvcvspdp conv(ffffffff) = ffffffffe0000000; conv(7fc00000) = 7ff8000000000000
+#4: xvcvspdp conv(ff800000) = fff0000000000000; conv(7fbfffff) = 7fffffffe0000000
+#5: xvcvspdp conv(ffbfffff) = ffffffffe0000000; conv(7fc00000) = 7ff8000000000000
 #6: xvcvspdp conv(ffc00000) = fff8000000000000; conv(80000000) = 8000000000000000
 #7: xvcvspdp conv(c683287b) = c0d0650f60000000; conv(49192c2d) = 41232585a0000000
 #8: xvcvspdp conv(49c1288d) = 41382511a0000000; conv(418977ad) = 40312ef5a0000000
@@ -190,8 +190,8 @@ Test VSX vector and scalar single argument instructions
 #1: xvcvspsxds conv(00000000) = 0000000000000000; conv(7f800000) = 7fffffffffffffff
 #2: xvcvspsxds conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
 #3: xvcvspsxds conv(80000000) = 0000000000000000; conv(7f800000) = 7fffffffffffffff
-#4: xvcvspsxds conv(ff800000) = 8000000000000000; conv(7fffffff) = 8000000000000000
-#5: xvcvspsxds conv(ffffffff) = 8000000000000000; conv(7fc00000) = 8000000000000000
+#4: xvcvspsxds conv(ff800000) = 8000000000000000; conv(7fbfffff) = 8000000000000000
+#5: xvcvspsxds conv(ffbfffff) = 8000000000000000; conv(7fc00000) = 8000000000000000
 #6: xvcvspsxds conv(ffc00000) = 8000000000000000; conv(80000000) = 0000000000000000
 #7: xvcvspsxds conv(c683287b) = ffffffffffffbe6c; conv(49192c2d) = 00000000000992c2
 #8: xvcvspsxds conv(49c1288d) = 0000000000182511; conv(418977ad) = 0000000000000011
@@ -212,8 +212,8 @@ Test VSX vector and scalar single argument instructions
 #1: xvcvspuxds conv(00000000) = 0000000000000000; conv(7f800000) = ffffffffffffffff
 #2: xvcvspuxds conv(00000000) = 0000000000000000; conv(00000000) = 0000000000000000
 #3: xvcvspuxds conv(80000000) = 0000000000000000; conv(7f800000) = ffffffffffffffff
-#4: xvcvspuxds conv(ff800000) = 0000000000000000; conv(7fffffff) = 0000000000000000
-#5: xvcvspuxds conv(ffffffff) = 0000000000000000; conv(7fc00000) = 0000000000000000
+#4: xvcvspuxds conv(ff800000) = 0000000000000000; conv(7fbfffff) = 0000000000000000
+#5: xvcvspuxds conv(ffbfffff) = 0000000000000000; conv(7fc00000) = 0000000000000000
 #6: xvcvspuxds conv(ffc00000) = 0000000000000000; conv(80000000) = 0000000000000000
 #7: xvcvspuxds conv(c683287b) = 0000000000000000; conv(49192c2d) = 00000000000992c2
 #8: xvcvspuxds conv(49c1288d) = 0000000000182511; conv(418977ad) = 0000000000000011
@@ -221,7 +221,7 @@ Test VSX vector and scalar single argument instructions
 
 #0: xvcvspuxws conv(3ec00000) = 00000000; conv(42780000) = 0000003e; conv(00000000) = 00000000; conv(7f800000) = ffffffff
 #1: xvcvspuxws conv(00000000) = 00000000; conv(00000000) = 00000000; conv(80000000) = 00000000; conv(7f800000) = ffffffff
-#2: xvcvspuxws conv(ff800000) = 00000000; conv(7fffffff) = 00000000; conv(ffffffff) = 00000000; conv(7fc00000) = 00000000
+#2: xvcvspuxws conv(ff800000) = 00000000; conv(7fbfffff) = 00000000; conv(ffbfffff) = 00000000; conv(7fc00000) = 00000000
 #3: xvcvspuxws conv(ffc00000) = 00000000; conv(80000000) = 00000000; conv(c683287b) = 00000000; conv(49192c2d) = 000992c2
 #4: xvcvspuxws conv(49c1288d) = 00182511; conv(418977ad) = 00000011; conv(428a5faf) = 00000045; conv(44bb5fcc) = 000005da
 
@@ -323,13 +323,13 @@ Test VSX vector and scalar single argument instructions
 
 #0: xvabssp abs(3ec00000) = 3ec00000; abs(42780000) = 42780000; abs(00000000) = 00000000; abs(7f800000) = 7f800000
 #1: xvabssp abs(00000000) = 00000000; abs(00000000) = 00000000; abs(80000000) = 00000000; abs(7f800000) = 7f800000
-#2: xvabssp abs(ff800000) = 7f800000; abs(7fffffff) = 7fffffff; abs(ffffffff) = 7fffffff; abs(7fc00000) = 7fc00000
+#2: xvabssp abs(ff800000) = 7f800000; abs(7fbfffff) = 7fbfffff; abs(ffbfffff) = 7fbfffff; abs(7fc00000) = 7fc00000
 #3: xvabssp abs(ffc00000) = 7fc00000; abs(80000000) = 00000000; abs(c683287b) = 4683287b; abs(49192c2d) = 49192c2d
 #4: xvabssp abs(49c1288d) = 49c1288d; abs(418977ad) = 418977ad; abs(428a5faf) = 428a5faf; abs(44bb5fcc) = 44bb5fcc
 
 #0: xvnabssp nabs(3ec00000) = bec00000; nabs(42780000) = c2780000; nabs(00000000) = 80000000; nabs(7f800000) = ff800000
 #1: xvnabssp nabs(00000000) = 80000000; nabs(00000000) = 80000000; nabs(80000000) = 80000000; nabs(7f800000) = ff800000
-#2: xvnabssp nabs(ff800000) = ff800000; nabs(7fffffff) = ffffffff; nabs(ffffffff) = ffffffff; nabs(7fc00000) = ffc00000
+#2: xvnabssp nabs(ff800000) = ff800000; nabs(7fbfffff) = ffbfffff; nabs(ffbfffff) = ffbfffff; nabs(7fc00000) = ffc00000
 #3: xvnabssp nabs(ffc00000) = ffc00000; nabs(80000000) = 80000000; nabs(c683287b) = c683287b; nabs(49192c2d) = c9192c2d
 #4: xvnabssp nabs(49c1288d) = c9c1288d; nabs(418977ad) = c18977ad; nabs(428a5faf) = c28a5faf; nabs(44bb5fcc) = c4bb5fcc
 
@@ -390,31 +390,31 @@ Test VSX vector and scalar single argument instructions
 
 #0: xvrspi round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
 #1: xvrspi round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
-#2: xvrspi round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#2: xvrspi round(ff800000) = ff800000; round(7fbfffff) = 7fffffff; round(ffbfffff) = ffffffff; round(7fc00000) = 7fc00000
 #3: xvrspi round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
 #4: xvrspi round(49c1288d) = 49c12890; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb6000
 
 #0: xvrspic round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
 #1: xvrspic round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
-#2: xvrspic round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#2: xvrspic round(ff800000) = ff800000; round(7fbfffff) = 7fffffff; round(ffbfffff) = ffffffff; round(7fc00000) = 7fc00000
 #3: xvrspic round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
 #4: xvrspic round(49c1288d) = 49c12890; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb6000
 
 #0: xvrspim round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
 #1: xvrspim round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
-#2: xvrspim round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#2: xvrspim round(ff800000) = ff800000; round(7fbfffff) = 7fffffff; round(ffbfffff) = ffffffff; round(7fc00000) = 7fc00000
 #3: xvrspim round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832a00; round(49192c2d) = 49192c20
 #4: xvrspim round(49c1288d) = 49c12888; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb4000
 
 #0: xvrspip round(3ec00000) = 3f800000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
 #1: xvrspip round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
-#2: xvrspip round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#2: xvrspip round(ff800000) = ff800000; round(7fbfffff) = 7fffffff; round(ffbfffff) = ffffffff; round(7fc00000) = 7fc00000
 #3: xvrspip round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c30
 #4: xvrspip round(49c1288d) = 49c12890; round(418977ad) = 41900000; round(428a5faf) = 428c0000; round(44bb5fcc) = 44bb6000
 
 #0: xvrspiz round(3ec00000) = 00000000; round(42780000) = 42780000; round(00000000) = 00000000; round(7f800000) = 7f800000
 #1: xvrspiz round(00000000) = 00000000; round(00000000) = 00000000; round(80000000) = 80000000; round(7f800000) = 7f800000
-#2: xvrspiz round(ff800000) = ff800000; round(7fffffff) = 7fffffff; round(ffffffff) = ffffffff; round(7fc00000) = 7fc00000
+#2: xvrspiz round(ff800000) = ff800000; round(7fbfffff) = 7fffffff; round(ffbfffff) = ffffffff; round(7fc00000) = 7fc00000
 #3: xvrspiz round(ffc00000) = ffc00000; round(80000000) = 80000000; round(c683287b) = c6832800; round(49192c2d) = 49192c20
 #4: xvrspiz round(49c1288d) = 49c12888; round(418977ad) = 41880000; round(428a5faf) = 428a0000; round(44bb5fcc) = 44bb4000
 
@@ -601,7 +601,7 @@ Test vector and scalar tdiv and tsqrt instructions
 
 #0: xvtsqrtsp test-sqrt(3ec00000); test-sqrt(42780000); test-sqrt(00000000); test-sqrt(7f800000) ? e (CRx)
 #1: xvtsqrtsp test-sqrt(00000000); test-sqrt(00000000); test-sqrt(80000000); test-sqrt(7f800000) ? e (CRx)
-#2: xvtsqrtsp test-sqrt(ff800000); test-sqrt(7fffffff); test-sqrt(ffffffff); test-sqrt(7fc00000) ? e (CRx)
+#2: xvtsqrtsp test-sqrt(ff800000); test-sqrt(7fbfffff); test-sqrt(ffbfffff); test-sqrt(7fc00000) ? e (CRx)
 #3: xvtsqrtsp test-sqrt(ffc00000); test-sqrt(80000000); test-sqrt(c683287b); test-sqrt(49192c2d) ? e (CRx)
 #4: xvtsqrtsp test-sqrt(49c1288d); test-sqrt(418977ad); test-sqrt(428a5faf); test-sqrt(44bb5fcc) ? 8 (CRx)
 
@@ -641,21 +641,21 @@ Test vector and scalar tdiv and tsqrt instructions
 #33: xvtdivdp 40976bf982440000 test-div 40976bf982440000 AND 40976bf982440000 test-div 40514bf5d2300000 ? cc=8
 
 #0: xvtdivsp ff800000 test-div ff800000 AND ff800000 test-div c683287b AND 49192c2d test-div 49c1288d AND ff800000 test-div 00000000 ? cc=e
-#1: xvtdivsp ff800000 test-div 00000000 AND ff800000 test-div 7f800000 AND ff800000 test-div 7fffffff AND ff800000 test-div 7fc00000 ? cc=e
+#1: xvtdivsp ff800000 test-div 00000000 AND ff800000 test-div 7f800000 AND ff800000 test-div 7fbfffff AND ff800000 test-div 7fc00000 ? cc=e
 #2: xvtdivsp c683287b test-div ff800000 AND c683287b test-div c683287b AND c683287b test-div 80000000 AND c683287b test-div 00000000 ? cc=e
-#3: xvtdivsp c683287b test-div 00000000 AND c683287b test-div 7f800000 AND c683287b test-div 7fffffff AND c683287b test-div 7fc00000 ? cc=e
+#3: xvtdivsp c683287b test-div 00000000 AND c683287b test-div 7f800000 AND c683287b test-div 7fbfffff AND c683287b test-div 7fc00000 ? cc=e
 #4: xvtdivsp 80000000 test-div ff800000 AND 80000000 test-div c683287b AND 80000000 test-div 80000000 AND 80000000 test-div 00000000 ? cc=e
-#5: xvtdivsp 80000000 test-div 00000000 AND 80000000 test-div 7f800000 AND 80000000 test-div 7fffffff AND 80000000 test-div 7fc00000 ? cc=e
+#5: xvtdivsp 80000000 test-div 00000000 AND 80000000 test-div 7f800000 AND 80000000 test-div 7fbfffff AND 80000000 test-div 7fc00000 ? cc=e
 #6: xvtdivsp 00000000 test-div ff800000 AND 00000000 test-div c683287b AND 00000000 test-div 80000000 AND 00000000 test-div 00000000 ? cc=e
-#7: xvtdivsp 00000000 test-div 00000000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fffffff AND 00000000 test-div 7fc00000 ? cc=e
+#7: xvtdivsp 00000000 test-div 00000000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fbfffff AND 00000000 test-div 7fc00000 ? cc=e
 #8: xvtdivsp 00000000 test-div ff800000 AND 00000000 test-div c683287b AND 00000000 test-div 80000000 AND 00000000 test-div 00000000 ? cc=e
-#9: xvtdivsp 00000000 test-div 42780000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fffffff AND 00000000 test-div 7fc00000 ? cc=e
+#9: xvtdivsp 00000000 test-div 42780000 AND 00000000 test-div 7f800000 AND 00000000 test-div 7fbfffff AND 00000000 test-div 7fc00000 ? cc=e
 #10: xvtdivsp 7f800000 test-div ff800000 AND 7f800000 test-div c683287b AND 7f800000 test-div 80000000 AND 7f800000 test-div 00000000 ? cc=e
-#11: xvtdivsp 7f800000 test-div 00000000 AND 7f800000 test-div 7f800000 AND 7f800000 test-div 7fffffff AND 7f800000 test-div 7fc00000 ? cc=e
-#12: xvtdivsp ffffffff test-div ff800000 AND ffffffff test-div c683287b AND ffc00000 test-div 80000000 AND ffc00000 test-div 00000000 ? cc=e
-#13: xvtdivsp ffffffff test-div 00000000 AND ffffffff test-div 7f800000 AND ffffffff test-div 7fffffff AND ffffffff test-div 7fc00000 ? cc=e
+#11: xvtdivsp 7f800000 test-div 00000000 AND 7f800000 test-div 7f800000 AND 7f800000 test-div 7fbfffff AND 7f800000 test-div 7fc00000 ? cc=e
+#12: xvtdivsp ffbfffff test-div ff800000 AND ffbfffff test-div c683287b AND ffc00000 test-div 80000000 AND ffc00000 test-div 00000000 ? cc=e
+#13: xvtdivsp ffbfffff test-div 00000000 AND ffbfffff test-div 7f800000 AND ffbfffff test-div 7fbfffff AND ffbfffff test-div 7fc00000 ? cc=e
 #14: xvtdivsp ffc00000 test-div ff800000 AND ffc00000 test-div c683287b AND ffc00000 test-div 80000000 AND 49192c2d test-div 49c1288d ? cc=e
-#15: xvtdivsp 49192c2d test-div 49c1288d AND 7fffffff test-div 7fc00000 AND 7fc00000 test-div 7fc00000 AND 7fc00000 test-div ffc00000 ? cc=a
+#15: xvtdivsp 49192c2d test-div 49c1288d AND 7fbfffff test-div 7fc00000 AND 7fc00000 test-div 7fc00000 AND 7fc00000 test-div ffc00000 ? cc=a
 #16: xvtdivsp 49c1288d test-div 428a5faf AND 418977ad test-div 49c1288d AND 44bb5fcc test-div 44bb5fcc AND 44bb5fcc test-div 428a5faf ? cc=8
 
 Test popcntw instruction

diff --git a/none/tests/ppc64/test_isa_2_07_part1.c b/none/tests/ppc64/test_isa_2_07_part1.c
index 92f8a874ee1d6dfee5918561729f10cb99f105ba..e60c3e3ab1d2982d318aab633e36175ee35e6f18 100644 (file)
--- a/none/tests/ppc64/test_isa_2_07_part1.c
+++ b/none/tests/ppc64/test_isa_2_07_part1.c
@@ -423,10 +423,10 @@ static void build_fargs_table (void)
     * -0.0      : 1 0x000 0x0000000000000 => 0x8000000000000000
     * +infinity : 0 0x7FF 0x0000000000000 => 0x7FF0000000000000
     * -infinity : 1 0x7FF 0x0000000000000 => 0xFFF0000000000000
-    * +QNaN     : 0 0x7FF 0x7FFFFFFFFFFFF => 0x7FF7FFFFFFFFFFFF
-    * -QNaN     : 1 0x7FF 0x7FFFFFFFFFFFF => 0xFFF7FFFFFFFFFFFF
-    * +SNaN     : 0 0x7FF 0x8000000000000 => 0x7FF8000000000000
-    * -SNaN     : 1 0x7FF 0x8000000000000 => 0xFFF8000000000000
+    * +QNaN     : 0 0x7FF 0x8000000000000 => 0x7FF8000000000000
+    * -QNaN     : 1 0x7FF 0x8000000000000 => 0xFFF8000000000000
+    * +SNaN     : 0 0x7FF 0x7FFFFFFFFFFFF => 0x7FF7FFFFFFFFFFFF
+    * -SNaN     : 1 0x7FF 0x7FFFFFFFFFFFF => 0xFFF7FFFFFFFFFFFF
     * (8 values)
 
     * Ref only:
@@ -438,10 +438,10 @@ static void build_fargs_table (void)
     * -0.0      : 1 0x00 0x000000 => 0x80000000
     * +infinity : 0 0xFF 0x000000 => 0x7F800000
     * -infinity : 1 0xFF 0x000000 => 0xFF800000
-    * +QNaN     : 0 0xFF 0x3FFFFF => 0x7FBFFFFF
-    * -QNaN     : 1 0xFF 0x3FFFFF => 0xFFBFFFFF
-    * +SNaN     : 0 0xFF 0x400000 => 0x7FC00000
-    * -SNaN     : 1 0xFF 0x400000 => 0xFFC00000
+    * +QNaN     : 0 0xFF 0x400000 => 0x7FC00000
+    * -QNaN     : 1 0xFF 0x400000 => 0xFFC00000
+    * +SNaN     : 0 0xFF 0x3FFFFF => 0x7FBFFFFF
+    * -SNaN     : 1 0xFF 0x3FFFFF => 0xFFBFFFFF
     */
    uint64_t mant;
    uint16_t _exp, e0, e1;

diff --git a/none/tests/ppc64/test_isa_2_07_part2.c b/none/tests/ppc64/test_isa_2_07_part2.c
index 92e190ca7515140232d8c1ceceab8ce3b325a73c..6085ca4e6bb587637d21d1156eabf2fada5e89e8 100644 (file)
--- a/none/tests/ppc64/test_isa_2_07_part2.c
+++ b/none/tests/ppc64/test_isa_2_07_part2.c
@@ -119,6 +119,14 @@ static inline void register_farg (void *farg,
               s, _exp, mant, *(uint64_t *)farg, *(double *)farg);
 }
 
+static inline void register_sp_farg (void *farg,
+                                     int s, uint16_t _exp, uint32_t mant)
+{
+   uint32_t tmp;
+   tmp = ((uint32_t)s << 31) | ((uint32_t)_exp << 23) | mant;
+   *(uint32_t *)farg = tmp;
+}
+
 
 typedef struct fp_test_args {
    int fra_idx;
@@ -149,15 +157,16 @@ static void build_special_fargs_table(void)
    6      1   000   0x0000000000000ULL         -0.0 (-zero)
    7      0   7ff   0x0000000000000ULL         +infinity
    8      1   7ff   0x0000000000000ULL         -infinity
-   9      0   7ff   0x7FFFFFFFFFFFFULL         +QNaN
-   10     1   7ff   0x7FFFFFFFFFFFFULL         -QNaN
-   11     0   7ff   0x8000000000000ULL         +SNaN
-   12     1   7ff   0x8000000000000ULL         -SNaN
+   9      0   7ff   0x7FFFFFFFFFFFFULL         +SNaN
+   10     1   7ff   0x7FFFFFFFFFFFFULL         -SNaN
+   11     0   7ff   0x8000000000000ULL         +QNaN
+   12     1   7ff   0x8000000000000ULL         -QNaN
    13     1   000   0x8340000078000ULL         Denormalized val (zero exp and non-zero fraction)
    14     1   40d   0x0650f5a07b353ULL         Negative finite number
     */
 
    uint64_t mant;
+   uint32_t mant_sp;
    uint16_t _exp;
    int s;
    int j, i = 0;
@@ -227,28 +236,42 @@ static void build_special_fargs_table(void)
    mant = 0x0000000000000ULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
 
-   /* +QNaN     : 0 0x7FF 0x7FFFFFFFFFFFF */
+   /*
+    * This comment applies to values #9 and #10 below:
+    * When src is a SNaN, it's converted to a QNaN first before rounding to single-precision,
+    * so we can't just copy the double-precision value to the corresponding slot in the
+    * single-precision array (i.e., in the loop at the end of this function).  Instead, we
+    * have to manually set the bits using register_sp_farg().
+    */
+
+   /* +SNaN     : 0 0x7FF 0x7FFFFFFFFFFFF */
    // #9
    s = 0;
    _exp = 0x7FF;
    mant = 0x7FFFFFFFFFFFFULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
+   _exp = 0xff;
+   mant_sp = 0x3FFFFF;
+   register_sp_farg(&spec_sp_fargs[i-1], s, _exp, mant_sp);
 
-   /* -QNaN     : 1 0x7FF 0x7FFFFFFFFFFFF */
+   /* -SNaN     : 1 0x7FF 0x7FFFFFFFFFFFF */
    // #10
    s = 1;
    _exp = 0x7FF;
    mant = 0x7FFFFFFFFFFFFULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
+   _exp = 0xff;
+   mant_sp = 0x3FFFFF;
+   register_sp_farg(&spec_sp_fargs[i-1], s, _exp, mant_sp);
 
-   /* +SNaN     : 0 0x7FF 0x8000000000000 */
+   /* +QNaN     : 0 0x7FF 0x8000000000000 */
    // #11
    s = 0;
    _exp = 0x7FF;
    mant = 0x8000000000000ULL;
    register_farg(&spec_fargs[i++], s, _exp, mant);
 
-   /* -SNaN     : 1 0x7FF 0x8000000000000 */
+   /* -QNaN     : 1 0x7FF 0x8000000000000 */
    // #12
    s = 1;
    _exp = 0x7FF;
@@ -303,7 +326,8 @@ static void build_special_fargs_table(void)
 
    nb_special_fargs = i;
    for (j = 0; j < i; j++) {
-      spec_sp_fargs[j] = spec_fargs[j];
+      if (!(j == 9 || j == 10))
+         spec_sp_fargs[j] = spec_fargs[j];
    }
 }
 

diff --git a/none/tests/ppc64/test_isa_2_07_part2.stdout.exp b/none/tests/ppc64/test_isa_2_07_part2.stdout.exp
index c65c574722c58c03e37db5cf0c920c1af3a6a8d9..e9085ea9704323832d3ae1157de8099083767ea0 100644 (file)
--- a/none/tests/ppc64/test_isa_2_07_part2.stdout.exp
+++ b/none/tests/ppc64/test_isa_2_07_part2.stdout.exp
@@ -29,8 +29,8 @@ Test VSX vector and scalar single argument instructions
 #6: xscvspdpn conv(80000000) = 8000000000000000
 #7: xscvspdpn conv(7f800000) = 7ff0000000000000
 #8: xscvspdpn conv(ff800000) = fff0000000000000
-#9: xscvspdpn conv(7fffffff) = 7fffffffe0000000
-#10: xscvspdpn conv(ffffffff) = ffffffffe0000000
+#9: xscvspdpn conv(7fbfffff) = 7ff7ffffe0000000
+#10: xscvspdpn conv(ffbfffff) = fff7ffffe0000000
 #11: xscvspdpn conv(7fc00000) = 7ff8000000000000
 #12: xscvspdpn conv(ffc00000) = fff8000000000000
 #13: xscvspdpn conv(80000000) = 8000000000000000