Do not reinitialize vector lanes to zero since they are already
initialized to zero.
gcc/ChangeLog:
* config/s390/s390.cc (vec_init): Fix default case
gcc/testsuite/ChangeLog:
* gcc.target/s390/vector/vec-init-3.c: New test.
if (!general_operand (elem, GET_MODE (elem)))
elem = force_reg (inner_mode, elem);
- emit_insn (gen_rtx_SET (target,
- gen_rtx_UNSPEC (mode,
- gen_rtvec (3, elem,
- GEN_INT (i), target),
- UNSPEC_VEC_SET)));
+ if (elem != const0_rtx)
+ emit_insn (gen_rtx_SET (target,
+ gen_rtx_UNSPEC (mode,
+ gen_rtvec (3, elem,
+ GEN_INT (i), target),
+ UNSPEC_VEC_SET)));
}
}
--- /dev/null
+/* Check that the default case of the vec_init expander does its job. */
+
+/* { dg-do compile } */
+/* { dg-options "-O3 -mzarch -march=z13" } */
+
+typedef __attribute__((vector_size(16))) signed int v4si;
+
+extern v4si G;
+
+v4si
+n (signed int a)
+{
+ return G == (v4si){ a };
+}
+/* { dg-final { scan-assembler-times "vzero" 1 } } */
+/* { dg-final { scan-assembler-times "vlvgf\t" 1 } } */
+/* { dg-final { scan-assembler-not "vleif\t" } } */