drm/amdgpu: Enable 5-level page table for GFX 12.1.0

GFX 12.1.0 support 57bit virtual, 52bit physical address, set PDE
max_level to 4, min_vm_size to 128PB to enable GPU vm 5-level page
tables to support 57bit virtual address.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Acked-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index e63ad5f18a8e1d63b920663968287eea18fbb7d4..57aabe0dcfdfec4470b0483e971809969301ae24 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
@@ -809,11 +809,11 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
                for (i = 0; i < hweight32(adev->aid_mask); i++)
                        set_bit(AMDGPU_MMHUB0(i), adev->vmhubs_mask);
                /*
-                * To fulfill 4-level page support,
-                * vm size is 256TB (48bit), maximum size,
+                * To fulfill 5-level page support,
+                * vm size is 128PetaByte (57bit), maximum size,
                 * block size 512 (9bit)
                 */
-               amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48);
+               amdgpu_vm_adjust_size(adev, 128 * 1024 * 1024, 9, 4, 57);
                break;
        default:
                break;