]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Enable retry faults for GFX 12.1
authorMukul Joshi <mukul.joshi@amd.com>
Thu, 27 Mar 2025 02:06:39 +0000 (22:06 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 10 Dec 2025 22:39:03 +0000 (17:39 -0500)
Enable retry faults in both GCVM/MMVM Context1 Control
and L2_PROTECTION_FAULT_CNTL2 registers for GFX 12.1.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfxhub_v12_1.c
drivers/gpu/drm/amd/amdgpu/mmhub_v4_2_0.c

index ceb7eb562ef0a6a53531816d269674135a375af6..ab002f327f763f4eccddd6f690c077f58ca36a0b 100644 (file)
@@ -200,6 +200,8 @@ static void gfxhub_v12_1_xcc_init_system_aperture_regs(struct amdgpu_device *ade
                                           regGCVM_L2_PROTECTION_FAULT_CNTL2);
                        tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL2,
                                            ACTIVE_PAGE_MIGRATION_PTE_READ_RETRY, 1);
+                       tmp = REG_SET_FIELD(tmp, GCVM_L2_PROTECTION_FAULT_CNTL2,
+                                           ENABLE_RETRY_FAULT_INTERRUPT, 0x1);
                        WREG32_SOC15(GC, GET_INST(GC, i),
                                     regGCVM_L2_PROTECTION_FAULT_CNTL2, tmp);
                }
@@ -429,7 +431,7 @@ static void gfxhub_v12_1_xcc_setup_vmid_config(struct amdgpu_device *adev,
                        /* Send no-retry XNACK on fault to suppress VM fault storm */
                        tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT1_CNTL,
                                            RETRY_PERMISSION_OR_INVALID_PAGE_FAULT,
-                                           !amdgpu_noretry);
+                                           1);
                        WREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regGCVM_CONTEXT1_CNTL,
                                            i * hub->ctx_distance, tmp);
                        WREG32_SOC15_OFFSET(GC, GET_INST(GC, j),
index 24582b8d90ffdb9d43057ec506b03dbe777c1c1b..75f7df7db5b666614719863d4625a55830e52c13 100644 (file)
@@ -247,6 +247,8 @@ static void mmhub_v4_2_0_mid_init_system_aperture_regs(struct amdgpu_device *ade
                                   regMMVM_L2_PROTECTION_FAULT_CNTL2);
                tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL2,
                                    ACTIVE_PAGE_MIGRATION_PTE_READ_RETRY, 1);
+               tmp = REG_SET_FIELD(tmp, MMVM_L2_PROTECTION_FAULT_CNTL2,
+                                   ENABLE_RETRY_FAULT_INTERRUPT, 0x1);
                WREG32_SOC15(MMHUB, GET_INST(MMHUB, i),
                             regMMVM_L2_PROTECTION_FAULT_CNTL2, tmp);
        }