phy: mscc: Fix parsing of unicast frames

According to the 1588 standard, it is possible to use both unicast and
multicast frames to send the PTP information. It was noticed that if the
frames were unicast they were not processed by the analyzer meaning that
they were not timestamped. Therefore fix this to match also these
unicast frames.

Fixes: ab2bf9339357 ("net: phy: mscc: 1588 block initialization")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://patch.msgid.link/20250726140307.3039694-1-horatiu.vultur@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/phy/mscc/mscc_ptp.c b/drivers/net/phy/mscc/mscc_ptp.c
index 6b800081eed52fbf4b6d20b0071b420117931f52..275706de5847cd8f8e8bde7425a5e66978a178e0 100644 (file)
--- a/drivers/net/phy/mscc/mscc_ptp.c
+++ b/drivers/net/phy/mscc/mscc_ptp.c
@@ -900,6 +900,7 @@ static int vsc85xx_eth1_conf(struct phy_device *phydev, enum ts_blk blk,
                                     get_unaligned_be32(ptp_multicast));
        } else {
                val |= ANA_ETH1_FLOW_ADDR_MATCH2_ANY_MULTICAST;
+               val |= ANA_ETH1_FLOW_ADDR_MATCH2_ANY_UNICAST;
                vsc85xx_ts_write_csr(phydev, blk,
                                     MSCC_ANA_ETH1_FLOW_ADDR_MATCH2(0), val);
                vsc85xx_ts_write_csr(phydev, blk,

diff --git a/drivers/net/phy/mscc/mscc_ptp.h b/drivers/net/phy/mscc/mscc_ptp.h
index da3465360e901832947f70ff355bbfa6ca73f619..ae9ad925bfa8c07b1f3216655e9f8361a572030e 100644 (file)
--- a/drivers/net/phy/mscc/mscc_ptp.h
+++ b/drivers/net/phy/mscc/mscc_ptp.h
@@ -98,6 +98,7 @@
 #define MSCC_ANA_ETH1_FLOW_ADDR_MATCH2(x) (MSCC_ANA_ETH1_FLOW_ENA(x) + 3)
 #define ANA_ETH1_FLOW_ADDR_MATCH2_MASK_MASK    GENMASK(22, 20)
 #define ANA_ETH1_FLOW_ADDR_MATCH2_ANY_MULTICAST        0x400000
+#define ANA_ETH1_FLOW_ADDR_MATCH2_ANY_UNICAST  0x200000
 #define ANA_ETH1_FLOW_ADDR_MATCH2_FULL_ADDR    0x100000
 #define ANA_ETH1_FLOW_ADDR_MATCH2_SRC_DEST_MASK        GENMASK(17, 16)
 #define ANA_ETH1_FLOW_ADDR_MATCH2_SRC_DEST     0x020000