arm64: dts: imx8mp pollux: add expansion board overlay

An expansion board (PEB-AV-10) may be connected to the
imx8mp-phyboard-pollux. Its main purpose is to provide multimedia
interfaces, featuring a 3.5mm headphone jack, a USB-A port and LVDS as
well as backlight connectors.
Introduce the expansion board as dtsi, as it may be used standalone as
an expansion board, as well as in combination with display panels. These
display panels will include the dtsi.

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index 276172c1fd2cdde6acb3ffc88aa9f0ae9275a0e4..c8194a95681df44d94753086f330c8d04cbce6c5 100644 (file)
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -228,10 +228,13 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-nitrogen-smarc-universal-board.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb
 imx8mp-phyboard-pollux-etml1010g3dra-dtbs += imx8mp-phyboard-pollux-rdk.dtb \
        imx8mp-phyboard-pollux-etml1010g3dra.dtbo
+imx8mp-phyboard-pollux-peb-av-10-dtbs += imx8mp-phyboard-pollux-rdk.dtb \
+       imx8mp-phyboard-pollux-peb-av-10.dtbo
 imx8mp-phyboard-pollux-ph128800t006-dtbs += imx8mp-phyboard-pollux-rdk.dtb \
        imx8mp-phyboard-pollux-ph128800t006.dtbo
 imx8mp-phyboard-pollux-rdk-no-eth-dtbs += imx8mp-phyboard-pollux-rdk.dtb imx8mp-phycore-no-eth.dtbo
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-etml1010g3dra.dtb
+dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-peb-av-10.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-ph128800t006.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk-no-eth.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx8mp-prt8ml.dtb

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-av-10.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-av-10.dtsi
new file mode 100644 (file)
index 0000000..bb740f8
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-av-10.dtsi
@@ -0,0 +1,198 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH
+ */
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+#include <dt-bindings/gpio/gpio.h>
+#include "imx8mp-pinfunc.h"
+
+&{/} {
+       backlight_lvds0: backlight0 {
+               compatible = "pwm-backlight";
+               pinctrl-0 = <&pinctrl_lvds0>;
+               pinctrl-names = "default";
+               power-supply = <&reg_vcc_12v>;
+               status = "disabled";
+       };
+
+       panel_lvds0: panel-lvds0 {
+               backlight = <&backlight_lvds0>;
+               power-supply = <&reg_vcc_3v3_sw>;
+               status = "disabled";
+
+               port {
+                       panel0_in: endpoint {
+                               remote-endpoint = <&ldb_lvds_ch0>;
+                       };
+               };
+       };
+
+       reg_vcc_12v: regulator-12v {
+               compatible = "regulator-fixed";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-max-microvolt = <12000000>;
+               regulator-min-microvolt = <12000000>;
+               regulator-name = "VCC_12V";
+       };
+
+       reg_vcc_1v8_audio: regulator-1v8 {
+               compatible = "regulator-fixed";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-max-microvolt = <1800000>;
+               regulator-min-microvolt = <1800000>;
+               regulator-name = "VCC_1V8_Audio";
+       };
+
+       reg_vcc_3v3_analog: regulator-3v3 {
+               compatible = "regulator-fixed";
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <3300000>;
+               regulator-name = "VCC_3V3_Analog";
+       };
+
+       sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,name = "snd-peb-av-10";
+               simple-audio-card,format = "i2s";
+               simple-audio-card,bitclock-master = <&dailink_master>;
+               simple-audio-card,frame-master = <&dailink_master>;
+               simple-audio-card,mclk-fs = <32>;
+               simple-audio-card,widgets =
+                       "Line", "Line In",
+                       "Speaker", "Speaker",
+                       "Microphone", "Microphone Jack",
+                       "Headphone", "Headphone Jack";
+               simple-audio-card,routing =
+                       "Speaker", "SPOP",
+                       "Speaker", "SPOM",
+                       "Headphone Jack", "HPLOUT",
+                       "Headphone Jack", "HPROUT",
+                       "LINE1L", "Line In",
+                       "LINE1R", "Line In",
+                       "MIC3R", "Microphone Jack",
+                       "Microphone Jack", "Mic Bias";
+
+               simple-audio-card,cpu {
+                       sound-dai = <&sai2>;
+               };
+
+               dailink_master: simple-audio-card,codec {
+                       sound-dai = <&codec>;
+                       clocks = <&clk IMX8MP_CLK_SAI2>;
+               };
+       };
+};
+
+&i2c4 {
+       clock-frequency = <400000>;
+       pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       pinctrl-names = "default", "gpio";
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       codec: codec@18 {
+               compatible = "ti,tlv320aic3007";
+               reg = <0x18>;
+               pinctrl-0 = <&pinctrl_tlv320>;
+               pinctrl-names = "default";
+               #sound-dai-cells = <0>;
+               reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
+               ai3x-gpio-func = <0xd 0x0>;
+               ai3x-micbias-vg = <2>;
+               AVDD-supply = <&reg_vcc_3v3_analog>;
+               DRVDD-supply = <&reg_vcc_3v3_analog>;
+               DVDD-supply = <&reg_vcc_1v8_audio>;
+               IOVDD-supply = <&reg_vcc_3v3_sw>;
+       };
+
+       eeprom@57 {
+               compatible = "atmel,24c32";
+               reg = <0x57>;
+               pagesize = <32>;
+               vcc-supply = <&reg_vcc_3v3_sw>;
+       };
+};
+
+&ldb_lvds_ch0 {
+       remote-endpoint = <&panel0_in>;
+};
+
+&pwm4 {
+       pinctrl-0 = <&pinctrl_pwm4>;
+       pinctrl-names = "default";
+};
+
+&sai2 {
+       pinctrl-0 = <&pinctrl_sai2>;
+       pinctrl-names = "default";
+       assigned-clocks = <&clk IMX8MP_CLK_SAI2>;
+       assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
+       assigned-clock-rates = <12288000>;
+       clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI2_IPG>,
+                <&clk IMX8MP_CLK_DUMMY>,
+                <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1>,
+                <&clk IMX8MP_CLK_DUMMY>,
+                <&clk IMX8MP_CLK_DUMMY>,
+                <&clk IMX8MP_AUDIO_PLL1_OUT>,
+                <&clk IMX8MP_AUDIO_PLL2_OUT>;
+       clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k",
+                     "pll11k";
+       #sound-dai-cells = <0>;
+       fsl,sai-mclk-direction-output;
+       fsl,sai-synchronous-rx;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl_i2c4: i2c4grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL         0x400001c2
+                       MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA         0x400001c2
+               >;
+       };
+
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20       0x1e2
+                       MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21       0x1e2
+               >;
+       };
+
+       pinctrl_lvds0: lvds0grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01       0x12
+               >;
+       };
+
+       pinctrl_pwm4: pwm4grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT        0x12
+               >;
+       };
+
+       pinctrl_sai2: sai2grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI2_MCLK      0xd6
+                       MX8MP_IOMUXC_SAI2_RXFS__AUDIOMIX_SAI2_RX_SYNC   0xd6
+                       MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK    0xd6
+                       MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6
+                       MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00 0xd6
+               >;
+       };
+
+       pinctrl_tlv320: tlv320grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28      0x16
+                       MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22       0x16
+               >;
+       };
+};

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-av-10.dtso b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-av-10.dtso
new file mode 100644 (file)
index 0000000..9507861
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-av-10.dtso
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include "imx8mp-phyboard-pollux-peb-av-10.dtsi"