drm/i915/display: move dpll funcs under dpll sub-struct

Move dpll related functions under dpll sub-struct of struct
intel_display.

The funcs sub-struct of struct intel_display seems unnecessary. Instead
of display->funcs.FEATURE, prefer display->FEATURE.funcs.

Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>
Link: https://patch.msgid.link/02efd924d7efdf42655f5c9bfd0f79a6df5fe2b4.1777537663.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 0c2e17edbd5fdbb61319f7b694b2bd4576cf479b..5a1aee34072878efc8ff8c46105fe350fee6f8a9 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -127,6 +127,9 @@ struct intel_audio {
  * dpll, because on some platforms plls share registers.
  */
 struct intel_dpll_global {
+       /* internal dpll functions */
+       const struct intel_dpll_global_funcs *funcs;
+
        struct mutex lock;
 
        int num_dpll;
@@ -313,9 +316,6 @@ struct intel_display {
 
                /* Display CDCLK functions */
                const struct intel_cdclk_funcs *cdclk;
-
-               /* Display pll funcs */
-               const struct intel_dpll_global_funcs *dpll;
        } funcs;
 
        struct {

diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index a1aa88598013c4c1c8da242564ba35191d90f40b..f40807a5566b68dd771924fac237401050802325 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -1735,7 +1735,7 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
        if (!crtc_state->hw.enable)
                return 0;
 
-       ret = display->funcs.dpll->crtc_compute_clock(state, crtc);
+       ret = display->dpll.funcs->crtc_compute_clock(state, crtc);
        if (ret) {
                drm_dbg_kms(display->drm, "[CRTC:%d:%s] Couldn't calculate DPLL settings\n",
                            crtc->base.base.id, crtc->base.name);
@@ -1759,10 +1759,10 @@ int intel_dpll_crtc_get_dpll(struct intel_atomic_state *state,
        if (!crtc_state->hw.enable || crtc_state->intel_dpll)
                return 0;
 
-       if (!display->funcs.dpll->crtc_get_dpll)
+       if (!display->dpll.funcs->crtc_get_dpll)
                return 0;
 
-       ret = display->funcs.dpll->crtc_get_dpll(state, crtc);
+       ret = display->dpll.funcs->crtc_get_dpll(state, crtc);
        if (ret) {
                drm_dbg_kms(display->drm, "[CRTC:%d:%s] Couldn't get a shared DPLL\n",
                            crtc->base.base.id, crtc->base.name);
@@ -1776,27 +1776,27 @@ void
 intel_dpll_init_clock_hook(struct intel_display *display)
 {
        if (HAS_LT_PHY(display))
-               display->funcs.dpll = &xe3plpd_dpll_funcs;
+               display->dpll.funcs = &xe3plpd_dpll_funcs;
        else if (DISPLAY_VER(display) >= 14)
-               display->funcs.dpll = &mtl_dpll_funcs;
+               display->dpll.funcs = &mtl_dpll_funcs;
        else if (display->platform.dg2)
-               display->funcs.dpll = &dg2_dpll_funcs;
+               display->dpll.funcs = &dg2_dpll_funcs;
        else if (DISPLAY_VER(display) >= 9 || HAS_DDI(display))
-               display->funcs.dpll = &hsw_dpll_funcs;
+               display->dpll.funcs = &hsw_dpll_funcs;
        else if (HAS_PCH_SPLIT(display))
-               display->funcs.dpll = &ilk_dpll_funcs;
+               display->dpll.funcs = &ilk_dpll_funcs;
        else if (display->platform.cherryview)
-               display->funcs.dpll = &chv_dpll_funcs;
+               display->dpll.funcs = &chv_dpll_funcs;
        else if (display->platform.valleyview)
-               display->funcs.dpll = &vlv_dpll_funcs;
+               display->dpll.funcs = &vlv_dpll_funcs;
        else if (display->platform.g4x)
-               display->funcs.dpll = &g4x_dpll_funcs;
+               display->dpll.funcs = &g4x_dpll_funcs;
        else if (display->platform.pineview)
-               display->funcs.dpll = &pnv_dpll_funcs;
+               display->dpll.funcs = &pnv_dpll_funcs;
        else if (DISPLAY_VER(display) != 2)
-               display->funcs.dpll = &i9xx_dpll_funcs;
+               display->dpll.funcs = &i9xx_dpll_funcs;
        else
-               display->funcs.dpll = &i8xx_dpll_funcs;
+               display->dpll.funcs = &i8xx_dpll_funcs;
 }
 
 static bool i9xx_has_pps(struct intel_display *display)