]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
rs6000: Change mode and insn condition for scalar insert exp instruction
authorHaochen Gui <guihaoc@gcc.gnu.org>
Thu, 11 May 2023 02:10:50 +0000 (10:10 +0800)
committerHaochen Gui <guihaoc@gcc.gnu.org>
Fri, 12 May 2023 01:47:00 +0000 (09:47 +0800)
gcc/
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
to xsiexpdp_di.
(__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
xsiexpdpf to xsiexpdpf_di.
* config/rs6000/vsx.md (xsiexpdp): Rename to...
(xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
replace TARGET_64BIT with TARGET_POWERPC64.
(xsiexpdpf): Rename to...
(xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
replace TARGET_64BIT with TARGET_POWERPC64.

gcc/testsuite/
* gcc.target/powerpc/bfp/scalar-insert-exp-0.c: Replace lp64 check
with has_arch_ppc64.
* gcc.target/powerpc/bfp/scalar-insert-exp-1.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-12.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-13.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-3.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-4.c: Likewise.

gcc/config/rs6000/rs6000-builtins.def
gcc/config/rs6000/vsx.md
gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-0.c
gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-1.c
gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-12.c
gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-13.c
gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-3.c
gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-4.c

index c396e27619cc79f24cb6517afd8eaf1697f21578..92d9b46e1b93881930801856237b82fff0059fad 100644 (file)
 
   const double __builtin_vsx_scalar_insert_exp (unsigned long long, \
                                                 unsigned long long);
-    VSIEDP xsiexpdp {}
+    VSIEDP xsiexpdp_di {}
 
   const double __builtin_vsx_scalar_insert_exp_dp (double, unsigned long long);
-    VSIEDPF xsiexpdpf {}
+    VSIEDPF xsiexpdpf_di {}
 
   pure vsc __builtin_vsx_xl_len_r (void *, signed long);
     XL_LEN_R xl_len_r {}
index 3991ec3b0c0ce9bf16780c13f76d061e575de95b..0a34ceebeb548a556cf463c3dca6576cf5231070 100644 (file)
   [(set_attr "type" "vecmove")])
 
 ;; VSX Scalar Insert Exponent Double-Precision
-(define_insn "xsiexpdp"
+(define_insn "xsiexpdp_<mode>"
   [(set (match_operand:DF 0 "vsx_register_operand" "=wa")
        (unspec:DF [(match_operand:DI 1 "register_operand" "r")
-                   (match_operand:DI 2 "register_operand" "r")]
+                   (match_operand:GPR 2 "register_operand" "r")]
         UNSPEC_VSX_SIEXPDP))]
-  "TARGET_P9_VECTOR && TARGET_64BIT"
+  "TARGET_P9_VECTOR && TARGET_POWERPC64"
   "xsiexpdp %x0,%1,%2"
   [(set_attr "type" "fpsimple")])
 
 ;; VSX Scalar Insert Exponent Double-Precision Floating Point Argument
-(define_insn "xsiexpdpf"
+(define_insn "xsiexpdpf_<mode>"
   [(set (match_operand:DF 0 "vsx_register_operand" "=wa")
        (unspec:DF [(match_operand:DF 1 "register_operand" "r")
-                   (match_operand:DI 2 "register_operand" "r")]
+                   (match_operand:GPR 2 "register_operand" "r")]
         UNSPEC_VSX_SIEXPDP))]
-  "TARGET_P9_VECTOR && TARGET_64BIT"
+  "TARGET_P9_VECTOR && TARGET_POWERPC64"
   "xsiexpdp %x0,%1,%2"
   [(set_attr "type" "fpsimple")])
 
index d8243258a67335c6b98fc00d89730c5cabcba988..88d775641583fb9f3fe436cbdffd3152411b4778 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
 
 /* This test should succeed only on 64-bit configurations.  */
 #include <altivec.h>
index 8260b1071787cd5489ab0328da45f5b475821ff7..2f219ddc83aea10b7f0045503f7ce8a168b4c8e6 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-options "-mdejagnu-cpu=power8" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
 
 /* This test should succeed only on 64-bit configurations.  */
 #include <altivec.h>
index 384fc9cc6759ae1074ecf7be86aa028b9fcfae1e..9eade34d9ad164a63e28d3336554b6c36b6cda50 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do run { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target p9vector_hw } */
 /* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
 
 /* This test should succeed only on 64-bit configurations.  */
 #include <altivec.h>
index 0e0042242777b5bcf12da7ee4cdaf5529913fef3..674fba951ae9dc99c82312190aef48019f9ed164 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do run { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target p9vector_hw } */
 /* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
 
 /* This test should succeed only on 64-bit configurations.  */
 #include <altivec.h>
index 3ecbe3318e879cdb51fcd3b0b7e533c682ef76d7..afa2b83f2d280d23e3daaf599eb31181839a5dab 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-options "-mdejagnu-cpu=power9" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
 
 /* This test should succeed only on 64-bit configurations.  */
 #include <altivec.h>
index 1699c67a2f1aed316099bf0f186bf6903e5beb8a..6dc06dd34ea2281000ed47b89bc50df1f4e11a73 100644 (file)
@@ -1,7 +1,7 @@
 /* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-require-effective-target lp64 } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-options "-mdejagnu-cpu=power8" } */
+/* { dg-require-effective-target has_arch_ppc64 } */
 
 /* This test should succeed only on 64-bit configurations.  */
 #include <altivec.h>