ARM: dts: rockchip: Drop redundant CPU "clock-latency"

The "clock-latency" property is part of the deprecated opp-v1 binding
and is redundant if the opp-v2 table has equal or larger values in any
"clock-latency-ns". Add any missing "clock-latency-ns" properties and
remove "clock-latency".

Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-10-63d7dc9ddd0a@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index d4572146d135d9ae0fd1222c745cf64496ed5c86..c49099954c2818d556fad41b31e880c9ff28d913 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -48,7 +48,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a7";
                        reg = <0xf00>;
-                       clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
                        resets = <&cru SRST_CORE0>;
                        operating-points-v2 = <&cpu_opp_table>;
@@ -87,31 +86,38 @@
                opp-216000000 {
                        opp-hz = /bits/ 64 <216000000>;
                        opp-microvolt = <950000 950000 1325000>;
+                       clock-latency-ns = <40000>;
                };
                opp-408000000 {
                        opp-hz = /bits/ 64 <408000000>;
                        opp-microvolt = <950000 950000 1325000>;
+                       clock-latency-ns = <40000>;
                };
                opp-600000000 {
                        opp-hz = /bits/ 64 <600000000>;
                        opp-microvolt = <950000 950000 1325000>;
+                       clock-latency-ns = <40000>;
                };
                opp-696000000 {
                        opp-hz = /bits/ 64 <696000000>;
                        opp-microvolt = <975000 975000 1325000>;
+                       clock-latency-ns = <40000>;
                };
                opp-816000000 {
                        opp-hz = /bits/ 64 <816000000>;
                        opp-microvolt = <1075000 1075000 1325000>;
                        opp-suspend;
+                       clock-latency-ns = <40000>;
                };
                opp-1008000000 {
                        opp-hz = /bits/ 64 <1008000000>;
                        opp-microvolt = <1200000 1200000 1325000>;
+                       clock-latency-ns = <40000>;
                };
                opp-1200000000 {
                        opp-hz = /bits/ 64 <1200000000>;
                        opp-microvolt = <1325000 1325000 1325000>;
+                       clock-latency-ns = <40000>;
                };
        };
 

diff --git a/arch/arm/boot/dts/rockchip/rk3188.dtsi b/arch/arm/boot/dts/rockchip/rk3188.dtsi
index 44b54af0bbf9fa328b1c1917474945cc09b1102d..850bd6e678954331e138f3d34d282e1803cbe38f 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rk3188.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3188.dtsi
@@ -23,7 +23,6 @@
                        compatible = "arm,cortex-a9";
                        next-level-cache = <&L2>;
                        reg = <0x0>;
-                       clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        resets = <&cru SRST_CORE0>;

diff --git a/arch/arm/boot/dts/rockchip/rk322x.dtsi b/arch/arm/boot/dts/rockchip/rk322x.dtsi
index 96421355c2746a0ed9f589e5936e15934fd4bf13..cd11a018105b170e7ca2897bec408d44334a754a 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rk322x.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk322x.dtsi
@@ -36,7 +36,6 @@
                        resets = <&cru SRST_CORE0>;
                        operating-points-v2 = <&cpu0_opp_table>;
                        #cooling-cells = <2>; /* min followed by max */
-                       clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
                        enable-method = "psci";
                };

diff --git a/arch/arm/boot/dts/rockchip/rk3288.dtsi b/arch/arm/boot/dts/rockchip/rk3288.dtsi
index 3f1d640afafaed7e79e15d38910c86129eff7eae..42d705b544ecb6cb4bb97f11d43c34d6a4677bc6 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rk3288.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3288.dtsi
@@ -70,7 +70,6 @@
                        resets = <&cru SRST_CORE0>;
                        operating-points-v2 = <&cpu_opp_table>;
                        #cooling-cells = <2>; /* min followed by max */
-                       clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
                        dynamic-power-coefficient = <370>;
                };
@@ -81,7 +80,6 @@
                        resets = <&cru SRST_CORE1>;
                        operating-points-v2 = <&cpu_opp_table>;
                        #cooling-cells = <2>; /* min followed by max */
-                       clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
                        dynamic-power-coefficient = <370>;
                };
@@ -92,7 +90,6 @@
                        resets = <&cru SRST_CORE2>;
                        operating-points-v2 = <&cpu_opp_table>;
                        #cooling-cells = <2>; /* min followed by max */
-                       clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
                        dynamic-power-coefficient = <370>;
                };
@@ -103,7 +100,6 @@
                        resets = <&cru SRST_CORE3>;
                        operating-points-v2 = <&cpu_opp_table>;
                        #cooling-cells = <2>; /* min followed by max */
-                       clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
                        dynamic-power-coefficient = <370>;
                };
@@ -116,6 +112,7 @@
                opp-126000000 {
                        opp-hz = /bits/ 64 <126000000>;
                        opp-microvolt = <900000>;
+                       clock-latency-ns = <40000>;
                };
                opp-216000000 {
                        opp-hz = /bits/ 64 <216000000>;

diff --git a/arch/arm/boot/dts/rockchip/rv1108.dtsi b/arch/arm/boot/dts/rockchip/rv1108.dtsi
index f3291f3bbc6fd2b480e975632847f9310c082225..42a4d72597a5e0c0c2b424a1a39e2de28c8f99fd 100644 (file)
--- a/arch/arm/boot/dts/rockchip/rv1108.dtsi
+++ b/arch/arm/boot/dts/rockchip/rv1108.dtsi
@@ -32,7 +32,6 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a7";
                        reg = <0xf00>;
-                       clock-latency = <40000>;
                        clocks = <&cru ARMCLK>;
                        #cooling-cells = <2>; /* min followed by max */
                        dynamic-power-coefficient = <75>;