]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/amd/display: Block timing sync for different output formats in pmo
authorDillon Varone <dillon.varone@amd.com>
Mon, 26 Aug 2024 21:08:33 +0000 (17:08 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 4 Oct 2024 14:38:36 +0000 (16:38 +0200)
commit 0765b2afc1118a6ab5fee624e206c782d70db28a upstream.

[WHY & HOW]
If the output format is different for HDMI TMDS signals, they are not
synchronizable.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_dcn4_fams2.c

index 6547cc2c2a773b143d52024ede0f14375763a5a6..a8bebc60f05939b23d4dac59a89e2b92591e861a 100644 (file)
@@ -810,9 +810,11 @@ static void build_synchronized_timing_groups(
                /* find synchronizable timing groups */
                for (j = i + 1; j < display_config->display_config.num_streams; j++) {
                        if (memcmp(master_timing,
-                               &display_config->display_config.stream_descriptors[j].timing,
-                               sizeof(struct dml2_timing_cfg)) == 0 &&
-                               display_config->display_config.stream_descriptors[i].output.output_encoder == display_config->display_config.stream_descriptors[j].output.output_encoder) {
+                                       &display_config->display_config.stream_descriptors[j].timing,
+                                       sizeof(struct dml2_timing_cfg)) == 0 &&
+                                       display_config->display_config.stream_descriptors[i].output.output_encoder == display_config->display_config.stream_descriptors[j].output.output_encoder &&
+                                       (display_config->display_config.stream_descriptors[i].output.output_encoder != dml2_hdmi || //hdmi requires formats match
+                                       display_config->display_config.stream_descriptors[i].output.output_format == display_config->display_config.stream_descriptors[j].output.output_format)) {
                                set_bit_in_bitfield(&pmo->scratch.pmo_dcn4.synchronized_timing_group_masks[timing_group_idx], j);
                                set_bit_in_bitfield(&stream_mapped_mask, j);
                        }