LoongArch: Relax ins_zero_bitmask_operand and remove and<mode>3_align

In r15-1207 I was too stupid to realize we just need to relax
ins_zero_bitmask_operand to allow using bstrins for aligning, instead of
adding a new split.  And, "> 12" in ins_zero_bitmask_operand also makes
no sense: it rejects bstrins for things like "x & ~4l" with no good
reason.

So fix my errors now.

gcc/ChangeLog:

	* config/loongarch/predicates.md (ins_zero_bitmask_operand):
	Cover more cases that bstrins can benefit.
	(high_bitmask_operand): Remove.
	* config/loongarch/constraints.md (Yy): Remove.
	* config/loongarch/loongarch.md (and<mode>3_align): Remove.

gcc/testsuite/ChangeLog:

	* gcc.target/loongarch/bstrins-4.c: New test.

diff --git a/gcc/config/loongarch/constraints.md b/gcc/config/loongarch/constraints.md
index 12cf5e2924a3a1f6f3cb0bddf4686b9f85ac29b8..18da8b31f49918de318dd380f5d4b917049aa762 100644 (file)
--- a/gcc/config/loongarch/constraints.md
+++ b/gcc/config/loongarch/constraints.md
@@ -292,10 +292,6 @@
    "@internal"
    (match_operand 0 "low_bitmask_operand"))
 
-(define_constraint "Yy"
-   "@internal"
-   (match_operand 0 "high_bitmask_operand"))
-
 (define_constraint "YI"
   "@internal
    A replicated vector const in which the replicated value is in the range

diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
index 9bad79bbf45ef0ed783c6e65f5fa84d841035ec9..280d1c403c46c09b203b0684bb81824b4828ed96 100644 (file)
--- a/gcc/config/loongarch/loongarch.md
+++ b/gcc/config/loongarch/loongarch.md
@@ -1588,23 +1588,6 @@
   [(set_attr "move_type" "pick_ins")
    (set_attr "mode" "<MODE>")])
 
-(define_insn_and_split "and<mode>3_align"
-  [(set (match_operand:GPR 0 "register_operand" "=r")
-       (and:GPR (match_operand:GPR 1 "register_operand" "r")
-                (match_operand:GPR 2 "high_bitmask_operand" "Yy")))]
-  ""
-  "#"
-  ""
-  [(set (match_dup 0) (match_dup 1))
-   (set (zero_extract:GPR (match_dup 0) (match_dup 2) (const_int 0))
-       (const_int 0))]
-{
-  int len;
-
-  len = low_bitmask_len (<MODE>mode, ~INTVAL (operands[2]));
-  operands[2] = GEN_INT (len);
-})
-
 (define_insn_and_split "*bstrins_<mode>_for_mask"
   [(set (match_operand:GPR 0 "register_operand" "=r")
        (and:GPR (match_operand:GPR 1 "register_operand" "r")

diff --git a/gcc/config/loongarch/predicates.md b/gcc/config/loongarch/predicates.md
index 58e406ea522b98c24f3c1b8c69cadb1e602bdbf4..95c2544cc2f239aa2cd2e1452764bee813e5d4f7 100644 (file)
--- a/gcc/config/loongarch/predicates.md
+++ b/gcc/config/loongarch/predicates.md
@@ -293,10 +293,6 @@
   (and (match_code "const_int")
        (match_test "low_bitmask_len (mode, INTVAL (op)) > 12")))
 
-(define_predicate "high_bitmask_operand"
-  (and (match_code "const_int")
-       (match_test "low_bitmask_len (mode, ~INTVAL (op)) > 0")))
-
 (define_predicate "d_operand"
   (and (match_code "reg")
        (match_test "GP_REG_P (REGNO (op))")))
@@ -406,11 +402,10 @@
 
 (define_predicate "ins_zero_bitmask_operand"
   (and (match_code "const_int")
-       (match_test "INTVAL (op) != -1")
-       (match_test "INTVAL (op) & 1")
        (match_test "low_bitmask_len (mode, \
                                     ~UINTVAL (op) | (~UINTVAL(op) - 1)) \
-                   > 12")))
+                   > 0")
+       (not (match_operand 0 "const_uns_arith_operand"))))
 
 (define_predicate "const_call_insn_operand"
   (match_code "const,symbol_ref,label_ref")

diff --git a/gcc/testsuite/gcc.target/loongarch/bstrins-4.c b/gcc/testsuite/gcc.target/loongarch/bstrins-4.c
new file mode 100644 (file)
index 0000000..0823cfc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/loongarch/bstrins-4.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -march=loongarch64 -mabi=lp64d" } */
+/* { dg-final { scan-assembler "bstrins\\.d\t\\\$r4,\\\$r0,2,2" } } */
+
+long
+x (long a)
+{
+  return a & ~4;
+}