register rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
- return (GET_CODE (op) == CONST_INT
- && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000);
+ return ((GET_CODE (op) == CONST_INT
+ && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000)
+ || GET_CODE (op) == CONSTANT_P_RTX);
}
/* Similar for a unsigned D field. */
register rtx op;
enum machine_mode mode ATTRIBUTE_UNUSED;
{
- return (GET_CODE (op) == CONST_INT
- && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0);
+ return ((GET_CODE (op) == CONST_INT
+ && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0)
+ || GET_CODE (op) == CONSTANT_P_RTX);
}
/* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
register rtx op;
enum machine_mode mode;
{
- if (GET_CODE (op) == CONST_INT
- && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0)
- return 1;
-
- return gpc_reg_operand (op, mode);
+ return u_short_cint_operand (op, mode) || gpc_reg_operand (op, mode);
}
/* Return 1 is the operand is either a non-special register or ANY
register rtx op;
enum machine_mode mode;
{
- return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
+ return (GET_CODE (op) == CONST_INT
+ || GET_CODE (op) == CONSTANT_P_RTX
+ || gpc_reg_operand (op, mode));
}
/* Return 1 if the operand is an operand that can be loaded via the GOT */
return (gpc_reg_operand (op, mode)
|| (GET_CODE (op) == CONST_INT
&& ((INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0
- || (INTVAL (op) & 0xffff) == 0)));
+ || (INTVAL (op) & 0xffff) == 0))
+ || GET_CODE (op) == CONSTANT_P_RTX);
}
/* Return 1 if C is a constant that is not a logical operand (as
/* Allow any integer constant. */
if (GET_MODE_CLASS (mode) == MODE_INT
- && (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE))
+ && (GET_CODE (op) == CONST_INT
+ || GET_CODE (op) == CONSTANT_P_RTX
+ || GET_CODE (op) == CONST_DOUBLE))
return 1;
/* For floating-point or multi-word mode, the only remaining valid type
/* Define the codes that are matched by predicates in rs6000.c. */
#define PREDICATE_CODES \
- {"short_cint_operand", {CONST_INT}}, \
- {"u_short_cint_operand", {CONST_INT}}, \
+ {"short_cint_operand", {CONST_INT, CONSTANT_P_RTX}}, \
+ {"u_short_cint_operand", {CONST_INT, CONSTANT_P_RTX}}, \
{"non_short_cint_operand", {CONST_INT}}, \
{"gpc_reg_operand", {SUBREG, REG}}, \
{"cc_reg_operand", {SUBREG, REG}}, \
- {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \
+ {"reg_or_short_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
- {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
- {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
+ {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
+ {"reg_or_cint_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
{"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \
{"easy_fp_constant", {CONST_DOUBLE}}, \
{"volatile_mem_operand", {MEM}}, \
{"offsettable_addr_operand", {REG, SUBREG, PLUS}}, \
{"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \
- {"add_operand", {SUBREG, REG, CONST_INT}}, \
+ {"add_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{"non_add_cint_operand", {CONST_INT}}, \
- {"and_operand", {SUBREG, REG, CONST_INT}}, \
- {"and64_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
- {"logical_operand", {SUBREG, REG, CONST_INT}}, \
+ {"and_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
+ {"and64_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX, \
+ CONST_DOUBLE}}, \
+ {"logical_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
{"non_logical_cint_operand", {CONST_INT}}, \
{"mask_operand", {CONST_INT}}, \
{"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \
{"fpmem_operand", {REG}}, \
{"call_operand", {SYMBOL_REF, REG}}, \
{"current_file_function_operand", {SYMBOL_REF}}, \
- {"input_operand", {SUBREG, MEM, REG, CONST_INT, CONST_DOUBLE, SYMBOL_REF}}, \
+ {"input_operand", {SUBREG, MEM, REG, CONST_INT, CONSTANT_P_RTX, \
+ CONST_DOUBLE, SYMBOL_REF}}, \
{"load_multiple_operation", {PARALLEL}}, \
{"store_multiple_operation", {PARALLEL}}, \
{"branch_comparison_operator", {EQ, NE, LE, LT, GE, \