]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
clk: qcom: camcc-sm8450: Specify Titan GDSC power domain as a parent to IPE/BPS/SBI
authorVladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Tue, 21 Oct 2025 23:44:50 +0000 (02:44 +0300)
committerBjorn Andersson <andersson@kernel.org>
Wed, 22 Oct 2025 20:45:29 +0000 (15:45 -0500)
When a consumer turns on/off a power domain dependent on another power
domain in hardware, the parent power domain shall be turned on/off by
the power domain provider as well, and to get it the power domain hardware
hierarchy shall be described in the CAMCC driver.

Establish the power domain hierarchy with a Titan GDSC set as a parent of
other GDSC power domains provided by the SM8450 camera clock controller,
including IPE, BPS and SBI ones.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20251021234450.2271279-7-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
drivers/clk/qcom/camcc-sm8450.c

index 4dd8be8cc9881c890d2e7c3a12f12816a9ab47dc..ef8cf54d0eed6da42fa5d7e961c88f276d8bb3c9 100644 (file)
@@ -2935,6 +2935,7 @@ static struct gdsc bps_gdsc = {
                .name = "bps_gdsc",
        },
        .flags = HW_CTRL | POLL_CFG_GDSCR,
+       .parent = &titan_top_gdsc.pd,
        .pwrsts = PWRSTS_OFF_ON,
 };
 
@@ -2944,6 +2945,7 @@ static struct gdsc ipe_0_gdsc = {
                .name = "ipe_0_gdsc",
        },
        .flags = HW_CTRL | POLL_CFG_GDSCR,
+       .parent = &titan_top_gdsc.pd,
        .pwrsts = PWRSTS_OFF_ON,
 };
 
@@ -2953,6 +2955,7 @@ static struct gdsc sbi_gdsc = {
                .name = "sbi_gdsc",
        },
        .flags = POLL_CFG_GDSCR,
+       .parent = &titan_top_gdsc.pd,
        .pwrsts = PWRSTS_OFF_ON,
 };