airoha_ppe_foe_flow_stats_reset(ppe, npu);
rcu_assign_pointer(eth->npu, npu);
-@@ -1554,6 +1554,10 @@ int airoha_ppe_init(struct airoha_eth *e
+@@ -1555,6 +1555,10 @@ int airoha_ppe_init(struct airoha_eth *e
if (!ppe->foe_check_time)
return -ENOMEM;
+++ /dev/null
-From 4043b0c45f8555a079bdac69a19ed08695a47a7b Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Fri, 7 Nov 2025 00:57:04 +0100
-Subject: [PATCH] pinctrl: airoha: generalize pins/group/function/confs
- handling
-
-In preparation for support of Airoha AN7583, generalize
-pins/group/function/confs handling and move them in match_data.
-Inner function will base the values on the pinctrl priv struct instead of
-relying on hardcoded struct.
-
-This permits to use different PIN data while keeping the same logic.
-
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/mediatek/pinctrl-airoha.c | 567 ++++++++++++----------
- 1 file changed, 318 insertions(+), 249 deletions(-)
-
---- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
-+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-@@ -30,15 +30,15 @@
- #include "../pinconf.h"
- #include "../pinmux.h"
-
--#define PINCTRL_PIN_GROUP(id) \
-- PINCTRL_PINGROUP(#id, id##_pins, ARRAY_SIZE(id##_pins))
-+#define PINCTRL_PIN_GROUP(id, table) \
-+ PINCTRL_PINGROUP(id, table##_pins, ARRAY_SIZE(table##_pins))
-
--#define PINCTRL_FUNC_DESC(id) \
-+#define PINCTRL_FUNC_DESC(id, table) \
- { \
-- .desc = PINCTRL_PINFUNCTION(#id, id##_groups, \
-- ARRAY_SIZE(id##_groups)), \
-- .groups = id##_func_group, \
-- .group_size = ARRAY_SIZE(id##_func_group), \
-+ .desc = PINCTRL_PINFUNCTION(#id, table##_groups, \
-+ ARRAY_SIZE(table##_groups)),\
-+ .groups = table##_func_group, \
-+ .group_size = ARRAY_SIZE(table##_func_group), \
- }
-
- #define PINCTRL_CONF_DESC(p, offset, mask) \
-@@ -357,16 +357,46 @@ struct airoha_pinctrl_gpiochip {
- u32 irq_type[AIROHA_NUM_PINS];
- };
-
-+struct airoha_pinctrl_confs_info {
-+ const struct airoha_pinctrl_conf *confs;
-+ unsigned int num_confs;
-+};
-+
-+enum airoha_pinctrl_confs_type {
-+ AIROHA_PINCTRL_CONFS_PULLUP,
-+ AIROHA_PINCTRL_CONFS_PULLDOWN,
-+ AIROHA_PINCTRL_CONFS_DRIVE_E2,
-+ AIROHA_PINCTRL_CONFS_DRIVE_E4,
-+ AIROHA_PINCTRL_CONFS_PCIE_RST_OD,
-+
-+ AIROHA_PINCTRL_CONFS_MAX,
-+};
-+
- struct airoha_pinctrl {
- struct pinctrl_dev *ctrl;
-
-+ struct pinctrl_desc desc;
-+ const struct pingroup *grps;
-+ const struct airoha_pinctrl_func *funcs;
-+ const struct airoha_pinctrl_confs_info *confs_info;
-+
- struct regmap *chip_scu;
- struct regmap *regmap;
-
- struct airoha_pinctrl_gpiochip gpiochip;
- };
-
--static struct pinctrl_pin_desc airoha_pinctrl_pins[] = {
-+struct airoha_pinctrl_match_data {
-+ const struct pinctrl_pin_desc *pins;
-+ const unsigned int num_pins;
-+ const struct pingroup *grps;
-+ const unsigned int num_grps;
-+ const struct airoha_pinctrl_func *funcs;
-+ const unsigned int num_funcs;
-+ const struct airoha_pinctrl_confs_info confs_info[AIROHA_PINCTRL_CONFS_MAX];
-+};
-+
-+static struct pinctrl_pin_desc en7581_pinctrl_pins[] = {
- PINCTRL_PIN(0, "uart1_txd"),
- PINCTRL_PIN(1, "uart1_rxd"),
- PINCTRL_PIN(2, "i2c_scl"),
-@@ -427,172 +457,172 @@ static struct pinctrl_pin_desc airoha_pi
- PINCTRL_PIN(63, "pcie_reset2"),
- };
-
--static const int pon_pins[] = { 49, 50, 51, 52, 53, 54 };
--static const int pon_tod_1pps_pins[] = { 46 };
--static const int gsw_tod_1pps_pins[] = { 46 };
--static const int sipo_pins[] = { 16, 17 };
--static const int sipo_rclk_pins[] = { 16, 17, 43 };
--static const int mdio_pins[] = { 14, 15 };
--static const int uart2_pins[] = { 48, 55 };
--static const int uart2_cts_rts_pins[] = { 46, 47 };
--static const int hsuart_pins[] = { 28, 29 };
--static const int hsuart_cts_rts_pins[] = { 26, 27 };
--static const int uart4_pins[] = { 38, 39 };
--static const int uart5_pins[] = { 18, 19 };
--static const int i2c0_pins[] = { 2, 3 };
--static const int i2c1_pins[] = { 14, 15 };
--static const int jtag_udi_pins[] = { 16, 17, 18, 19, 20 };
--static const int jtag_dfd_pins[] = { 16, 17, 18, 19, 20 };
--static const int i2s_pins[] = { 26, 27, 28, 29 };
--static const int pcm1_pins[] = { 22, 23, 24, 25 };
--static const int pcm2_pins[] = { 18, 19, 20, 21 };
--static const int spi_quad_pins[] = { 32, 33 };
--static const int spi_pins[] = { 4, 5, 6, 7 };
--static const int spi_cs1_pins[] = { 34 };
--static const int pcm_spi_pins[] = { 18, 19, 20, 21, 22, 23, 24, 25 };
--static const int pcm_spi_int_pins[] = { 14 };
--static const int pcm_spi_rst_pins[] = { 15 };
--static const int pcm_spi_cs1_pins[] = { 43 };
--static const int pcm_spi_cs2_pins[] = { 40 };
--static const int pcm_spi_cs2_p128_pins[] = { 40 };
--static const int pcm_spi_cs2_p156_pins[] = { 40 };
--static const int pcm_spi_cs3_pins[] = { 41 };
--static const int pcm_spi_cs4_pins[] = { 42 };
--static const int emmc_pins[] = { 4, 5, 6, 30, 31, 32, 33, 34, 35, 36, 37 };
--static const int pnand_pins[] = { 4, 5, 6, 7, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42 };
--static const int gpio0_pins[] = { 13 };
--static const int gpio1_pins[] = { 14 };
--static const int gpio2_pins[] = { 15 };
--static const int gpio3_pins[] = { 16 };
--static const int gpio4_pins[] = { 17 };
--static const int gpio5_pins[] = { 18 };
--static const int gpio6_pins[] = { 19 };
--static const int gpio7_pins[] = { 20 };
--static const int gpio8_pins[] = { 21 };
--static const int gpio9_pins[] = { 22 };
--static const int gpio10_pins[] = { 23 };
--static const int gpio11_pins[] = { 24 };
--static const int gpio12_pins[] = { 25 };
--static const int gpio13_pins[] = { 26 };
--static const int gpio14_pins[] = { 27 };
--static const int gpio15_pins[] = { 28 };
--static const int gpio16_pins[] = { 29 };
--static const int gpio17_pins[] = { 30 };
--static const int gpio18_pins[] = { 31 };
--static const int gpio19_pins[] = { 32 };
--static const int gpio20_pins[] = { 33 };
--static const int gpio21_pins[] = { 34 };
--static const int gpio22_pins[] = { 35 };
--static const int gpio23_pins[] = { 36 };
--static const int gpio24_pins[] = { 37 };
--static const int gpio25_pins[] = { 38 };
--static const int gpio26_pins[] = { 39 };
--static const int gpio27_pins[] = { 40 };
--static const int gpio28_pins[] = { 41 };
--static const int gpio29_pins[] = { 42 };
--static const int gpio30_pins[] = { 43 };
--static const int gpio31_pins[] = { 44 };
--static const int gpio33_pins[] = { 46 };
--static const int gpio34_pins[] = { 47 };
--static const int gpio35_pins[] = { 48 };
--static const int gpio36_pins[] = { 49 };
--static const int gpio37_pins[] = { 50 };
--static const int gpio38_pins[] = { 51 };
--static const int gpio39_pins[] = { 52 };
--static const int gpio40_pins[] = { 53 };
--static const int gpio41_pins[] = { 54 };
--static const int gpio42_pins[] = { 55 };
--static const int gpio43_pins[] = { 56 };
--static const int gpio44_pins[] = { 57 };
--static const int gpio45_pins[] = { 58 };
--static const int gpio46_pins[] = { 59 };
--static const int pcie_reset0_pins[] = { 61 };
--static const int pcie_reset1_pins[] = { 62 };
--static const int pcie_reset2_pins[] = { 63 };
--
--static const struct pingroup airoha_pinctrl_groups[] = {
-- PINCTRL_PIN_GROUP(pon),
-- PINCTRL_PIN_GROUP(pon_tod_1pps),
-- PINCTRL_PIN_GROUP(gsw_tod_1pps),
-- PINCTRL_PIN_GROUP(sipo),
-- PINCTRL_PIN_GROUP(sipo_rclk),
-- PINCTRL_PIN_GROUP(mdio),
-- PINCTRL_PIN_GROUP(uart2),
-- PINCTRL_PIN_GROUP(uart2_cts_rts),
-- PINCTRL_PIN_GROUP(hsuart),
-- PINCTRL_PIN_GROUP(hsuart_cts_rts),
-- PINCTRL_PIN_GROUP(uart4),
-- PINCTRL_PIN_GROUP(uart5),
-- PINCTRL_PIN_GROUP(i2c0),
-- PINCTRL_PIN_GROUP(i2c1),
-- PINCTRL_PIN_GROUP(jtag_udi),
-- PINCTRL_PIN_GROUP(jtag_dfd),
-- PINCTRL_PIN_GROUP(i2s),
-- PINCTRL_PIN_GROUP(pcm1),
-- PINCTRL_PIN_GROUP(pcm2),
-- PINCTRL_PIN_GROUP(spi),
-- PINCTRL_PIN_GROUP(spi_quad),
-- PINCTRL_PIN_GROUP(spi_cs1),
-- PINCTRL_PIN_GROUP(pcm_spi),
-- PINCTRL_PIN_GROUP(pcm_spi_int),
-- PINCTRL_PIN_GROUP(pcm_spi_rst),
-- PINCTRL_PIN_GROUP(pcm_spi_cs1),
-- PINCTRL_PIN_GROUP(pcm_spi_cs2_p128),
-- PINCTRL_PIN_GROUP(pcm_spi_cs2_p156),
-- PINCTRL_PIN_GROUP(pcm_spi_cs2),
-- PINCTRL_PIN_GROUP(pcm_spi_cs3),
-- PINCTRL_PIN_GROUP(pcm_spi_cs4),
-- PINCTRL_PIN_GROUP(emmc),
-- PINCTRL_PIN_GROUP(pnand),
-- PINCTRL_PIN_GROUP(gpio0),
-- PINCTRL_PIN_GROUP(gpio1),
-- PINCTRL_PIN_GROUP(gpio2),
-- PINCTRL_PIN_GROUP(gpio3),
-- PINCTRL_PIN_GROUP(gpio4),
-- PINCTRL_PIN_GROUP(gpio5),
-- PINCTRL_PIN_GROUP(gpio6),
-- PINCTRL_PIN_GROUP(gpio7),
-- PINCTRL_PIN_GROUP(gpio8),
-- PINCTRL_PIN_GROUP(gpio9),
-- PINCTRL_PIN_GROUP(gpio10),
-- PINCTRL_PIN_GROUP(gpio11),
-- PINCTRL_PIN_GROUP(gpio12),
-- PINCTRL_PIN_GROUP(gpio13),
-- PINCTRL_PIN_GROUP(gpio14),
-- PINCTRL_PIN_GROUP(gpio15),
-- PINCTRL_PIN_GROUP(gpio16),
-- PINCTRL_PIN_GROUP(gpio17),
-- PINCTRL_PIN_GROUP(gpio18),
-- PINCTRL_PIN_GROUP(gpio19),
-- PINCTRL_PIN_GROUP(gpio20),
-- PINCTRL_PIN_GROUP(gpio21),
-- PINCTRL_PIN_GROUP(gpio22),
-- PINCTRL_PIN_GROUP(gpio23),
-- PINCTRL_PIN_GROUP(gpio24),
-- PINCTRL_PIN_GROUP(gpio25),
-- PINCTRL_PIN_GROUP(gpio26),
-- PINCTRL_PIN_GROUP(gpio27),
-- PINCTRL_PIN_GROUP(gpio28),
-- PINCTRL_PIN_GROUP(gpio29),
-- PINCTRL_PIN_GROUP(gpio30),
-- PINCTRL_PIN_GROUP(gpio31),
-- PINCTRL_PIN_GROUP(gpio33),
-- PINCTRL_PIN_GROUP(gpio34),
-- PINCTRL_PIN_GROUP(gpio35),
-- PINCTRL_PIN_GROUP(gpio36),
-- PINCTRL_PIN_GROUP(gpio37),
-- PINCTRL_PIN_GROUP(gpio38),
-- PINCTRL_PIN_GROUP(gpio39),
-- PINCTRL_PIN_GROUP(gpio40),
-- PINCTRL_PIN_GROUP(gpio41),
-- PINCTRL_PIN_GROUP(gpio42),
-- PINCTRL_PIN_GROUP(gpio43),
-- PINCTRL_PIN_GROUP(gpio44),
-- PINCTRL_PIN_GROUP(gpio45),
-- PINCTRL_PIN_GROUP(gpio46),
-- PINCTRL_PIN_GROUP(pcie_reset0),
-- PINCTRL_PIN_GROUP(pcie_reset1),
-- PINCTRL_PIN_GROUP(pcie_reset2),
-+static const int en7581_pon_pins[] = { 49, 50, 51, 52, 53, 54 };
-+static const int en7581_pon_tod_1pps_pins[] = { 46 };
-+static const int en7581_gsw_tod_1pps_pins[] = { 46 };
-+static const int en7581_sipo_pins[] = { 16, 17 };
-+static const int en7581_sipo_rclk_pins[] = { 16, 17, 43 };
-+static const int en7581_mdio_pins[] = { 14, 15 };
-+static const int en7581_uart2_pins[] = { 48, 55 };
-+static const int en7581_uart2_cts_rts_pins[] = { 46, 47 };
-+static const int en7581_hsuart_pins[] = { 28, 29 };
-+static const int en7581_hsuart_cts_rts_pins[] = { 26, 27 };
-+static const int en7581_uart4_pins[] = { 38, 39 };
-+static const int en7581_uart5_pins[] = { 18, 19 };
-+static const int en7581_i2c0_pins[] = { 2, 3 };
-+static const int en7581_i2c1_pins[] = { 14, 15 };
-+static const int en7581_jtag_udi_pins[] = { 16, 17, 18, 19, 20 };
-+static const int en7581_jtag_dfd_pins[] = { 16, 17, 18, 19, 20 };
-+static const int en7581_i2s_pins[] = { 26, 27, 28, 29 };
-+static const int en7581_pcm1_pins[] = { 22, 23, 24, 25 };
-+static const int en7581_pcm2_pins[] = { 18, 19, 20, 21 };
-+static const int en7581_spi_quad_pins[] = { 32, 33 };
-+static const int en7581_spi_pins[] = { 4, 5, 6, 7 };
-+static const int en7581_spi_cs1_pins[] = { 34 };
-+static const int en7581_pcm_spi_pins[] = { 18, 19, 20, 21, 22, 23, 24, 25 };
-+static const int en7581_pcm_spi_int_pins[] = { 14 };
-+static const int en7581_pcm_spi_rst_pins[] = { 15 };
-+static const int en7581_pcm_spi_cs1_pins[] = { 43 };
-+static const int en7581_pcm_spi_cs2_pins[] = { 40 };
-+static const int en7581_pcm_spi_cs2_p128_pins[] = { 40 };
-+static const int en7581_pcm_spi_cs2_p156_pins[] = { 40 };
-+static const int en7581_pcm_spi_cs3_pins[] = { 41 };
-+static const int en7581_pcm_spi_cs4_pins[] = { 42 };
-+static const int en7581_emmc_pins[] = { 4, 5, 6, 30, 31, 32, 33, 34, 35, 36, 37 };
-+static const int en7581_pnand_pins[] = { 4, 5, 6, 7, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42 };
-+static const int en7581_gpio0_pins[] = { 13 };
-+static const int en7581_gpio1_pins[] = { 14 };
-+static const int en7581_gpio2_pins[] = { 15 };
-+static const int en7581_gpio3_pins[] = { 16 };
-+static const int en7581_gpio4_pins[] = { 17 };
-+static const int en7581_gpio5_pins[] = { 18 };
-+static const int en7581_gpio6_pins[] = { 19 };
-+static const int en7581_gpio7_pins[] = { 20 };
-+static const int en7581_gpio8_pins[] = { 21 };
-+static const int en7581_gpio9_pins[] = { 22 };
-+static const int en7581_gpio10_pins[] = { 23 };
-+static const int en7581_gpio11_pins[] = { 24 };
-+static const int en7581_gpio12_pins[] = { 25 };
-+static const int en7581_gpio13_pins[] = { 26 };
-+static const int en7581_gpio14_pins[] = { 27 };
-+static const int en7581_gpio15_pins[] = { 28 };
-+static const int en7581_gpio16_pins[] = { 29 };
-+static const int en7581_gpio17_pins[] = { 30 };
-+static const int en7581_gpio18_pins[] = { 31 };
-+static const int en7581_gpio19_pins[] = { 32 };
-+static const int en7581_gpio20_pins[] = { 33 };
-+static const int en7581_gpio21_pins[] = { 34 };
-+static const int en7581_gpio22_pins[] = { 35 };
-+static const int en7581_gpio23_pins[] = { 36 };
-+static const int en7581_gpio24_pins[] = { 37 };
-+static const int en7581_gpio25_pins[] = { 38 };
-+static const int en7581_gpio26_pins[] = { 39 };
-+static const int en7581_gpio27_pins[] = { 40 };
-+static const int en7581_gpio28_pins[] = { 41 };
-+static const int en7581_gpio29_pins[] = { 42 };
-+static const int en7581_gpio30_pins[] = { 43 };
-+static const int en7581_gpio31_pins[] = { 44 };
-+static const int en7581_gpio33_pins[] = { 46 };
-+static const int en7581_gpio34_pins[] = { 47 };
-+static const int en7581_gpio35_pins[] = { 48 };
-+static const int en7581_gpio36_pins[] = { 49 };
-+static const int en7581_gpio37_pins[] = { 50 };
-+static const int en7581_gpio38_pins[] = { 51 };
-+static const int en7581_gpio39_pins[] = { 52 };
-+static const int en7581_gpio40_pins[] = { 53 };
-+static const int en7581_gpio41_pins[] = { 54 };
-+static const int en7581_gpio42_pins[] = { 55 };
-+static const int en7581_gpio43_pins[] = { 56 };
-+static const int en7581_gpio44_pins[] = { 57 };
-+static const int en7581_gpio45_pins[] = { 58 };
-+static const int en7581_gpio46_pins[] = { 59 };
-+static const int en7581_pcie_reset0_pins[] = { 61 };
-+static const int en7581_pcie_reset1_pins[] = { 62 };
-+static const int en7581_pcie_reset2_pins[] = { 63 };
-+
-+static const struct pingroup en7581_pinctrl_groups[] = {
-+ PINCTRL_PIN_GROUP("pon", en7581_pon),
-+ PINCTRL_PIN_GROUP("pon_tod_1pps", en7581_pon_tod_1pps),
-+ PINCTRL_PIN_GROUP("gsw_tod_1pps", en7581_gsw_tod_1pps),
-+ PINCTRL_PIN_GROUP("sipo", en7581_sipo),
-+ PINCTRL_PIN_GROUP("sipo_rclk", en7581_sipo_rclk),
-+ PINCTRL_PIN_GROUP("mdio", en7581_mdio),
-+ PINCTRL_PIN_GROUP("uart2", en7581_uart2),
-+ PINCTRL_PIN_GROUP("uart2_cts_rts", en7581_uart2_cts_rts),
-+ PINCTRL_PIN_GROUP("hsuart", en7581_hsuart),
-+ PINCTRL_PIN_GROUP("hsuart_cts_rts", en7581_hsuart_cts_rts),
-+ PINCTRL_PIN_GROUP("uart4", en7581_uart4),
-+ PINCTRL_PIN_GROUP("uart5", en7581_uart5),
-+ PINCTRL_PIN_GROUP("i2c0", en7581_i2c0),
-+ PINCTRL_PIN_GROUP("i2c1", en7581_i2c1),
-+ PINCTRL_PIN_GROUP("jtag_udi", en7581_jtag_udi),
-+ PINCTRL_PIN_GROUP("jtag_dfd", en7581_jtag_dfd),
-+ PINCTRL_PIN_GROUP("i2s", en7581_i2s),
-+ PINCTRL_PIN_GROUP("pcm1", en7581_pcm1),
-+ PINCTRL_PIN_GROUP("pcm2", en7581_pcm2),
-+ PINCTRL_PIN_GROUP("spi", en7581_spi),
-+ PINCTRL_PIN_GROUP("spi_quad", en7581_spi_quad),
-+ PINCTRL_PIN_GROUP("spi_cs1", en7581_spi_cs1),
-+ PINCTRL_PIN_GROUP("pcm_spi", en7581_pcm_spi),
-+ PINCTRL_PIN_GROUP("pcm_spi_int", en7581_pcm_spi_int),
-+ PINCTRL_PIN_GROUP("pcm_spi_rst", en7581_pcm_spi_rst),
-+ PINCTRL_PIN_GROUP("pcm_spi_cs1", en7581_pcm_spi_cs1),
-+ PINCTRL_PIN_GROUP("pcm_spi_cs2_p128", en7581_pcm_spi_cs2_p128),
-+ PINCTRL_PIN_GROUP("pcm_spi_cs2_p156", en7581_pcm_spi_cs2_p156),
-+ PINCTRL_PIN_GROUP("pcm_spi_cs2", en7581_pcm_spi_cs2),
-+ PINCTRL_PIN_GROUP("pcm_spi_cs3", en7581_pcm_spi_cs3),
-+ PINCTRL_PIN_GROUP("pcm_spi_cs4", en7581_pcm_spi_cs4),
-+ PINCTRL_PIN_GROUP("emmc", en7581_emmc),
-+ PINCTRL_PIN_GROUP("pnand", en7581_pnand),
-+ PINCTRL_PIN_GROUP("gpio0", en7581_gpio0),
-+ PINCTRL_PIN_GROUP("gpio1", en7581_gpio1),
-+ PINCTRL_PIN_GROUP("gpio2", en7581_gpio2),
-+ PINCTRL_PIN_GROUP("gpio3", en7581_gpio3),
-+ PINCTRL_PIN_GROUP("gpio4", en7581_gpio4),
-+ PINCTRL_PIN_GROUP("gpio5", en7581_gpio5),
-+ PINCTRL_PIN_GROUP("gpio6", en7581_gpio6),
-+ PINCTRL_PIN_GROUP("gpio7", en7581_gpio7),
-+ PINCTRL_PIN_GROUP("gpio8", en7581_gpio8),
-+ PINCTRL_PIN_GROUP("gpio9", en7581_gpio9),
-+ PINCTRL_PIN_GROUP("gpio10", en7581_gpio10),
-+ PINCTRL_PIN_GROUP("gpio11", en7581_gpio11),
-+ PINCTRL_PIN_GROUP("gpio12", en7581_gpio12),
-+ PINCTRL_PIN_GROUP("gpio13", en7581_gpio13),
-+ PINCTRL_PIN_GROUP("gpio14", en7581_gpio14),
-+ PINCTRL_PIN_GROUP("gpio15", en7581_gpio15),
-+ PINCTRL_PIN_GROUP("gpio16", en7581_gpio16),
-+ PINCTRL_PIN_GROUP("gpio17", en7581_gpio17),
-+ PINCTRL_PIN_GROUP("gpio18", en7581_gpio18),
-+ PINCTRL_PIN_GROUP("gpio19", en7581_gpio19),
-+ PINCTRL_PIN_GROUP("gpio20", en7581_gpio20),
-+ PINCTRL_PIN_GROUP("gpio21", en7581_gpio21),
-+ PINCTRL_PIN_GROUP("gpio22", en7581_gpio22),
-+ PINCTRL_PIN_GROUP("gpio23", en7581_gpio23),
-+ PINCTRL_PIN_GROUP("gpio24", en7581_gpio24),
-+ PINCTRL_PIN_GROUP("gpio25", en7581_gpio25),
-+ PINCTRL_PIN_GROUP("gpio26", en7581_gpio26),
-+ PINCTRL_PIN_GROUP("gpio27", en7581_gpio27),
-+ PINCTRL_PIN_GROUP("gpio28", en7581_gpio28),
-+ PINCTRL_PIN_GROUP("gpio29", en7581_gpio29),
-+ PINCTRL_PIN_GROUP("gpio30", en7581_gpio30),
-+ PINCTRL_PIN_GROUP("gpio31", en7581_gpio31),
-+ PINCTRL_PIN_GROUP("gpio33", en7581_gpio33),
-+ PINCTRL_PIN_GROUP("gpio34", en7581_gpio34),
-+ PINCTRL_PIN_GROUP("gpio35", en7581_gpio35),
-+ PINCTRL_PIN_GROUP("gpio36", en7581_gpio36),
-+ PINCTRL_PIN_GROUP("gpio37", en7581_gpio37),
-+ PINCTRL_PIN_GROUP("gpio38", en7581_gpio38),
-+ PINCTRL_PIN_GROUP("gpio39", en7581_gpio39),
-+ PINCTRL_PIN_GROUP("gpio40", en7581_gpio40),
-+ PINCTRL_PIN_GROUP("gpio41", en7581_gpio41),
-+ PINCTRL_PIN_GROUP("gpio42", en7581_gpio42),
-+ PINCTRL_PIN_GROUP("gpio43", en7581_gpio43),
-+ PINCTRL_PIN_GROUP("gpio44", en7581_gpio44),
-+ PINCTRL_PIN_GROUP("gpio45", en7581_gpio45),
-+ PINCTRL_PIN_GROUP("gpio46", en7581_gpio46),
-+ PINCTRL_PIN_GROUP("pcie_reset0", en7581_pcie_reset0),
-+ PINCTRL_PIN_GROUP("pcie_reset1", en7581_pcie_reset1),
-+ PINCTRL_PIN_GROUP("pcie_reset2", en7581_pcie_reset2),
- };
-
- static const char *const pon_groups[] = { "pon" };
-@@ -1955,33 +1985,33 @@ static const struct airoha_pinctrl_func_
- },
- };
-
--static const struct airoha_pinctrl_func airoha_pinctrl_funcs[] = {
-- PINCTRL_FUNC_DESC(pon),
-- PINCTRL_FUNC_DESC(tod_1pps),
-- PINCTRL_FUNC_DESC(sipo),
-- PINCTRL_FUNC_DESC(mdio),
-- PINCTRL_FUNC_DESC(uart),
-- PINCTRL_FUNC_DESC(i2c),
-- PINCTRL_FUNC_DESC(jtag),
-- PINCTRL_FUNC_DESC(pcm),
-- PINCTRL_FUNC_DESC(spi),
-- PINCTRL_FUNC_DESC(pcm_spi),
-- PINCTRL_FUNC_DESC(i2s),
-- PINCTRL_FUNC_DESC(emmc),
-- PINCTRL_FUNC_DESC(pnand),
-- PINCTRL_FUNC_DESC(pcie_reset),
-- PINCTRL_FUNC_DESC(pwm),
-- PINCTRL_FUNC_DESC(phy1_led0),
-- PINCTRL_FUNC_DESC(phy2_led0),
-- PINCTRL_FUNC_DESC(phy3_led0),
-- PINCTRL_FUNC_DESC(phy4_led0),
-- PINCTRL_FUNC_DESC(phy1_led1),
-- PINCTRL_FUNC_DESC(phy2_led1),
-- PINCTRL_FUNC_DESC(phy3_led1),
-- PINCTRL_FUNC_DESC(phy4_led1),
-+static const struct airoha_pinctrl_func en7581_pinctrl_funcs[] = {
-+ PINCTRL_FUNC_DESC("pon", pon),
-+ PINCTRL_FUNC_DESC("tod_1pps", tod_1pps),
-+ PINCTRL_FUNC_DESC("sipo", sipo),
-+ PINCTRL_FUNC_DESC("mdio", mdio),
-+ PINCTRL_FUNC_DESC("uart", uart),
-+ PINCTRL_FUNC_DESC("i2c", i2c),
-+ PINCTRL_FUNC_DESC("jtag", jtag),
-+ PINCTRL_FUNC_DESC("pcm", pcm),
-+ PINCTRL_FUNC_DESC("spi", spi),
-+ PINCTRL_FUNC_DESC("pcm_spi", pcm_spi),
-+ PINCTRL_FUNC_DESC("i2s", i2s),
-+ PINCTRL_FUNC_DESC("emmc", emmc),
-+ PINCTRL_FUNC_DESC("pnand", pnand),
-+ PINCTRL_FUNC_DESC("pcie_reset", pcie_reset),
-+ PINCTRL_FUNC_DESC("pwm", pwm),
-+ PINCTRL_FUNC_DESC("phy1_led0", phy1_led0),
-+ PINCTRL_FUNC_DESC("phy2_led0", phy2_led0),
-+ PINCTRL_FUNC_DESC("phy3_led0", phy3_led0),
-+ PINCTRL_FUNC_DESC("phy4_led0", phy4_led0),
-+ PINCTRL_FUNC_DESC("phy1_led1", phy1_led1),
-+ PINCTRL_FUNC_DESC("phy2_led1", phy2_led1),
-+ PINCTRL_FUNC_DESC("phy3_led1", phy3_led1),
-+ PINCTRL_FUNC_DESC("phy4_led1", phy4_led1),
- };
-
--static const struct airoha_pinctrl_conf airoha_pinctrl_pullup_conf[] = {
-+static const struct airoha_pinctrl_conf en7581_pinctrl_pullup_conf[] = {
- PINCTRL_CONF_DESC(0, REG_I2C_SDA_PU, UART1_TXD_PU_MASK),
- PINCTRL_CONF_DESC(1, REG_I2C_SDA_PU, UART1_RXD_PU_MASK),
- PINCTRL_CONF_DESC(2, REG_I2C_SDA_PU, I2C_SDA_PU_MASK),
-@@ -2042,7 +2072,7 @@ static const struct airoha_pinctrl_conf
- PINCTRL_CONF_DESC(63, REG_I2C_SDA_PU, PCIE2_RESET_PU_MASK),
- };
-
--static const struct airoha_pinctrl_conf airoha_pinctrl_pulldown_conf[] = {
-+static const struct airoha_pinctrl_conf en7581_pinctrl_pulldown_conf[] = {
- PINCTRL_CONF_DESC(0, REG_I2C_SDA_PD, UART1_TXD_PD_MASK),
- PINCTRL_CONF_DESC(1, REG_I2C_SDA_PD, UART1_RXD_PD_MASK),
- PINCTRL_CONF_DESC(2, REG_I2C_SDA_PD, I2C_SDA_PD_MASK),
-@@ -2103,7 +2133,7 @@ static const struct airoha_pinctrl_conf
- PINCTRL_CONF_DESC(63, REG_I2C_SDA_PD, PCIE2_RESET_PD_MASK),
- };
-
--static const struct airoha_pinctrl_conf airoha_pinctrl_drive_e2_conf[] = {
-+static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e2_conf[] = {
- PINCTRL_CONF_DESC(0, REG_I2C_SDA_E2, UART1_TXD_E2_MASK),
- PINCTRL_CONF_DESC(1, REG_I2C_SDA_E2, UART1_RXD_E2_MASK),
- PINCTRL_CONF_DESC(2, REG_I2C_SDA_E2, I2C_SDA_E2_MASK),
-@@ -2164,7 +2194,7 @@ static const struct airoha_pinctrl_conf
- PINCTRL_CONF_DESC(63, REG_I2C_SDA_E2, PCIE2_RESET_E2_MASK),
- };
-
--static const struct airoha_pinctrl_conf airoha_pinctrl_drive_e4_conf[] = {
-+static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e4_conf[] = {
- PINCTRL_CONF_DESC(0, REG_I2C_SDA_E4, UART1_TXD_E4_MASK),
- PINCTRL_CONF_DESC(1, REG_I2C_SDA_E4, UART1_RXD_E4_MASK),
- PINCTRL_CONF_DESC(2, REG_I2C_SDA_E4, I2C_SDA_E4_MASK),
-@@ -2225,7 +2255,7 @@ static const struct airoha_pinctrl_conf
- PINCTRL_CONF_DESC(63, REG_I2C_SDA_E4, PCIE2_RESET_E4_MASK),
- };
-
--static const struct airoha_pinctrl_conf airoha_pinctrl_pcie_rst_od_conf[] = {
-+static const struct airoha_pinctrl_conf en7581_pinctrl_pcie_rst_od_conf[] = {
- PINCTRL_CONF_DESC(61, REG_PCIE_RESET_OD, PCIE0_RESET_OD_MASK),
- PINCTRL_CONF_DESC(62, REG_PCIE_RESET_OD, PCIE1_RESET_OD_MASK),
- PINCTRL_CONF_DESC(63, REG_PCIE_RESET_OD, PCIE2_RESET_OD_MASK),
-@@ -2546,12 +2576,17 @@ airoha_pinctrl_get_conf_reg(const struct
- }
-
- static int airoha_pinctrl_get_conf(struct airoha_pinctrl *pinctrl,
-- const struct airoha_pinctrl_conf *conf,
-- int conf_size, int pin, u32 *val)
-+ enum airoha_pinctrl_confs_type conf_type,
-+ int pin, u32 *val)
- {
-+ const struct airoha_pinctrl_confs_info *confs_info;
- const struct airoha_pinctrl_reg *reg;
-
-- reg = airoha_pinctrl_get_conf_reg(conf, conf_size, pin);
-+ confs_info = &pinctrl->confs_info[conf_type];
-+
-+ reg = airoha_pinctrl_get_conf_reg(confs_info->confs,
-+ confs_info->num_confs,
-+ pin);
- if (!reg)
- return -EINVAL;
-
-@@ -2564,12 +2599,17 @@ static int airoha_pinctrl_get_conf(struc
- }
-
- static int airoha_pinctrl_set_conf(struct airoha_pinctrl *pinctrl,
-- const struct airoha_pinctrl_conf *conf,
-- int conf_size, int pin, u32 val)
-+ enum airoha_pinctrl_confs_type conf_type,
-+ int pin, u32 val)
- {
-+ const struct airoha_pinctrl_confs_info *confs_info;
- const struct airoha_pinctrl_reg *reg = NULL;
-
-- reg = airoha_pinctrl_get_conf_reg(conf, conf_size, pin);
-+ confs_info = &pinctrl->confs_info[conf_type];
-+
-+ reg = airoha_pinctrl_get_conf_reg(confs_info->confs,
-+ confs_info->num_confs,
-+ pin);
- if (!reg)
- return -EINVAL;
-
-@@ -2582,44 +2622,34 @@ static int airoha_pinctrl_set_conf(struc
- }
-
- #define airoha_pinctrl_get_pullup_conf(pinctrl, pin, val) \
-- airoha_pinctrl_get_conf((pinctrl), airoha_pinctrl_pullup_conf, \
-- ARRAY_SIZE(airoha_pinctrl_pullup_conf), \
-+ airoha_pinctrl_get_conf((pinctrl), AIROHA_PINCTRL_CONFS_PULLUP, \
- (pin), (val))
- #define airoha_pinctrl_get_pulldown_conf(pinctrl, pin, val) \
-- airoha_pinctrl_get_conf((pinctrl), airoha_pinctrl_pulldown_conf, \
-- ARRAY_SIZE(airoha_pinctrl_pulldown_conf), \
-+ airoha_pinctrl_get_conf((pinctrl), AIROHA_PINCTRL_CONFS_PULLDOWN, \
- (pin), (val))
- #define airoha_pinctrl_get_drive_e2_conf(pinctrl, pin, val) \
-- airoha_pinctrl_get_conf((pinctrl), airoha_pinctrl_drive_e2_conf, \
-- ARRAY_SIZE(airoha_pinctrl_drive_e2_conf), \
-+ airoha_pinctrl_get_conf((pinctrl), AIROHA_PINCTRL_CONFS_DRIVE_E2, \
- (pin), (val))
- #define airoha_pinctrl_get_drive_e4_conf(pinctrl, pin, val) \
-- airoha_pinctrl_get_conf((pinctrl), airoha_pinctrl_drive_e4_conf, \
-- ARRAY_SIZE(airoha_pinctrl_drive_e4_conf), \
-+ airoha_pinctrl_get_conf((pinctrl), AIROHA_PINCTRL_CONFS_DRIVE_E4, \
- (pin), (val))
- #define airoha_pinctrl_get_pcie_rst_od_conf(pinctrl, pin, val) \
-- airoha_pinctrl_get_conf((pinctrl), airoha_pinctrl_pcie_rst_od_conf, \
-- ARRAY_SIZE(airoha_pinctrl_pcie_rst_od_conf), \
-+ airoha_pinctrl_get_conf((pinctrl), AIROHA_PINCTRL_CONFS_PCIE_RST_OD, \
- (pin), (val))
- #define airoha_pinctrl_set_pullup_conf(pinctrl, pin, val) \
-- airoha_pinctrl_set_conf((pinctrl), airoha_pinctrl_pullup_conf, \
-- ARRAY_SIZE(airoha_pinctrl_pullup_conf), \
-+ airoha_pinctrl_set_conf((pinctrl), AIROHA_PINCTRL_CONFS_PULLUP, \
- (pin), (val))
- #define airoha_pinctrl_set_pulldown_conf(pinctrl, pin, val) \
-- airoha_pinctrl_set_conf((pinctrl), airoha_pinctrl_pulldown_conf, \
-- ARRAY_SIZE(airoha_pinctrl_pulldown_conf), \
-+ airoha_pinctrl_set_conf((pinctrl), AIROHA_PINCTRL_CONFS_PULLDOWN, \
- (pin), (val))
- #define airoha_pinctrl_set_drive_e2_conf(pinctrl, pin, val) \
-- airoha_pinctrl_set_conf((pinctrl), airoha_pinctrl_drive_e2_conf, \
-- ARRAY_SIZE(airoha_pinctrl_drive_e2_conf), \
-+ airoha_pinctrl_set_conf((pinctrl), AIROHA_PINCTRL_CONFS_DRIVE_E2, \
- (pin), (val))
- #define airoha_pinctrl_set_drive_e4_conf(pinctrl, pin, val) \
-- airoha_pinctrl_set_conf((pinctrl), airoha_pinctrl_drive_e4_conf, \
-- ARRAY_SIZE(airoha_pinctrl_drive_e4_conf), \
-+ airoha_pinctrl_set_conf((pinctrl), AIROHA_PINCTRL_CONFS_DRIVE_E4, \
- (pin), (val))
- #define airoha_pinctrl_set_pcie_rst_od_conf(pinctrl, pin, val) \
-- airoha_pinctrl_set_conf((pinctrl), airoha_pinctrl_pcie_rst_od_conf, \
-- ARRAY_SIZE(airoha_pinctrl_pcie_rst_od_conf), \
-+ airoha_pinctrl_set_conf((pinctrl), AIROHA_PINCTRL_CONFS_PCIE_RST_OD, \
- (pin), (val))
-
- static int airoha_pinconf_get_direction(struct pinctrl_dev *pctrl_dev, u32 p)
-@@ -2796,12 +2826,13 @@ static int airoha_pinconf_set(struct pin
- static int airoha_pinconf_group_get(struct pinctrl_dev *pctrl_dev,
- unsigned int group, unsigned long *config)
- {
-+ struct airoha_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
- u32 cur_config = 0;
- int i;
-
-- for (i = 0; i < airoha_pinctrl_groups[group].npins; i++) {
-+ for (i = 0; i < pinctrl->grps[group].npins; i++) {
- if (airoha_pinconf_get(pctrl_dev,
-- airoha_pinctrl_groups[group].pins[i],
-+ pinctrl->grps[group].pins[i],
- config))
- return -ENOTSUPP;
-
-@@ -2818,13 +2849,14 @@ static int airoha_pinconf_group_set(stru
- unsigned int group, unsigned long *configs,
- unsigned int num_configs)
- {
-+ struct airoha_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
- int i;
-
-- for (i = 0; i < airoha_pinctrl_groups[group].npins; i++) {
-+ for (i = 0; i < pinctrl->grps[group].npins; i++) {
- int err;
-
- err = airoha_pinconf_set(pctrl_dev,
-- airoha_pinctrl_groups[group].pins[i],
-+ pinctrl->grps[group].pins[i],
- configs, num_configs);
- if (err)
- return err;
-@@ -2850,23 +2882,16 @@ static const struct pinctrl_ops airoha_p
- .dt_free_map = pinconf_generic_dt_free_map,
- };
-
--static const struct pinctrl_desc airoha_pinctrl_desc = {
-- .name = KBUILD_MODNAME,
-- .owner = THIS_MODULE,
-- .pctlops = &airoha_pctlops,
-- .pmxops = &airoha_pmxops,
-- .confops = &airoha_confops,
-- .pins = airoha_pinctrl_pins,
-- .npins = ARRAY_SIZE(airoha_pinctrl_pins),
--};
--
- static int airoha_pinctrl_probe(struct platform_device *pdev)
- {
-+ const struct airoha_pinctrl_match_data *data;
- struct device *dev = &pdev->dev;
- struct airoha_pinctrl *pinctrl;
- struct regmap *map;
- int err, i;
-
-+ data = device_get_match_data(dev);
-+
- pinctrl = devm_kzalloc(dev, sizeof(*pinctrl), GFP_KERNEL);
- if (!pinctrl)
- return -ENOMEM;
-@@ -2881,14 +2906,23 @@ static int airoha_pinctrl_probe(struct p
-
- pinctrl->chip_scu = map;
-
-- err = devm_pinctrl_register_and_init(dev, &airoha_pinctrl_desc,
-+ /* Init pinctrl desc struct */
-+ pinctrl->desc.name = KBUILD_MODNAME;
-+ pinctrl->desc.owner = THIS_MODULE,
-+ pinctrl->desc.pctlops = &airoha_pctlops,
-+ pinctrl->desc.pmxops = &airoha_pmxops,
-+ pinctrl->desc.confops = &airoha_confops,
-+ pinctrl->desc.pins = data->pins,
-+ pinctrl->desc.npins = data->num_pins,
-+
-+ err = devm_pinctrl_register_and_init(dev, &pinctrl->desc,
- pinctrl, &pinctrl->ctrl);
- if (err)
- return err;
-
- /* build pin groups */
-- for (i = 0; i < ARRAY_SIZE(airoha_pinctrl_groups); i++) {
-- const struct pingroup *grp = &airoha_pinctrl_groups[i];
-+ for (i = 0; i < data->num_grps; i++) {
-+ const struct pingroup *grp = &data->grps[i];
-
- err = pinctrl_generic_add_group(pinctrl->ctrl, grp->name,
- grp->pins, grp->npins,
-@@ -2901,10 +2935,10 @@ static int airoha_pinctrl_probe(struct p
- }
-
- /* build functions */
-- for (i = 0; i < ARRAY_SIZE(airoha_pinctrl_funcs); i++) {
-+ for (i = 0; i < data->num_funcs; i++) {
- const struct airoha_pinctrl_func *func;
-
-- func = &airoha_pinctrl_funcs[i];
-+ func = &data->funcs[i];
- err = pinmux_generic_add_pinfunction(pinctrl->ctrl,
- &func->desc,
- (void *)func);
-@@ -2915,6 +2949,10 @@ static int airoha_pinctrl_probe(struct p
- }
- }
-
-+ pinctrl->grps = data->grps;
-+ pinctrl->funcs = data->funcs;
-+ pinctrl->confs_info = data->confs_info;
-+
- err = pinctrl_enable(pinctrl->ctrl);
- if (err)
- return err;
-@@ -2923,8 +2961,39 @@ static int airoha_pinctrl_probe(struct p
- return airoha_pinctrl_add_gpiochip(pinctrl, pdev);
- }
-
-+static const struct airoha_pinctrl_match_data en7581_pinctrl_match_data = {
-+ .pins = en7581_pinctrl_pins,
-+ .num_pins = ARRAY_SIZE(en7581_pinctrl_pins),
-+ .grps = en7581_pinctrl_groups,
-+ .num_grps = ARRAY_SIZE(en7581_pinctrl_groups),
-+ .funcs = en7581_pinctrl_funcs,
-+ .num_funcs = ARRAY_SIZE(en7581_pinctrl_funcs),
-+ .confs_info = {
-+ [AIROHA_PINCTRL_CONFS_PULLUP] = {
-+ .confs = en7581_pinctrl_pullup_conf,
-+ .num_confs = ARRAY_SIZE(en7581_pinctrl_pullup_conf),
-+ },
-+ [AIROHA_PINCTRL_CONFS_PULLDOWN] = {
-+ .confs = en7581_pinctrl_pulldown_conf,
-+ .num_confs = ARRAY_SIZE(en7581_pinctrl_pulldown_conf),
-+ },
-+ [AIROHA_PINCTRL_CONFS_DRIVE_E2] = {
-+ .confs = en7581_pinctrl_drive_e2_conf,
-+ .num_confs = ARRAY_SIZE(en7581_pinctrl_drive_e2_conf),
-+ },
-+ [AIROHA_PINCTRL_CONFS_DRIVE_E4] = {
-+ .confs = en7581_pinctrl_drive_e4_conf,
-+ .num_confs = ARRAY_SIZE(en7581_pinctrl_drive_e4_conf),
-+ },
-+ [AIROHA_PINCTRL_CONFS_PCIE_RST_OD] = {
-+ .confs = en7581_pinctrl_pcie_rst_od_conf,
-+ .num_confs = ARRAY_SIZE(en7581_pinctrl_pcie_rst_od_conf),
-+ },
-+ },
-+};
-+
- static const struct of_device_id airoha_pinctrl_of_match[] = {
-- { .compatible = "airoha,en7581-pinctrl" },
-+ { .compatible = "airoha,en7581-pinctrl", .data = &en7581_pinctrl_match_data },
- { /* sentinel */ }
- };
- MODULE_DEVICE_TABLE(of, airoha_pinctrl_of_match);
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-@@ -1473,516 +1473,128 @@ static const struct airoha_pinctrl_func_
+@@ -1475,516 +1475,128 @@ static const struct airoha_pinctrl_func_
},
};
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-@@ -1073,404 +1073,75 @@ static const struct airoha_pinctrl_func_
+@@ -1075,404 +1075,75 @@ static const struct airoha_pinctrl_func_
};
/* PWM */
#define UART1_RXD_PD_MASK BIT(3)
#define UART1_TXD_PD_MASK BIT(2)
#define I2C_SCL_PD_MASK BIT(1)
-@@ -625,10 +642,223 @@ static const struct pingroup en7581_pinc
+@@ -627,10 +644,223 @@ static const struct pingroup en7581_pinc
PINCTRL_PIN_GROUP("pcie_reset2", en7581_pcie_reset2),
};
static const char *const uart_groups[] = { "uart2", "uart2_cts_rts", "hsuart",
"hsuart_cts_rts", "uart4",
"uart5" };
-@@ -641,11 +871,16 @@ static const char *const pcm_spi_groups[
+@@ -643,11 +873,16 @@ static const char *const pcm_spi_groups[
"pcm_spi_cs2_p156",
"pcm_spi_cs2_p128",
"pcm_spi_cs3", "pcm_spi_cs4" };
static const char *const pwm_groups[] = { "gpio0", "gpio1",
"gpio2", "gpio3",
"gpio4", "gpio5",
-@@ -684,6 +919,22 @@ static const char *const phy3_led1_group
+@@ -686,6 +921,22 @@ static const char *const phy3_led1_group
"gpio45", "gpio46" };
static const char *const phy4_led1_groups[] = { "gpio43", "gpio44",
"gpio45", "gpio46" };
static const struct airoha_pinctrl_func_group pon_func_group[] = {
{
-@@ -761,6 +1012,25 @@ static const struct airoha_pinctrl_func_
+@@ -763,6 +1014,25 @@ static const struct airoha_pinctrl_func_
},
};
static const struct airoha_pinctrl_func_group uart_func_group[] = {
{
.name = "uart2",
-@@ -1002,6 +1272,73 @@ static const struct airoha_pinctrl_func_
+@@ -1004,6 +1274,73 @@ static const struct airoha_pinctrl_func_
},
};
static const struct airoha_pinctrl_func_group i2s_func_group[] = {
{
.name = "i2s",
-@@ -1072,6 +1409,28 @@ static const struct airoha_pinctrl_func_
+@@ -1074,6 +1411,28 @@ static const struct airoha_pinctrl_func_
},
};
/* PWM */
#define AIROHA_PINCTRL_PWM(gpio, mux_val) \
{ \
-@@ -1268,6 +1627,94 @@ static const struct airoha_pinctrl_func_
+@@ -1270,6 +1629,94 @@ static const struct airoha_pinctrl_func_
LAN3_LED_MAPPING_MASK, LAN3_PHY_LED_MAP(2)),
};
static const struct airoha_pinctrl_func en7581_pinctrl_funcs[] = {
PINCTRL_FUNC_DESC("pon", pon),
PINCTRL_FUNC_DESC("tod_1pps", tod_1pps),
-@@ -1294,6 +1741,31 @@ static const struct airoha_pinctrl_func
+@@ -1296,6 +1743,31 @@ static const struct airoha_pinctrl_func
PINCTRL_FUNC_DESC("phy4_led1", phy4_led1),
};
static const struct airoha_pinctrl_conf en7581_pinctrl_pullup_conf[] = {
PINCTRL_CONF_DESC(0, REG_I2C_SDA_PU, UART1_TXD_PU_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_PU, UART1_RXD_PU_MASK),
-@@ -1355,6 +1827,62 @@ static const struct airoha_pinctrl_conf
+@@ -1357,6 +1829,62 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_PU, PCIE2_RESET_PU_MASK),
};
static const struct airoha_pinctrl_conf en7581_pinctrl_pulldown_conf[] = {
PINCTRL_CONF_DESC(0, REG_I2C_SDA_PD, UART1_TXD_PD_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_PD, UART1_RXD_PD_MASK),
-@@ -1416,6 +1944,62 @@ static const struct airoha_pinctrl_conf
+@@ -1418,6 +1946,62 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_PD, PCIE2_RESET_PD_MASK),
};
static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e2_conf[] = {
PINCTRL_CONF_DESC(0, REG_I2C_SDA_E2, UART1_TXD_E2_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_E2, UART1_RXD_E2_MASK),
-@@ -1477,6 +2061,62 @@ static const struct airoha_pinctrl_conf
+@@ -1479,6 +2063,62 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_E2, PCIE2_RESET_E2_MASK),
};
static const struct airoha_pinctrl_conf en7581_pinctrl_drive_e4_conf[] = {
PINCTRL_CONF_DESC(0, REG_I2C_SDA_E4, UART1_TXD_E4_MASK),
PINCTRL_CONF_DESC(1, REG_I2C_SDA_E4, UART1_RXD_E4_MASK),
-@@ -1538,12 +2178,73 @@ static const struct airoha_pinctrl_conf
+@@ -1540,12 +2180,73 @@ static const struct airoha_pinctrl_conf
PINCTRL_CONF_DESC(63, REG_I2C_SDA_E4, PCIE2_RESET_E4_MASK),
};
static int airoha_convert_pin_to_reg_offset(struct pinctrl_dev *pctrl_dev,
struct pinctrl_gpio_range *range,
int pin)
-@@ -1708,7 +2409,7 @@ static const struct irq_chip airoha_gpio
+@@ -1710,7 +2411,7 @@ static const struct irq_chip airoha_gpio
};
static int airoha_pinctrl_add_gpiochip(struct airoha_pinctrl *pinctrl,
{
struct airoha_pinctrl_gpiochip *chip = &pinctrl->gpiochip;
struct gpio_chip *gc = &chip->chip;
-@@ -1743,7 +2444,7 @@ static int airoha_pinctrl_add_gpiochip(s
+@@ -1745,7 +2446,7 @@ static int airoha_pinctrl_add_gpiochip(s
return irq;
err = devm_request_irq(dev, irq, airoha_irq_handler, IRQF_SHARED,
if (err) {
dev_err(dev, "error requesting irq %d: %d\n", irq, err);
return err;
-@@ -1807,8 +2508,8 @@ static int airoha_pinmux_set_mux(struct
+@@ -1809,8 +2510,8 @@ static int airoha_pinmux_set_mux(struct
}
static int airoha_pinmux_set_direction(struct pinctrl_dev *pctrl_dev,
{
struct airoha_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
u32 mask, index;
-@@ -1898,7 +2599,7 @@ static int airoha_pinctrl_set_conf(struc
+@@ -1900,7 +2601,7 @@ static int airoha_pinctrl_set_conf(struc
if (regmap_update_bits(pinctrl->chip_scu, reg->offset, reg->mask,
return -EINVAL;
return 0;
-@@ -2115,8 +2816,8 @@ static int airoha_pinconf_group_get(stru
+@@ -2117,8 +2818,8 @@ static int airoha_pinconf_group_get(stru
for (i = 0; i < pinctrl->grps[group].npins; i++) {
if (airoha_pinconf_get(pctrl_dev,
return -ENOTSUPP;
if (i && cur_config != *config)
-@@ -2275,8 +2976,40 @@ static const struct airoha_pinctrl_match
+@@ -2277,8 +2978,40 @@ static const struct airoha_pinctrl_match
},
};
+++ /dev/null
-From f2bd5a0f59d052d16749bccf637690e51947a5d6 Mon Sep 17 00:00:00 2001
-From: Chukun Pan <amadeus@jmu.edu.cn>
-Date: Sat, 15 Nov 2025 18:00:00 +0800
-Subject: [PATCH] pinctrl: airoha: fix pinctrl function mismatch issue
-
-The blamed commit made the following changes:
-
--#define PINCTRL_FUNC_DESC(id)...
-- .desc = PINCTRL_PINFUNCTION(#id, ...
-+#define PINCTRL_FUNC_DESC(id, table)...
-+ .desc = PINCTRL_PINFUNCTION(#id, ...
-
-- PINCTRL_FUNC_DESC(pon)...
-+ PINCTRL_FUNC_DESC("pon", pon)...
-
-It's clear that the id of funcs doesn't match the definition.
-Remove redundant #string from the definition to fix this issue:
-pinctrl-airoha ...: invalid function mdio in map table
-
-Fixes: 4043b0c45f85 ("pinctrl: airoha: generalize pins/group/function/confs handling")
-Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
-Acked-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- drivers/pinctrl/mediatek/pinctrl-airoha.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
-+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-@@ -35,7 +35,7 @@
-
- #define PINCTRL_FUNC_DESC(id, table) \
- { \
-- .desc = PINCTRL_PINFUNCTION(#id, table##_groups, \
-+ .desc = PINCTRL_PINFUNCTION(id, table##_groups, \
- ARRAY_SIZE(table##_groups)),\
- .groups = table##_func_group, \
- .group_size = ARRAY_SIZE(table##_func_group), \
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-@@ -2993,7 +2993,7 @@ static const struct airoha_pinctrl_match
+@@ -2995,7 +2995,7 @@ static const struct airoha_pinctrl_match
.num_confs = ARRAY_SIZE(an7583_pinctrl_pulldown_conf),
},
[AIROHA_PINCTRL_CONFS_DRIVE_E2] = {
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-@@ -2892,12 +2892,12 @@ static int airoha_pinctrl_probe(struct p
+@@ -2894,12 +2894,12 @@ static int airoha_pinctrl_probe(struct p
/* Init pinctrl desc struct */
pinctrl->desc.name = KBUILD_MODNAME;
- channel = netdev_uses_dsa(dev) ? skb_get_queue_mapping(skb) : port->id;
+ channel = netdev_uses_dsa(netdev) ? skb_get_queue_mapping(skb) : port->id;
channel = channel % AIROHA_NUM_QOS_CHANNELS;
- queue = (skb->priority - 1) % AIROHA_NUM_QOS_QUEUES; /* QoS queue */
+ queue = skb->priority % AIROHA_NUM_QOS_QUEUES;
queue = channel * AIROHA_NUM_QOS_QUEUES + queue;
- return queue < dev->num_tx_queues ? queue : 0;
+++ /dev/null
-From 1402ecccf5630a0b7fa4749d7d2e72abc3f3d73d Mon Sep 17 00:00:00 2001
-Message-ID: <1402ecccf5630a0b7fa4749d7d2e72abc3f3d73d.1782312403.git.lorenzo@kernel.org>
-From: "Wayen.Yan" <win847@gmail.com>
-Date: Fri, 12 Jun 2026 07:09:13 +0800
-Subject: [PATCH 1/2] net: airoha: Fix register index for Tx-fwd counter
- configuration
-
-In airoha_qdma_init_qos_stats(), the Tx-fwd counter configuration
-register uses the same index (i << 1) as the Tx-cpu counter, which
-overwrites the Tx-cpu configuration. The Tx-fwd counter value register
-correctly uses (i << 1) + 1, so the configuration register should use
-the same index.
-
-Fix the REG_CNTR_CFG index from (i << 1) to ((i << 1) + 1) so that
-the Tx-fwd counter is properly configured instead of clobbering the
-Tx-cpu counter config.
-
-Fixes: 20bf7d07c956 ("net: airoha: Add sched ETS offload support")
-Signed-off-by: Wayen.Yan <win847@gmail.com>
-Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
-Link: https://patch.msgid.link/6a2b40e7.4dd82583.3a5c46.e566@mx.google.com
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
----
- drivers/net/ethernet/airoha/airoha_eth.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/airoha/airoha_eth.c
-+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -1331,7 +1331,7 @@ static void airoha_qdma_init_qos_stats(s
- FIELD_PREP(CNTR_CHAN_MASK, i));
- /* Tx-fwd transferred count */
- airoha_qdma_wr(qdma, REG_CNTR_VAL((i << 1) + 1), 0);
-- airoha_qdma_wr(qdma, REG_CNTR_CFG(i << 1),
-+ airoha_qdma_wr(qdma, REG_CNTR_CFG((i << 1) + 1),
- CNTR_EN_MASK | CNTR_ALL_QUEUE_EN_MASK |
- CNTR_ALL_DSCP_RING_EN_MASK |
- FIELD_PREP(CNTR_SRC_MASK, 1) |
+++ /dev/null
-From 1c3a77471afbb3981af28f7f7c8b2487558e4b00 Mon Sep 17 00:00:00 2001
-Message-ID: <1c3a77471afbb3981af28f7f7c8b2487558e4b00.1782312403.git.lorenzo@kernel.org>
-In-Reply-To: <1402ecccf5630a0b7fa4749d7d2e72abc3f3d73d.1782312403.git.lorenzo@kernel.org>
-References: <1402ecccf5630a0b7fa4749d7d2e72abc3f3d73d.1782312403.git.lorenzo@kernel.org>
-From: "Wayen.Yan" <win847@gmail.com>
-Date: Fri, 12 Jun 2026 07:09:56 +0800
-Subject: [PATCH 2/2] net: airoha: Fix debugfs new-tuple display for IPv4 ROUTE
- entries
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-In airoha_ppe_debugfs_foe_show(), the second switch statement falls
-through from PPE_PKT_TYPE_IPV4_HNAPT/DSLITE to PPE_PKT_TYPE_IPV4_ROUTE,
-accessing hwe->ipv4.new_tuple for all three types. However, IPv4 ROUTE
-(3-tuple) entries do not contain a valid new_tuple — this field is only
-meaningful for NATted flows (HNAPT/DSLITE). For ROUTE entries, the
-memory at the new_tuple offset holds routing information, not NAT data,
-so displaying "new=" produces garbage output.
-
-Display new_tuple only for HNAPT and DSLITE, and let IPV4_ROUTE fall
-through to the default case.
-
-Fixes: 3fe15c640f38 ("net: airoha: Introduce PPE debugfs support")
-Link: https://lore.kernel.org/6a2b40ea.4dd82583.3a5c46.e5a2@mx.google.com
-Signed-off-by: Wayen.Yan <win847@gmail.com>
-Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
-Link: https://patch.msgid.link/6a2be54b.ef98c1b2.3c3224.2ed8@mx.google.com
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
----
- drivers/net/ethernet/airoha/airoha_ppe_debugfs.c | 2 --
- 1 file changed, 2 deletions(-)
-
---- a/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c
-+++ b/drivers/net/ethernet/airoha/airoha_ppe_debugfs.c
-@@ -121,8 +121,6 @@ static int airoha_ppe_debugfs_foe_show(s
- case PPE_PKT_TYPE_IPV4_DSLITE:
- src_port = &hwe->ipv4.new_tuple.src_port;
- dest_port = &hwe->ipv4.new_tuple.dest_port;
-- fallthrough;
-- case PPE_PKT_TYPE_IPV4_ROUTE:
- src_addr = &hwe->ipv4.new_tuple.src_ip;
- dest_addr = &hwe->ipv4.new_tuple.dest_ip;
- seq_puts(m, " new=");
+++ /dev/null
-From 5c121ee635680c93d7074becf14cfbaac140f80d Mon Sep 17 00:00:00 2001
-Message-ID: <5c121ee635680c93d7074becf14cfbaac140f80d.1782312136.git.lorenzo@kernel.org>
-From: Wayen Yan <win847@gmail.com>
-Date: Tue, 16 Jun 2026 19:52:36 +0800
-Subject: [PATCH] net: airoha: fix foe_check_time allocation size
-
-foe_check_time is declared as u16 pointer but was allocated with
-only ppe_num_entries bytes instead of ppe_num_entries * sizeof(u16).
-
-When airoha_ppe_foe_verify_entry() is called with hash >= ppe_num_entries/2,
-it writes beyond the allocated buffer, causing heap buffer overflow and
-potential kernel crash.
-
-Fixes: 6d5b601d52a2 ("net: airoha: ppe: Dynamically allocate foe_check_time array in airoha_ppe struct")
-Signed-off-by: Wayen Yan <win847@gmail.com>
-Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
-Link: https://patch.msgid.link/178161119471.2163752.14373384830691569758@gmail.com
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
----
- drivers/net/ethernet/airoha/airoha_ppe.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/airoha/airoha_ppe.c
-+++ b/drivers/net/ethernet/airoha/airoha_ppe.c
-@@ -1601,7 +1601,8 @@ int airoha_ppe_init(struct airoha_eth *e
- return -ENOMEM;
- }
-
-- ppe->foe_check_time = devm_kzalloc(eth->dev, ppe_num_entries,
-+ ppe->foe_check_time = devm_kzalloc(eth->dev,
-+ ppe_num_entries * sizeof(*ppe->foe_check_time),
- GFP_KERNEL);
- if (!ppe->foe_check_time)
- return -ENOMEM;
+++ /dev/null
-From 86e51aa24686cc95bb35613059e8b94b9b81e3f0 Mon Sep 17 00:00:00 2001
-Message-ID: <86e51aa24686cc95bb35613059e8b94b9b81e3f0.1782312099.git.lorenzo@kernel.org>
-From: Wayen Yan <win847@gmail.com>
-Date: Sat, 20 Jun 2026 16:17:44 +0800
-Subject: [PATCH] net: airoha: Fix skb->priority underflow in
- airoha_dev_select_queue()
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-In airoha_dev_select_queue(), the expression:
-
- queue = (skb->priority - 1) % AIROHA_NUM_QOS_QUEUES;
-
-implicitly converts to unsigned arithmetic: when skb->priority is 0
-(the default for unclassified traffic), (0u - 1u) wraps to UINT_MAX,
-and UINT_MAX % 8 = 7, routing default best-effort packets to the
-highest-priority QoS queue. This causes QoS inversion where the
-majority of traffic on a PON gateway starves actual high-priority
-flows (VoIP, gaming, etc.).
-
-The "- 1" offset was a leftover from the ETS offload implementation
-that has since been removed. The correct mapping is a direct modulo:
-
- queue = skb->priority % AIROHA_NUM_QOS_QUEUES;
-
-This maps priority 0 → queue 0 (lowest), priority 7 → queue 7
-(highest), with higher priorities wrapping around. This is the
-standard Linux sk_prio → HW queue mapping used by other drivers.
-
-Fixes: 2b288b81560b ("net: airoha: Introduce ndo_select_queue callback")
-Link: https://lore.kernel.org/netdev/178185573207.2378135.3729126358670287878@gmail.com/
-Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
-Reviewed-by: Joe Damato <joe@dama.to>
-Signed-off-by: Wayen Yan <win847@gmail.com>
-Link: https://patch.msgid.link/178194366700.2485734.5368768965976693502@gmail.com
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
----
- drivers/net/ethernet/airoha/airoha_eth.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/airoha/airoha_eth.c
-+++ b/drivers/net/ethernet/airoha/airoha_eth.c
-@@ -2110,7 +2110,7 @@ static u16 airoha_dev_select_queue(struc
- */
- channel = netdev_uses_dsa(netdev) ? skb_get_queue_mapping(skb) : port->id;
- channel = channel % AIROHA_NUM_QOS_CHANNELS;
-- queue = (skb->priority - 1) % AIROHA_NUM_QOS_QUEUES; /* QoS queue */
-+ queue = skb->priority % AIROHA_NUM_QOS_QUEUES;
- queue = channel * AIROHA_NUM_QOS_QUEUES + queue;
-
- return queue < netdev->num_tx_queues ? queue : 0;
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ b/drivers/pinctrl/mediatek/pinctrl-airoha.c
-@@ -2811,7 +2811,7 @@ static int airoha_pinconf_group_get(stru
+@@ -2813,7 +2813,7 @@ static int airoha_pinconf_group_get(stru
unsigned int group, unsigned long *config)
{
struct airoha_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
obj-$(CONFIG_PINCTRL_MT76X8) += pinctrl-mt76x8.o
--- /dev/null
+++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
-@@ -0,0 +1,3030 @@
+@@ -0,0 +1,3032 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Author: Lorenzo Bianconi <lorenzo@kernel.org>
+static const int en7581_gpio29_pins[] = { 42 };
+static const int en7581_gpio30_pins[] = { 43 };
+static const int en7581_gpio31_pins[] = { 44 };
++static const int en7581_gpio32_pins[] = { 45 };
+static const int en7581_gpio33_pins[] = { 46 };
+static const int en7581_gpio34_pins[] = { 47 };
+static const int en7581_gpio35_pins[] = { 48 };
+ PINCTRL_PIN_GROUP("gpio29", en7581_gpio29),
+ PINCTRL_PIN_GROUP("gpio30", en7581_gpio30),
+ PINCTRL_PIN_GROUP("gpio31", en7581_gpio31),
++ PINCTRL_PIN_GROUP("gpio32", en7581_gpio32),
+ PINCTRL_PIN_GROUP("gpio33", en7581_gpio33),
+ PINCTRL_PIN_GROUP("gpio34", en7581_gpio34),
+ PINCTRL_PIN_GROUP("gpio35", en7581_gpio35),
+ PINCTRL_CONF_DESC(29, REG_GPIO_L_PU, BIT(16)),
+ PINCTRL_CONF_DESC(30, REG_GPIO_L_PU, BIT(17)),
+ PINCTRL_CONF_DESC(31, REG_GPIO_L_PU, BIT(18)),
-+ PINCTRL_CONF_DESC(32, REG_GPIO_L_PU, BIT(18)),
++ PINCTRL_CONF_DESC(32, REG_GPIO_L_PU, BIT(19)),
+ PINCTRL_CONF_DESC(33, REG_GPIO_L_PU, BIT(20)),
+ PINCTRL_CONF_DESC(34, REG_GPIO_L_PU, BIT(21)),
+ PINCTRL_CONF_DESC(35, REG_GPIO_L_PU, BIT(22)),
+ PINCTRL_CONF_DESC(29, REG_GPIO_L_PD, BIT(16)),
+ PINCTRL_CONF_DESC(30, REG_GPIO_L_PD, BIT(17)),
+ PINCTRL_CONF_DESC(31, REG_GPIO_L_PD, BIT(18)),
-+ PINCTRL_CONF_DESC(32, REG_GPIO_L_PD, BIT(18)),
++ PINCTRL_CONF_DESC(32, REG_GPIO_L_PD, BIT(19)),
+ PINCTRL_CONF_DESC(33, REG_GPIO_L_PD, BIT(20)),
+ PINCTRL_CONF_DESC(34, REG_GPIO_L_PD, BIT(21)),
+ PINCTRL_CONF_DESC(35, REG_GPIO_L_PD, BIT(22)),
+ PINCTRL_CONF_DESC(29, REG_GPIO_L_E2, BIT(16)),
+ PINCTRL_CONF_DESC(30, REG_GPIO_L_E2, BIT(17)),
+ PINCTRL_CONF_DESC(31, REG_GPIO_L_E2, BIT(18)),
-+ PINCTRL_CONF_DESC(32, REG_GPIO_L_E2, BIT(18)),
++ PINCTRL_CONF_DESC(32, REG_GPIO_L_E2, BIT(19)),
+ PINCTRL_CONF_DESC(33, REG_GPIO_L_E2, BIT(20)),
+ PINCTRL_CONF_DESC(34, REG_GPIO_L_E2, BIT(21)),
+ PINCTRL_CONF_DESC(35, REG_GPIO_L_E2, BIT(22)),
+ PINCTRL_CONF_DESC(29, REG_GPIO_L_E4, BIT(16)),
+ PINCTRL_CONF_DESC(30, REG_GPIO_L_E4, BIT(17)),
+ PINCTRL_CONF_DESC(31, REG_GPIO_L_E4, BIT(18)),
-+ PINCTRL_CONF_DESC(32, REG_GPIO_L_E4, BIT(18)),
++ PINCTRL_CONF_DESC(32, REG_GPIO_L_E4, BIT(19)),
+ PINCTRL_CONF_DESC(33, REG_GPIO_L_E4, BIT(20)),
+ PINCTRL_CONF_DESC(34, REG_GPIO_L_E4, BIT(21)),
+ PINCTRL_CONF_DESC(35, REG_GPIO_L_E4, BIT(22)),
+MODULE_DESCRIPTION("Pinctrl driver for Airoha SoC");
--- a/drivers/pinctrl/mediatek/pinctrl-airoha.c
+++ /dev/null
-@@ -1,3030 +0,0 @@
+@@ -1,3032 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Author: Lorenzo Bianconi <lorenzo@kernel.org>
-static const int en7581_gpio29_pins[] = { 42 };
-static const int en7581_gpio30_pins[] = { 43 };
-static const int en7581_gpio31_pins[] = { 44 };
+-static const int en7581_gpio32_pins[] = { 45 };
-static const int en7581_gpio33_pins[] = { 46 };
-static const int en7581_gpio34_pins[] = { 47 };
-static const int en7581_gpio35_pins[] = { 48 };
- PINCTRL_PIN_GROUP("gpio29", en7581_gpio29),
- PINCTRL_PIN_GROUP("gpio30", en7581_gpio30),
- PINCTRL_PIN_GROUP("gpio31", en7581_gpio31),
+- PINCTRL_PIN_GROUP("gpio32", en7581_gpio32),
- PINCTRL_PIN_GROUP("gpio33", en7581_gpio33),
- PINCTRL_PIN_GROUP("gpio34", en7581_gpio34),
- PINCTRL_PIN_GROUP("gpio35", en7581_gpio35),
- PINCTRL_CONF_DESC(29, REG_GPIO_L_PU, BIT(16)),
- PINCTRL_CONF_DESC(30, REG_GPIO_L_PU, BIT(17)),
- PINCTRL_CONF_DESC(31, REG_GPIO_L_PU, BIT(18)),
-- PINCTRL_CONF_DESC(32, REG_GPIO_L_PU, BIT(18)),
+- PINCTRL_CONF_DESC(32, REG_GPIO_L_PU, BIT(19)),
- PINCTRL_CONF_DESC(33, REG_GPIO_L_PU, BIT(20)),
- PINCTRL_CONF_DESC(34, REG_GPIO_L_PU, BIT(21)),
- PINCTRL_CONF_DESC(35, REG_GPIO_L_PU, BIT(22)),
- PINCTRL_CONF_DESC(29, REG_GPIO_L_PD, BIT(16)),
- PINCTRL_CONF_DESC(30, REG_GPIO_L_PD, BIT(17)),
- PINCTRL_CONF_DESC(31, REG_GPIO_L_PD, BIT(18)),
-- PINCTRL_CONF_DESC(32, REG_GPIO_L_PD, BIT(18)),
+- PINCTRL_CONF_DESC(32, REG_GPIO_L_PD, BIT(19)),
- PINCTRL_CONF_DESC(33, REG_GPIO_L_PD, BIT(20)),
- PINCTRL_CONF_DESC(34, REG_GPIO_L_PD, BIT(21)),
- PINCTRL_CONF_DESC(35, REG_GPIO_L_PD, BIT(22)),
- PINCTRL_CONF_DESC(29, REG_GPIO_L_E2, BIT(16)),
- PINCTRL_CONF_DESC(30, REG_GPIO_L_E2, BIT(17)),
- PINCTRL_CONF_DESC(31, REG_GPIO_L_E2, BIT(18)),
-- PINCTRL_CONF_DESC(32, REG_GPIO_L_E2, BIT(18)),
+- PINCTRL_CONF_DESC(32, REG_GPIO_L_E2, BIT(19)),
- PINCTRL_CONF_DESC(33, REG_GPIO_L_E2, BIT(20)),
- PINCTRL_CONF_DESC(34, REG_GPIO_L_E2, BIT(21)),
- PINCTRL_CONF_DESC(35, REG_GPIO_L_E2, BIT(22)),
- PINCTRL_CONF_DESC(29, REG_GPIO_L_E4, BIT(16)),
- PINCTRL_CONF_DESC(30, REG_GPIO_L_E4, BIT(17)),
- PINCTRL_CONF_DESC(31, REG_GPIO_L_E4, BIT(18)),
-- PINCTRL_CONF_DESC(32, REG_GPIO_L_E4, BIT(18)),
+- PINCTRL_CONF_DESC(32, REG_GPIO_L_E4, BIT(19)),
- PINCTRL_CONF_DESC(33, REG_GPIO_L_E4, BIT(20)),
- PINCTRL_CONF_DESC(34, REG_GPIO_L_E4, BIT(21)),
- PINCTRL_CONF_DESC(35, REG_GPIO_L_E4, BIT(22)),
+++ /dev/null
-From a404c3800118863a2a53b42232aff5f6defde7dd Mon Sep 17 00:00:00 2001
-From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
-Date: Sat, 6 Jun 2026 05:03:32 +0300
-Subject: [PATCH] pinctrl: airoha: an7581: add missed gpio32 pin group
-
-gpio32 pin group is missed for an7581 SoC. This patch add it.
-
-Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
-Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
-Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
-Signed-off-by: Linus Walleij <linusw@kernel.org>
----
- drivers/pinctrl/airoha/pinctrl-airoha.c | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/drivers/pinctrl/airoha/pinctrl-airoha.c
-+++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
-@@ -539,6 +539,7 @@ static const int en7581_gpio28_pins[] =
- static const int en7581_gpio29_pins[] = { 42 };
- static const int en7581_gpio30_pins[] = { 43 };
- static const int en7581_gpio31_pins[] = { 44 };
-+static const int en7581_gpio32_pins[] = { 45 };
- static const int en7581_gpio33_pins[] = { 46 };
- static const int en7581_gpio34_pins[] = { 47 };
- static const int en7581_gpio35_pins[] = { 48 };
-@@ -623,6 +624,7 @@ static const struct pingroup en7581_pinc
- PINCTRL_PIN_GROUP("gpio29", en7581_gpio29),
- PINCTRL_PIN_GROUP("gpio30", en7581_gpio30),
- PINCTRL_PIN_GROUP("gpio31", en7581_gpio31),
-+ PINCTRL_PIN_GROUP("gpio32", en7581_gpio32),
- PINCTRL_PIN_GROUP("gpio33", en7581_gpio33),
- PINCTRL_PIN_GROUP("gpio34", en7581_gpio34),
- PINCTRL_PIN_GROUP("gpio35", en7581_gpio35),
+++ /dev/null
-From 756239ca5a5f55d7c6f6ed63b35b38cb3a39f118 Mon Sep 17 00:00:00 2001
-From: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
-Date: Sat, 6 Jun 2026 05:03:34 +0300
-Subject: [PATCH] pinctrl: airoha: an7581: fix misprint in gpio19 pinconf
-
-Pin 32 (gpio19) duplicate pinconf settings of pin 31. Fix it using
-a proper bit number in the configuration register.
-
-Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC")
-Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
-Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
-Signed-off-by: Linus Walleij <linusw@kernel.org>
----
- drivers/pinctrl/airoha/pinctrl-airoha.c | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
---- a/drivers/pinctrl/airoha/pinctrl-airoha.c
-+++ b/drivers/pinctrl/airoha/pinctrl-airoha.c
-@@ -1798,7 +1798,7 @@ static const struct airoha_pinctrl_conf
- PINCTRL_CONF_DESC(29, REG_GPIO_L_PU, BIT(16)),
- PINCTRL_CONF_DESC(30, REG_GPIO_L_PU, BIT(17)),
- PINCTRL_CONF_DESC(31, REG_GPIO_L_PU, BIT(18)),
-- PINCTRL_CONF_DESC(32, REG_GPIO_L_PU, BIT(18)),
-+ PINCTRL_CONF_DESC(32, REG_GPIO_L_PU, BIT(19)),
- PINCTRL_CONF_DESC(33, REG_GPIO_L_PU, BIT(20)),
- PINCTRL_CONF_DESC(34, REG_GPIO_L_PU, BIT(21)),
- PINCTRL_CONF_DESC(35, REG_GPIO_L_PU, BIT(22)),
-@@ -1915,7 +1915,7 @@ static const struct airoha_pinctrl_conf
- PINCTRL_CONF_DESC(29, REG_GPIO_L_PD, BIT(16)),
- PINCTRL_CONF_DESC(30, REG_GPIO_L_PD, BIT(17)),
- PINCTRL_CONF_DESC(31, REG_GPIO_L_PD, BIT(18)),
-- PINCTRL_CONF_DESC(32, REG_GPIO_L_PD, BIT(18)),
-+ PINCTRL_CONF_DESC(32, REG_GPIO_L_PD, BIT(19)),
- PINCTRL_CONF_DESC(33, REG_GPIO_L_PD, BIT(20)),
- PINCTRL_CONF_DESC(34, REG_GPIO_L_PD, BIT(21)),
- PINCTRL_CONF_DESC(35, REG_GPIO_L_PD, BIT(22)),
-@@ -2032,7 +2032,7 @@ static const struct airoha_pinctrl_conf
- PINCTRL_CONF_DESC(29, REG_GPIO_L_E2, BIT(16)),
- PINCTRL_CONF_DESC(30, REG_GPIO_L_E2, BIT(17)),
- PINCTRL_CONF_DESC(31, REG_GPIO_L_E2, BIT(18)),
-- PINCTRL_CONF_DESC(32, REG_GPIO_L_E2, BIT(18)),
-+ PINCTRL_CONF_DESC(32, REG_GPIO_L_E2, BIT(19)),
- PINCTRL_CONF_DESC(33, REG_GPIO_L_E2, BIT(20)),
- PINCTRL_CONF_DESC(34, REG_GPIO_L_E2, BIT(21)),
- PINCTRL_CONF_DESC(35, REG_GPIO_L_E2, BIT(22)),
-@@ -2149,7 +2149,7 @@ static const struct airoha_pinctrl_conf
- PINCTRL_CONF_DESC(29, REG_GPIO_L_E4, BIT(16)),
- PINCTRL_CONF_DESC(30, REG_GPIO_L_E4, BIT(17)),
- PINCTRL_CONF_DESC(31, REG_GPIO_L_E4, BIT(18)),
-- PINCTRL_CONF_DESC(32, REG_GPIO_L_E4, BIT(18)),
-+ PINCTRL_CONF_DESC(32, REG_GPIO_L_E4, BIT(19)),
- PINCTRL_CONF_DESC(33, REG_GPIO_L_E4, BIT(20)),
- PINCTRL_CONF_DESC(34, REG_GPIO_L_E4, BIT(21)),
- PINCTRL_CONF_DESC(35, REG_GPIO_L_E4, BIT(22)),
#include <net/ip.h>
#include <net/flow.h>
#include <net/netfilter/nf_tables.h>
-@@ -279,6 +280,27 @@ static int nft_flow_route(const struct n
- return 0;
- }
+@@ -20,6 +21,27 @@ struct nft_flow_offload {
+ struct nft_flowtable *flowtable;
+ };
+static void nft_flow_set_dscp(const struct nft_pktinfo *pkt,
+ struct flow_offload *flow,
static bool nft_flow_offload_skip(struct sk_buff *skb, int family)
{
if (skb_sec_path(skb))
-@@ -371,6 +393,9 @@ static void nft_flow_offload_eval(const
+@@ -112,6 +134,9 @@ static void nft_flow_offload_eval(const
if (!flow)
goto err_flow_alloc;
static int
__emac_prepare_rx_skb(struct sk_buff *skb, struct emac_instance *dev, int slot)
{
-@@ -3086,8 +3097,8 @@ static int emac_probe(struct platform_de
+@@ -3085,8 +3096,8 @@ static int emac_probe(struct platform_de
DBG(dev, "rx_desc %p" NL, dev->rx_desc);
/* Clean rings */
&sin->sin6_addr);
sin->sin6_scope_id = 0;
}
-@@ -891,12 +891,12 @@ int ip6_datagram_send_ctl(struct net *ne
+@@ -890,12 +890,12 @@ int ip6_datagram_send_ctl(struct net *ne
}
if (fl6->flowlabel&IPV6_FLOWINFO_MASK) {
#endif /* _LINUX_TYPES_H */
--- a/net/ipv4/af_inet.c
+++ b/net/ipv4/af_inet.c
-@@ -1492,7 +1492,7 @@ struct sk_buff *inet_gro_receive(struct
+@@ -1487,7 +1487,7 @@ struct sk_buff *inet_gro_receive(struct
goto out;
NAPI_GRO_CB(skb)->proto = proto;
--- a/drivers/of/overlay.c
+++ b/drivers/of/overlay.c
-@@ -247,6 +247,8 @@ static struct property *dup_and_fixup_sy
+@@ -256,6 +256,8 @@ static struct property *dup_and_fixup_sy
if (!target_path)
return NULL;
target_path_len = strlen(target_path);
static inline int mmc_blk_part_switch(struct mmc_card *card,
unsigned int part_type);
static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq,
-@@ -3278,6 +3285,8 @@ static int mmc_blk_probe(struct mmc_card
+@@ -3277,6 +3284,8 @@ static int mmc_blk_probe(struct mmc_card
{
struct mmc_blk_data *md;
int ret = 0;
/*
* Check that the card supports the command class(es) we need.
-@@ -3285,7 +3294,16 @@ static int mmc_blk_probe(struct mmc_card
+@@ -3284,7 +3293,16 @@ static int mmc_blk_probe(struct mmc_card
if (!(card->csd.cmdclass & CCC_BLOCK_READ))
return -ENODEV;
card->complete_wq = alloc_workqueue("mmc_complete",
WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
-@@ -3300,6 +3318,17 @@ static int mmc_blk_probe(struct mmc_card
+@@ -3299,6 +3317,17 @@ static int mmc_blk_probe(struct mmc_card
goto out_free;
}
static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
{
u32 *buf;
-@@ -3758,8 +3767,14 @@ static int lan78xx_bind(struct lan78xx_n
+@@ -3793,8 +3802,14 @@ static int lan78xx_bind(struct lan78xx_n
if (DEFAULT_RX_CSUM_ENABLE)
dev->net->features |= NETIF_F_RXCSUM;
static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data)
{
u32 *buf;
-@@ -4737,7 +4742,13 @@ static int lan78xx_probe(struct usb_inte
+@@ -4772,7 +4777,13 @@ static int lan78xx_probe(struct usb_inte
if (ret < 0)
goto out4;
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -1932,6 +1932,7 @@ static const struct ethtool_ops lan78xx_
+@@ -1953,6 +1953,7 @@ static const struct ethtool_ops lan78xx_
.set_link_ksettings = lan78xx_set_link_ksettings,
.get_regs_len = lan78xx_get_regs_len,
.get_regs = lan78xx_get_regs,
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
-@@ -2722,7 +2722,7 @@ static void bcmgenet_init_tx_ring(struct
+@@ -2714,7 +2714,7 @@ static void bcmgenet_init_tx_ring(struct
bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_PROD_INDEX);
bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_CONS_INDEX);
/* Disable rate control for now */
bcmgenet_tdma_ring_writel(priv, index, flow_period_val,
TDMA_FLOW_PERIOD);
-@@ -4079,8 +4079,10 @@ static int bcmgenet_probe(struct platfor
+@@ -4072,8 +4072,10 @@ static int bcmgenet_probe(struct platfor
netif_set_real_num_rx_queues(priv->dev, priv->hw_params->rx_queues + 1);
/* Set default coalescing parameters */
kref_init(&job->refcount);
-@@ -1425,3 +1488,14 @@ fail:
+@@ -1427,3 +1490,14 @@ fail:
return ret;
}
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
-@@ -65,6 +65,9 @@
+@@ -64,6 +64,9 @@
/* Forward declarations */
static void bcmgenet_set_rx_mode(struct net_device *dev);
static inline void bcmgenet_writel(u32 value, void __iomem *offset)
{
-@@ -2560,6 +2563,11 @@ static void reset_umac(struct bcmgenet_p
+@@ -2552,6 +2555,11 @@ static void reset_umac(struct bcmgenet_p
bcmgenet_rbuf_ctrl_set(priv, 0);
udelay(10);
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
-@@ -65,7 +65,7 @@
+@@ -64,7 +64,7 @@
/* Forward declarations */
static void bcmgenet_set_rx_mode(struct net_device *dev);
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
-@@ -1056,6 +1056,17 @@ config DRM_PANEL_TDO_TL070WSH30
+@@ -1063,6 +1063,17 @@ config DRM_PANEL_TDO_TL070WSH30
24 bit RGB per pixel. It provides a MIPI DSI interface to
the host, a built-in LED backlight and touch controller.
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
-@@ -1148,6 +1148,26 @@ config DRM_PANEL_VISIONOX_VTDR6130
+@@ -1155,6 +1155,26 @@ config DRM_PANEL_VISIONOX_VTDR6130
Say Y here if you want to enable support for Visionox
VTDR6130 1080x2400 AMOLED DSI panel.
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
-@@ -612,6 +612,8 @@ patternProperties:
+@@ -614,6 +614,8 @@ patternProperties:
description: General Electric Company
"^geekbuying,.*":
description: GeekBuying
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
-@@ -68,6 +68,9 @@ static void bcmgenet_set_rx_mode(struct
+@@ -67,6 +67,9 @@ static void bcmgenet_set_rx_mode(struct
static bool skip_umac_reset = false;
module_param(skip_umac_reset, bool, 0444);
MODULE_PARM_DESC(skip_umac_reset, "Skip UMAC reset step");
static inline void bcmgenet_writel(u32 value, void __iomem *offset)
{
-@@ -3365,6 +3368,17 @@ static int bcmgenet_open(struct net_devi
+@@ -3358,6 +3361,17 @@ static int bcmgenet_open(struct net_devi
bcmgenet_phy_pause_set(dev, priv->rx_pause, priv->tx_pause);
macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
spin_unlock(&bp->lock);
-@@ -2908,6 +2937,37 @@ static void macb_configure_dma(struct ma
+@@ -2925,6 +2954,37 @@ static void macb_configure_dma(struct ma
}
}
static void macb_init_hw(struct macb *bp)
{
u32 config;
-@@ -2936,6 +2996,11 @@ static void macb_init_hw(struct macb *bp
+@@ -2953,6 +3013,11 @@ static void macb_init_hw(struct macb *bp
if (bp->caps & MACB_CAPS_JUMBO)
bp->rx_frm_len_mask = MACB_RX_JFRMLEN_MASK;
macb_configure_dma(bp);
/* Enable RX partial store and forward and set watermark */
-@@ -3299,6 +3364,52 @@ static void gem_get_ethtool_strings(stru
+@@ -3316,6 +3381,52 @@ static void gem_get_ethtool_strings(stru
}
}
static void macb_get_stats(struct net_device *dev,
struct rtnl_link_stats64 *nstat)
{
-@@ -4055,6 +4166,8 @@ static const struct ethtool_ops macb_eth
+@@ -4072,6 +4183,8 @@ static const struct ethtool_ops macb_eth
};
static const struct ethtool_ops gem_ethtool_ops = {
.get_regs_len = macb_get_regs_len,
.get_regs = macb_get_regs,
.get_wol = macb_get_wol,
-@@ -4068,6 +4181,8 @@ static const struct ethtool_ops gem_etht
+@@ -4085,6 +4198,8 @@ static const struct ethtool_ops gem_etht
.get_eth_mac_stats = gem_get_eth_mac_stats,
.get_eth_phy_stats = gem_get_eth_phy_stats,
.get_rmon_stats = gem_get_rmon_stats,
.get_link_ksettings = macb_get_link_ksettings,
.set_link_ksettings = macb_set_link_ksettings,
.get_ringparam = macb_get_ringparam,
-@@ -5634,6 +5749,11 @@ static int macb_probe(struct platform_de
+@@ -5659,6 +5774,11 @@ static int macb_probe(struct platform_de
}
}
}
spin_lock_init(&bp->lock);
spin_lock_init(&bp->stats_lock);
-@@ -5694,6 +5814,21 @@ static int macb_probe(struct platform_de
+@@ -5719,6 +5839,21 @@ static int macb_probe(struct platform_de
else
bp->phy_interface = interface;
},
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
-@@ -1325,6 +1325,24 @@ static void dwc3_config_threshold(struct
+@@ -1343,6 +1343,24 @@ static void dwc3_config_threshold(struct
}
}
/**
* dwc3_core_init - Low-level initialization of DWC3 Core
* @dwc: Pointer to our controller context structure
-@@ -1392,6 +1410,8 @@ static int dwc3_core_init(struct dwc3 *d
+@@ -1412,6 +1430,8 @@ static int dwc3_core_init(struct dwc3 *d
dwc3_config_soc_bus(dwc);
ret = dwc3_phy_power_on(dwc);
if (ret)
goto err_exit_phy;
-@@ -1520,6 +1540,24 @@ static int dwc3_core_init(struct dwc3 *d
+@@ -1540,6 +1560,24 @@ static int dwc3_core_init(struct dwc3 *d
dwc3_writel(dwc, DWC3_GUCTL3, reg);
}
return 0;
err_power_off_phy:
-@@ -1706,6 +1744,7 @@ static void dwc3_get_properties(struct d
+@@ -1726,6 +1764,7 @@ static void dwc3_get_properties(struct d
u8 tx_max_burst_prd = 0;
u8 tx_fifo_resize_max_num;
u16 num_hc_interrupters;
/* default to highest possible threshold */
lpm_nyet_threshold = 0xf;
-@@ -1728,6 +1767,8 @@ static void dwc3_get_properties(struct d
+@@ -1748,6 +1787,8 @@ static void dwc3_get_properties(struct d
/* default to a single XHCI interrupter */
num_hc_interrupters = 1;
dwc->maximum_speed = usb_get_maximum_speed(dev);
dwc->max_ssp_rate = usb_get_maximum_ssp_rate(dev);
-@@ -1849,6 +1890,9 @@ static void dwc3_get_properties(struct d
+@@ -1869,6 +1910,9 @@ static void dwc3_get_properties(struct d
dwc->dis_split_quirk = device_property_read_bool(dev,
"snps,dis-split-quirk");
dwc->lpm_nyet_threshold = lpm_nyet_threshold;
dwc->tx_de_emphasis = tx_de_emphasis;
-@@ -1866,6 +1910,8 @@ static void dwc3_get_properties(struct d
+@@ -1886,6 +1930,8 @@ static void dwc3_get_properties(struct d
dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd;
dwc->tx_max_burst_prd = tx_max_burst_prd;
dwc->tx_fifo_resize_max_num = tx_fifo_resize_max_num;
dwc->num_hc_interrupters = num_hc_interrupters;
-@@ -2230,6 +2276,12 @@ int dwc3_core_probe(const struct dwc3_pr
+@@ -2250,6 +2296,12 @@ int dwc3_core_probe(const struct dwc3_pr
if (IS_ERR(dwc->usb_psy))
return dev_err_probe(dev, PTR_ERR(dwc->usb_psy), "couldn't get usb power supply\n");
/* Global Debug LSP MUX Select */
#define DWC3_GDBGLSPMUX_ENDBC BIT(15) /* Host only */
#define DWC3_GDBGLSPMUX_HOSTSELECT(n) ((n) & 0x3fff)
-@@ -1096,6 +1099,7 @@ struct dwc3_glue_ops {
+@@ -1097,6 +1100,7 @@ struct dwc3_glue_ops {
* @tx_fifo_resize_max_num: max number of fifos allocated during txfifo resize
* @clear_stall_protocol: endpoint number that requires a delayed status phase
* @num_hc_interrupters: number of host controller interrupters
* @hsphy_interface: "utmi" or "ulpi"
* @connected: true when we're connected to a host, false otherwise
* @softconnect: true when gadget connect is called, false when disconnect runs
-@@ -1352,6 +1356,7 @@ struct dwc3 {
+@@ -1355,6 +1359,7 @@ struct dwc3 {
u8 tx_fifo_resize_max_num;
u8 clear_stall_protocol;
u16 num_hc_interrupters;
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
---
- drivers/mmc/host/sdhci-of-dwcmshc.c | 56 +++++++++++++++++++++++++++--
+ drivers/mmc/host/sdhci-of-dwcmshc.c | 62 ++++++++++++++++++++++++++-----
drivers/mmc/host/sdhci-pltfm.c | 8 +++++
drivers/mmc/host/sdhci-pltfm.h | 3 ++
- 3 files changed, 64 insertions(+), 3 deletions(-)
+ 3 files changed, 68 insertions(+), 5 deletions(-)
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c
.compatible = "rockchip,rk3588-dwcmshc",
.data = &sdhci_dwcmshc_rk35xx_pdata,
},
-@@ -1427,13 +1457,32 @@ static int dwcmshc_probe(struct platform
- priv->bus_clk = devm_clk_get(dev, "bus");
- if (!IS_ERR(priv->bus_clk))
- clk_prepare_enable(priv->bus_clk);
+@@ -1430,13 +1460,32 @@ static int dwcmshc_probe(struct platform
+ if (err)
+ goto err_clk;
+ }
+
+ pltfm_host->timeout_clk = devm_clk_get(dev, "timeout");
+ if (!IS_ERR(pltfm_host->timeout_clk))
+ err = clk_prepare_enable(pltfm_host->timeout_clk);
+ if (err)
-+ return err;
++ goto err_bus_clk;
+
+ priv->sdio_clk = devm_clk_get_optional(&pdev->dev, "sdio");
-+ }
-+
+ }
+
+- err = mmc_of_parse(host->mmc);
+ pltfm_host->timeout_clk = devm_clk_get(&pdev->dev, "timeout");
+ if (IS_ERR(pltfm_host->timeout_clk)) {
+ err = PTR_ERR(pltfm_host->timeout_clk);
+ dev_err(&pdev->dev, "failed to get timeout clk: %d\n", err);
-+ return err;
- }
++ goto err_bus_clk;
++ }
+ err = clk_prepare_enable(pltfm_host->timeout_clk);
-+ if (err)
-+ return err;
-
- err = mmc_of_parse(host->mmc);
if (err)
- goto err_clk;
+ goto err_bus_clk;
++ err = mmc_of_parse(host->mmc);
++ if (err)
++ goto err_timeout_clk;
++
sdhci_get_of_property(pdev);
+ sdhci_enable_v4_mode(host);
priv->vendor_specific_area1 =
sdhci_readl(host, DWCMSHC_P_VENDOR_AREA1) & DWCMSHC_AREA1_MASK;
-@@ -1493,6 +1542,7 @@ err_rpm:
+@@ -1448,7 +1497,7 @@ static int dwcmshc_probe(struct platform
+ if (pltfm_data->init) {
+ err = pltfm_data->init(&pdev->dev, host, priv);
+ if (err)
+- goto err_bus_clk;
++ goto err_timeout_clk;
+ }
+
+ #ifdef CONFIG_ACPI
+@@ -1494,6 +1543,8 @@ err_setup_host:
+ err_rpm:
+ pm_runtime_disable(dev);
pm_runtime_put_noidle(dev);
++err_timeout_clk:
++ clk_disable_unprepare(pltfm_host->timeout_clk);
+ err_bus_clk:
+ clk_disable_unprepare(priv->bus_clk);
err_clk:
+@@ -1529,6 +1580,7 @@ static void dwcmshc_remove(struct platfo
+
clk_disable_unprepare(pltfm_host->clk);
-+ clk_disable_unprepare(pltfm_host->timeout_clk);
clk_disable_unprepare(priv->bus_clk);
++ clk_disable_unprepare(pltfm_host->timeout_clk);
clk_bulk_disable_unprepare(priv->num_other_clks, priv->other_clks);
- return err;
+ }
+
--- a/drivers/mmc/host/sdhci-pltfm.c
+++ b/drivers/mmc/host/sdhci-pltfm.c
@@ -32,6 +32,14 @@ unsigned int sdhci_pltfm_clk_get_max_clo
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
-@@ -2660,6 +2660,13 @@ config SENSORS_INTEL_M10_BMC_HWMON
+@@ -2663,6 +2663,13 @@ config SENSORS_INTEL_M10_BMC_HWMON
sensors monitor various telemetry data of different components on the
card, e.g. board temperature, FPGA core temperature/voltage/current.
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
-@@ -1491,6 +1491,9 @@ static int dwc3_core_init(struct dwc3 *d
+@@ -1511,6 +1511,9 @@ static int dwc3_core_init(struct dwc3 *d
if (dwc->parkmode_disable_hs_quirk)
reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS;
if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY)) {
if (dwc->maximum_speed == USB_SPEED_FULL ||
dwc->maximum_speed == USB_SPEED_HIGH)
-@@ -1870,6 +1873,8 @@ static void dwc3_get_properties(struct d
+@@ -1890,6 +1893,8 @@ static void dwc3_get_properties(struct d
"snps,parkmode-disable-ss-quirk");
dwc->parkmode_disable_hs_quirk = device_property_read_bool(dev,
"snps,parkmode-disable-hs-quirk");
#define DWC3_GUCTL1_RESUME_OPMODE_HS_HOST BIT(10)
/* Global Status Register */
-@@ -1151,10 +1152,12 @@ struct dwc3_glue_ops {
+@@ -1152,10 +1153,12 @@ struct dwc3_glue_ops {
* generation after resume from suspend.
* @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
* VBUS with an external supply.
* @gfladj_refclk_lpm_sel: set if we need to enable SOF/ITP counter
* running based on ref_clk
* @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
-@@ -1400,6 +1403,7 @@ struct dwc3 {
+@@ -1403,6 +1406,7 @@ struct dwc3 {
unsigned ulpi_ext_vbus_drv:1;
unsigned parkmode_disable_ss_quirk:1;
unsigned parkmode_disable_hs_quirk:1;
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
-@@ -1485,6 +1485,12 @@ static int dwc3_core_init(struct dwc3 *d
+@@ -1505,6 +1505,12 @@ static int dwc3_core_init(struct dwc3 *d
if (dwc->dis_tx_ipgap_linecheck_quirk)
reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS;
if (dwc->parkmode_disable_ss_quirk)
reg |= DWC3_GUCTL1_PARKMODE_DISABLE_SS;
-@@ -1869,6 +1875,10 @@ static void dwc3_get_properties(struct d
+@@ -1889,6 +1895,10 @@ static void dwc3_get_properties(struct d
"snps,resume-hs-terminations");
dwc->ulpi_ext_vbus_drv = device_property_read_bool(dev,
"snps,ulpi-ext-vbus-drv");
#define DWC3_GUCTL1_PARKMODE_DISABLE_SS BIT(17)
#define DWC3_GUCTL1_PARKMODE_DISABLE_HS BIT(16)
#define DWC3_GUCTL1_PARKMODE_DISABLE_FSLS BIT(15)
-@@ -1152,6 +1154,8 @@ struct dwc3_glue_ops {
+@@ -1153,6 +1155,8 @@ struct dwc3_glue_ops {
* generation after resume from suspend.
* @ulpi_ext_vbus_drv: Set to confiure the upli chip to drives CPEN pin
* VBUS with an external supply.
* @parkmode_disable_ss_quirk: If set, disable park mode feature for all
* Superspeed instances.
* @parkmode_disable_hs_quirk: If set, disable park mode feature for all
-@@ -1401,6 +1405,8 @@ struct dwc3 {
+@@ -1404,6 +1408,8 @@ struct dwc3 {
unsigned dis_tx_ipgap_linecheck_quirk:1;
unsigned resume_hs_terminations:1;
unsigned ulpi_ext_vbus_drv:1;
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -1629,7 +1629,16 @@ exit_unlock:
+@@ -1650,7 +1650,16 @@ exit_unlock:
*/
static int lan78xx_phy_int_ack(struct lan78xx_net *dev)
{
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -3250,6 +3250,11 @@ static int lan78xx_reset(struct lan78xx_
+@@ -3285,6 +3285,11 @@ static int lan78xx_reset(struct lan78xx_
unsigned long timeout;
int ret;
u32 buf;
ret = lan78xx_read_reg(dev, HW_CFG, &buf);
if (ret < 0)
-@@ -3320,6 +3325,10 @@ static int lan78xx_reset(struct lan78xx_
+@@ -3355,6 +3360,10 @@ static int lan78xx_reset(struct lan78xx_
buf |= HW_CFG_CLK125_EN_;
buf |= HW_CFG_REFCLK25_EN_;
ret = lan78xx_write_reg(dev, HW_CFG, buf);
if (ret < 0)
return ret;
-@@ -3412,6 +3421,10 @@ static int lan78xx_reset(struct lan78xx_
+@@ -3447,6 +3456,10 @@ static int lan78xx_reset(struct lan78xx_
if (dev->chipid == ID_REV_CHIP_ID_7801_)
buf &= ~MAC_CR_GMII_EN_;
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -2898,6 +2898,29 @@ static int lan78xx_phy_init(struct lan78
+@@ -2930,6 +2930,29 @@ static int lan78xx_phy_init(struct lan78
goto phylink_uninit;
}
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -1818,15 +1818,34 @@ exit_pm_put:
+@@ -1839,15 +1839,34 @@ exit_pm_put:
static int lan78xx_get_eee(struct net_device *net, struct ethtool_keee *edata)
{
struct lan78xx_net *dev = netdev_priv(net);
kref_init(&job->refcount);
-@@ -1402,7 +1339,7 @@ v3d_submit_cpu_ioctl(struct drm_device *
+@@ -1404,7 +1341,7 @@ v3d_submit_cpu_ioctl(struct drm_device *
trace_v3d_submit_cpu_ioctl(&v3d->drm, cpu_job->job_type);
ret = v3d_job_init(v3d, file_priv, &cpu_job->base,
if (ret) {
v3d_job_deallocate((void *)&cpu_job);
goto fail;
-@@ -1488,14 +1425,3 @@ fail:
+@@ -1490,14 +1427,3 @@ fail:
return ret;
}
/* TSTART write might get dropped, so make the IRQ retrigger a buffer read */
if (macb_readl(bp, TSR) & MACB_BIT(TGO))
-@@ -3206,6 +3326,8 @@ static int macb_close(struct net_device
+@@ -3223,6 +3343,8 @@ static int macb_close(struct net_device
netdev_tx_reset_queue(netdev_get_tx_queue(dev, q));
}
phylink_stop(bp->phylink);
phylink_disconnect_phy(bp->phylink);
-@@ -5847,6 +5969,7 @@ static int macb_probe(struct platform_de
+@@ -5872,6 +5994,7 @@ static int macb_probe(struct platform_de
}
INIT_WORK(&bp->hresp_err_bh_work, macb_hresp_error_task);
netdev_info(dev, "Cadence %s rev 0x%08x at 0x%08lx irq %d (%pM)\n",
macb_is_gem(bp) ? "GEM" : "MACB", macb_readl(bp, MID),
-@@ -5891,6 +6014,7 @@ static void macb_remove(struct platform_
+@@ -5916,6 +6039,7 @@ static void macb_remove(struct platform_
mdiobus_free(bp->mii_bus);
device_set_wakeup_enable(&bp->pdev->dev, 0);
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
-@@ -4287,6 +4287,20 @@ static const struct ethtool_ops macb_eth
+@@ -4304,6 +4304,20 @@ static const struct ethtool_ops macb_eth
.set_ringparam = macb_set_ringparam,
};
static const struct ethtool_ops gem_ethtool_ops = {
.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |
ETHTOOL_COALESCE_TX_USECS,
-@@ -4311,6 +4325,8 @@ static const struct ethtool_ops gem_etht
+@@ -4328,6 +4342,8 @@ static const struct ethtool_ops gem_etht
.set_ringparam = macb_set_ringparam,
.get_rxnfc = gem_get_rxnfc,
.set_rxnfc = gem_set_rxnfc,
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
-@@ -5727,7 +5727,8 @@ static const struct macb_config versal_c
+@@ -5752,7 +5752,8 @@ static const struct macb_config versal_c
static const struct macb_config raspberrypi_rp1_config = {
.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG |
MACB_CAPS_JUMBO |
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
-@@ -68,9 +68,6 @@ static void bcmgenet_set_rx_mode(struct
+@@ -67,9 +67,6 @@ static void bcmgenet_set_rx_mode(struct
static bool skip_umac_reset = false;
module_param(skip_umac_reset, bool, 0444);
MODULE_PARM_DESC(skip_umac_reset, "Skip UMAC reset step");
static inline void bcmgenet_writel(u32 value, void __iomem *offset)
{
-@@ -3368,17 +3365,6 @@ static int bcmgenet_open(struct net_devi
+@@ -3361,17 +3358,6 @@ static int bcmgenet_open(struct net_devi
bcmgenet_phy_pause_set(dev, priv->rx_pause, priv->tx_pause);
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
-@@ -65,7 +65,7 @@
+@@ -64,7 +64,7 @@
/* Forward declarations */
static void bcmgenet_set_rx_mode(struct net_device *dev);
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
-@@ -65,9 +65,6 @@
+@@ -64,9 +64,6 @@
/* Forward declarations */
static void bcmgenet_set_rx_mode(struct net_device *dev);
static inline void bcmgenet_writel(u32 value, void __iomem *offset)
{
-@@ -2563,11 +2560,6 @@ static void reset_umac(struct bcmgenet_p
+@@ -2555,11 +2552,6 @@ static void reset_umac(struct bcmgenet_p
bcmgenet_rbuf_ctrl_set(priv, 0);
udelay(10);
void **host_mem_desc_bufs;
unsigned int nr_allocated_queues;
unsigned int nr_write_queues;
-@@ -2301,6 +2303,13 @@ static int nvme_set_host_mem(struct nvme
+@@ -2306,6 +2308,13 @@ static int nvme_set_host_mem(struct nvme
return ret;
}
static void nvme_free_host_mem_multi(struct nvme_dev *dev)
{
int i;
-@@ -2317,6 +2326,7 @@ static void nvme_free_host_mem_multi(str
+@@ -2322,6 +2331,7 @@ static void nvme_free_host_mem_multi(str
kfree(dev->host_mem_desc_bufs);
dev->host_mem_desc_bufs = NULL;
}
static void nvme_free_host_mem(struct nvme_dev *dev)
{
-@@ -2361,6 +2371,93 @@ static int nvme_alloc_host_mem_single(st
+@@ -2366,6 +2376,93 @@ static int nvme_alloc_host_mem_single(st
return 0;
}
static int nvme_alloc_host_mem_multi(struct nvme_dev *dev, u64 preferred,
u32 chunk_size)
{
-@@ -2421,6 +2518,7 @@ out:
+@@ -2426,6 +2523,7 @@ out:
dev->host_mem_descs = NULL;
return -ENOMEM;
}
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
-@@ -1087,6 +1087,20 @@ config DRM_PANEL_TPO_Y17P
+@@ -1094,6 +1094,20 @@ config DRM_PANEL_TPO_Y17P
Say Y if you want to enable support for panels based on the
TDO Y17P controller.
static void macb_hresp_error_task(struct work_struct *work)
{
struct macb *bp = from_work(bp, work, hresp_err_bh_work);
-@@ -3294,6 +3353,9 @@ static int macb_open(struct net_device *
+@@ -3311,6 +3370,9 @@ static int macb_open(struct net_device *
for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) {
napi_enable(&queue->napi_rx);
napi_enable(&queue->napi_tx);
}
macb_init_hw(bp);
-@@ -3340,6 +3402,7 @@ static int macb_close(struct net_device
+@@ -3357,6 +3419,7 @@ static int macb_close(struct net_device
for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) {
napi_disable(&queue->napi_rx);
napi_disable(&queue->napi_tx);
netdev_tx_reset_queue(netdev_get_tx_queue(dev, q));
}
-@@ -4938,6 +5001,8 @@ static int macb_init(struct platform_dev
+@@ -4963,6 +5026,8 @@ static int macb_init(struct platform_dev
}
INIT_WORK(&queue->tx_error_task, macb_tx_error_task);
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
-@@ -1336,11 +1336,11 @@ static void dwc3_set_axi_pipe_limit(stru
+@@ -1354,11 +1354,11 @@ static void dwc3_set_axi_pipe_limit(stru
dev_err(dev, "Invalid axi_pipe_limit property\n");
return;
}
}
/**
-@@ -1554,7 +1554,7 @@ static int dwc3_core_init(struct dwc3 *d
+@@ -1574,7 +1574,7 @@ static int dwc3_core_init(struct dwc3 *d
u8 tx_maxburst = dwc->tx_max_burst_prd;
if (tx_thr_num && tx_maxburst) {
reg |= DWC3_GTXTHRCFG_PKTCNTSEL;
reg &= ~DWC3_GTXTHRCFG_TXPKTCNT(~0);
-@@ -1563,7 +1563,7 @@ static int dwc3_core_init(struct dwc3 *d
+@@ -1583,7 +1583,7 @@ static int dwc3_core_init(struct dwc3 *d
reg &= ~DWC3_GTXTHRCFG_MAXTXBURSTSIZE(~0);
reg |= DWC3_GTXTHRCFG_MAXTXBURSTSIZE(tx_maxburst);
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -1960,7 +1960,6 @@ static const struct ethtool_ops lan78xx_
+@@ -1981,7 +1981,6 @@ static const struct ethtool_ops lan78xx_
.set_link_ksettings = lan78xx_set_link_ksettings,
.get_regs_len = lan78xx_get_regs_len,
.get_regs = lan78xx_get_regs,
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -1818,34 +1818,15 @@ exit_pm_put:
+@@ -1839,34 +1839,15 @@ exit_pm_put:
static int lan78xx_get_eee(struct net_device *net, struct ethtool_keee *edata)
{
struct lan78xx_net *dev = netdev_priv(net);
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
-@@ -2897,29 +2897,6 @@ static int lan78xx_phy_init(struct lan78
+@@ -2929,29 +2929,6 @@ static int lan78xx_phy_init(struct lan78
goto phylink_uninit;
}
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
-@@ -2433,9 +2433,9 @@ static int nvme_alloc_host_mem_multi(str
+@@ -2438,9 +2438,9 @@ static int nvme_alloc_host_mem_multi(str
i = dev->nr_host_mem_descs = mapped_nents;
while (--i >= 0) {
continue;
--- a/drivers/of/of_reserved_mem.c
+++ b/drivers/of/of_reserved_mem.c
-@@ -159,11 +159,25 @@ static int __init __reserved_mem_reserve
+@@ -168,11 +168,25 @@ static int __init __reserved_mem_reserve
int len;
const __be32 *prop;
bool nomap, default_cma;
if (len && len % t_len != 0) {
pr_err("Reserved memory: invalid reg property in '%s', skipping node.\n",
uname);
-@@ -180,7 +194,7 @@ static int __init __reserved_mem_reserve
+@@ -189,7 +203,7 @@ static int __init __reserved_mem_reserve
while (len >= t_len) {
base = dt_mem_next_cell(dt_root_addr_cells, &prop);
if (size && early_init_dt_reserve_memory(base, size, nomap) == 0) {
/* Architecture specific contiguous memory fixup. */
-@@ -267,8 +281,21 @@ void __init fdt_scan_reserved_mem_reg_no
+@@ -277,8 +291,21 @@ void __init fdt_scan_reserved_mem_reg_no
if (default_cma && cma_skip_dt_default_reserved_mem())
continue;
base = b;
size = s;
-@@ -406,16 +433,24 @@ static int __init __reserved_mem_alloc_s
+@@ -416,16 +443,24 @@ static int __init __reserved_mem_alloc_s
const __be32 *prop;
bool nomap, default_cma;
int ret;
spin_unlock(&bp->lock);
if (CIRC_SPACE(queue->tx_head, queue->tx_tail, bp->tx_ring_size) < 1)
-@@ -5810,6 +5813,7 @@ static const struct macb_config raspberr
+@@ -5835,6 +5838,7 @@ static const struct macb_config raspberr
.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_CLK_HW_CHG |
MACB_CAPS_JUMBO |
MACB_CAPS_GEM_HAS_PTP |
.matches = cpucap_multi_entry_cap_matches,
--- a/drivers/gpu/drm/v3d/v3d_submit.c
+++ b/drivers/gpu/drm/v3d/v3d_submit.c
-@@ -1350,7 +1350,7 @@ v3d_submit_cpu_ioctl(struct drm_device *
+@@ -1352,7 +1352,7 @@ v3d_submit_cpu_ioctl(struct drm_device *
trace_v3d_submit_cpu_ioctl(&v3d->drm, cpu_job->job_type);
ret = v3d_job_init(v3d, file_priv, &cpu_job->base,
select SYS_SUPPORTS_HIGHMEM
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
-@@ -77,6 +77,7 @@
+@@ -78,6 +78,7 @@
#define PCIE_CONF_VEND_ID 0x100
#define PCIE_CONF_DEVICE_ID 0x102
#define PCIE_CONF_CLASS_ID 0x106
#define PCIE_INT_MASK 0x420
-@@ -89,6 +90,11 @@
+@@ -90,6 +91,11 @@
#define MSI_MASK BIT(23)
#define MTK_MSI_IRQS_NUM 32
#define PCIE_AHB_TRANS_BASE0_L 0x438
#define PCIE_AHB_TRANS_BASE0_H 0x43c
#define AHB2PCIE_SIZE(x) ((x) & GENMASK(4, 0))
-@@ -750,6 +756,86 @@ static int mtk_pcie_startup_port_v2(stru
+@@ -753,6 +759,86 @@ static int mtk_pcie_startup_port_v2(stru
return 0;
}
static void __iomem *mtk_pcie_map_bus(struct pci_bus *bus,
unsigned int devfn, int where)
{
-@@ -1120,6 +1206,20 @@ static int mtk_pcie_probe(struct platfor
+@@ -1131,6 +1217,20 @@ static int mtk_pcie_probe(struct platfor
if (err)
goto put_resources;
return 0;
put_resources:
-@@ -1233,12 +1333,19 @@ static const struct mtk_pcie_soc mtk_pci
+@@ -1244,12 +1344,19 @@ static const struct mtk_pcie_soc mtk_pci
.setup_irq = mtk_pcie_setup_irq,
};
+++ /dev/null
-From 6d5fbecd0213489bc4de71a0da194d18e654fd6e Mon Sep 17 00:00:00 2001
-From: Kyle Hendry <kylehendrydev@gmail.com>
-Date: Sun, 21 Jun 2026 11:47:02 -0700
-Subject: MIPS: mm: Add check for highmem before removing memory block
-
-If a device has less physical memory than the highmem threshold
-bootmem_init() doesn't set highstart_pfn. This results in highmem_init()
-wrongly disabling the entire memory range if the cpu doesn't support
-highmem. Add a check that highstart_pfn is non zero before removing the
-highmem block.
-
-Fixes: f171b55f1441 ("mips: fix HIGHMEM initialization")
-Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
-Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
----
- arch/mips/mm/init.c | 5 +++--
- 1 file changed, 3 insertions(+), 2 deletions(-)
-
---- a/arch/mips/mm/init.c
-+++ b/arch/mips/mm/init.c
-@@ -431,10 +431,11 @@ static inline void __init highmem_init(v
- unsigned long tmp;
-
- /*
-- * If CPU cannot support HIGHMEM discard the memory above highstart_pfn
-+ * If CPU cannot support HIGHMEM discard any memory above highstart_pfn
- */
- if (cpu_has_dc_aliases) {
-- memblock_remove(PFN_PHYS(highstart_pfn), -1);
-+ if (highstart_pfn)
-+ memblock_remove(PFN_PHYS(highstart_pfn), -1);
- return;
- }
-
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
-@@ -2750,6 +2750,17 @@ static inline void *netdev_priv(const st
+@@ -2754,6 +2754,17 @@ static inline void *netdev_priv(const st
return (void *)dev->priv;
}
+++ /dev/null
-From 16759757c4d28e958fd5a5a1fe0f86828872f28d Mon Sep 17 00:00:00 2001
-From: Corey Leavitt <corey@leavitt.info>
-Date: Wed, 24 Jun 2026 22:40:16 +0200
-Subject: net: pse-pd: scope pse_control regulator handle to kref lifetime
-
-__pse_control_release() drops psec->ps via devm_regulator_put(), which
-only succeeds if the devres entry added by the matching
-devm_regulator_get_exclusive() is still present on pcdev->dev at the
-time the pse_control's kref hits zero.
-
-That assumption does not hold when the controller is unbound while a
-pse_control still has consumers: pcdev->dev's devres list is released
-LIFO, so every per-attach regulator-GET devres runs (and
-regulator_put()s the underlying regulator) before
-pse_controller_unregister() itself is invoked. Any later
-pse_control_put() from that unbind path then reads psec->ps as a
-dangling pointer inside devm_regulator_put() and WARNs at
-drivers/regulator/devres.c:232 (devres_release() fails to find the
-already-released match).
-
-The pse_control's consumer handle is logically scoped to the
-pse_control's refcount, not to pcdev->dev's devres lifetime. Switch to
-the plain regulator_get_exclusive() / regulator_put() pair so the
-regulator put in __pse_control_release() no longer depends on the
-controller's devres still being present. No change to the
-regulator-framework-visible refcount or lifetime of the underlying
-regulator: a single get paired with a single put. The existing
-devm_regulator_register() for the per-PI rails is unchanged (those ARE
-correctly scoped to the controller's lifetime).
-
-This addresses only the regulator handle. The same unbind-while-held
-scenario also leaves __pse_control_release() reading psec->pcdev->pi[]
-and psec->pcdev->owner after pse_controller_unregister() has freed
-pcdev->pi, because the controller does not drain its outstanding
-pse_control references on unregister. That wider pse_control vs
-pcdev lifetime problem pre-dates this change and is addressed by the
-PSE controller notifier series, which drains phydev->psec on
-PSE_UNREGISTERED before pcdev->pi is freed.
-
-Link: https://lore.kernel.org/netdev/20260620112440.1734404-1-github@szelinsky.de/
-Fixes: d83e13761d5b ("net: pse-pd: Use regulator framework within PSE framework")
-Signed-off-by: Corey Leavitt <corey@leavitt.info>
-Acked-by: Kory Maincent <kory.maincent@bootlin.com>
-Signed-off-by: Carlo Szelinsky <github@szelinsky.de>
-Reviewed-by: Simon Horman <horms@kernel.org>
-Link: https://patch.msgid.link/20260624204017.2752934-1-github@szelinsky.de
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
----
- drivers/net/pse-pd/pse_core.c | 6 +++---
- 1 file changed, 3 insertions(+), 3 deletions(-)
-
---- a/drivers/net/pse-pd/pse_core.c
-+++ b/drivers/net/pse-pd/pse_core.c
-@@ -1362,7 +1362,7 @@ static void __pse_control_release(struct
-
- if (psec->pcdev->pi[psec->id].admin_state_enabled)
- regulator_disable(psec->ps);
-- devm_regulator_put(psec->ps);
-+ regulator_put(psec->ps);
-
- module_put(psec->pcdev->owner);
-
-@@ -1431,8 +1431,8 @@ pse_control_get_internal(struct pse_cont
- goto free_psec;
-
- pcdev->pi[index].admin_state_enabled = ret;
-- psec->ps = devm_regulator_get_exclusive(pcdev->dev,
-- rdev_get_name(pcdev->pi[index].rdev));
-+ psec->ps = regulator_get_exclusive(pcdev->dev,
-+ rdev_get_name(pcdev->pi[index].rdev));
- if (IS_ERR(psec->ps)) {
- ret = PTR_ERR(psec->ps);
- goto put_module;
unregister_pernet_device(&pppoe_net_ops);
--- a/net/ipv4/af_inet.c
+++ b/net/ipv4/af_inet.c
-@@ -1531,6 +1531,7 @@ out:
+@@ -1526,6 +1526,7 @@ out:
return pp;
}
static struct sk_buff *ipip_gro_receive(struct list_head *head,
struct sk_buff *skb)
-@@ -1616,6 +1617,7 @@ int inet_gro_complete(struct sk_buff *sk
+@@ -1611,6 +1612,7 @@ int inet_gro_complete(struct sk_buff *sk
out:
return err;
}
+ if (qd->min_netlen > len)
+ qd->min_netlen = len;
- len += q->rate_overhead;
+ len = max((s32)len + q->rate_overhead, (s32)q->rate_mpu);
-@@ -1385,10 +1389,10 @@ static u32 cake_calc_overhead(struct cak
+@@ -1382,10 +1386,10 @@ static u32 cake_calc_overhead(struct cak
len += (len + 63) / 64;
}
return len;
}
-@@ -1592,7 +1596,7 @@ static unsigned int cake_drop(struct Qdi
+@@ -1589,7 +1593,7 @@ static unsigned int cake_drop(struct Qdi
flow->dropped++;
WRITE_ONCE(b->tin_dropped, b->tin_dropped + 1);
cake_advance_shaper(q, b, skb, now, true);
qdisc_drop_reason(skb, sch, to_free, SKB_DROP_REASON_QDISC_OVERLIMIT);
-@@ -1662,7 +1666,8 @@ static u8 cake_handle_diffserv(struct sk
+@@ -1659,7 +1663,8 @@ static u8 cake_handle_diffserv(struct sk
static struct cake_tin_data *cake_select_tin(struct Qdisc *sch,
struct sk_buff *skb)
{
u32 tin, mark;
bool wash;
u8 dscp;
-@@ -1679,24 +1684,24 @@ static struct cake_tin_data *cake_select
+@@ -1676,24 +1681,24 @@ static struct cake_tin_data *cake_select
if (q->tin_mode == CAKE_DIFFSERV_BESTEFFORT)
tin = 0;
}
static u32 cake_classify(struct Qdisc *sch, struct cake_tin_data **t,
-@@ -1752,7 +1757,7 @@ static s32 cake_enqueue(struct sk_buff *
+@@ -1749,7 +1754,7 @@ static s32 cake_enqueue(struct sk_buff *
bool same_flow = false;
/* choose flow to insert into */
if (idx == 0) {
if (ret & __NET_XMIT_BYPASS)
qdisc_qstats_drop(sch);
-@@ -1787,7 +1792,7 @@ static s32 cake_enqueue(struct sk_buff *
+@@ -1784,7 +1789,7 @@ static s32 cake_enqueue(struct sk_buff *
if (unlikely(len > b->max_skblen))
b->max_skblen = len;
struct sk_buff *segs, *nskb;
netdev_features_t features = netif_skb_features(skb);
unsigned int slen = 0, numsegs = 0;
-@@ -1828,7 +1833,7 @@ static s32 cake_enqueue(struct sk_buff *
+@@ -1825,7 +1830,7 @@ static s32 cake_enqueue(struct sk_buff *
get_cobalt_cb(skb)->adjusted_len = cake_overhead(q, skb);
flow_queue_add(flow, skb);
ack = cake_ack_filter(q, flow);
if (ack) {
-@@ -1837,7 +1842,7 @@ static s32 cake_enqueue(struct sk_buff *
+@@ -1834,7 +1839,7 @@ static s32 cake_enqueue(struct sk_buff *
ack_pkt_len = qdisc_pkt_len(ack);
b->bytes += ack_pkt_len;
q->buffer_used += skb->truesize - ack->truesize;
cake_advance_shaper(q, b, ack, now, true);
qdisc_tree_reduce_backlog(sch, 1, ack_pkt_len);
-@@ -1860,7 +1865,7 @@ static s32 cake_enqueue(struct sk_buff *
+@@ -1857,7 +1862,7 @@ static s32 cake_enqueue(struct sk_buff *
cake_heapify_up(q, b->overflow_idx[idx]);
/* incoming bandwidth capacity estimate */
u64 packet_interval = \
ktime_to_ns(ktime_sub(now, q->last_packet_time));
-@@ -1892,7 +1897,7 @@ static s32 cake_enqueue(struct sk_buff *
+@@ -1889,7 +1894,7 @@ static s32 cake_enqueue(struct sk_buff *
if (ktime_after(now,
ktime_add_ms(q->last_reconfig_time,
250))) {
cake_reconfigure(sch);
}
}
-@@ -1912,7 +1917,7 @@ static s32 cake_enqueue(struct sk_buff *
+@@ -1909,7 +1914,7 @@ static s32 cake_enqueue(struct sk_buff *
flow->set = CAKE_SET_SPARSE;
b->sparse_flow_count++;
} else if (flow->set == CAKE_SET_SPARSE_WAIT) {
/* this flow was empty, accounted as a sparse flow, but actually
* in the bulk rotation.
-@@ -1921,8 +1926,8 @@ static s32 cake_enqueue(struct sk_buff *
+@@ -1918,8 +1923,8 @@ static s32 cake_enqueue(struct sk_buff *
b->sparse_flow_count--;
b->bulk_flow_count++;
}
if (q->buffer_used > q->buffer_max_used)
-@@ -2109,8 +2114,8 @@ retry:
+@@ -2106,8 +2111,8 @@ retry:
b->sparse_flow_count--;
b->bulk_flow_count++;
flow->set = CAKE_SET_BULK;
} else {
-@@ -2122,7 +2127,7 @@ retry:
+@@ -2119,7 +2124,7 @@ retry:
}
}
list_move_tail(&flow->flowchain, &b->old_flows);
goto retry;
-@@ -2146,8 +2151,8 @@ retry:
+@@ -2143,8 +2148,8 @@ retry:
if (flow->set == CAKE_SET_BULK) {
b->bulk_flow_count--;
b->decaying_flow_count++;
} else if (flow->set == CAKE_SET_SPARSE ||
-@@ -2165,8 +2170,8 @@ retry:
+@@ -2162,8 +2167,8 @@ retry:
else if (flow->set == CAKE_SET_BULK) {
b->bulk_flow_count--;
} else
b->decaying_flow_count--;
-@@ -2177,14 +2182,14 @@ retry:
+@@ -2174,14 +2179,14 @@ retry:
reason = cobalt_should_drop(&flow->cvars, &b->cparams, now, skb,
(b->bulk_flow_count *
len = cake_advance_shaper(q, b, skb,
now, true);
flow->deficit -= len;
-@@ -2195,7 +2200,7 @@ retry:
+@@ -2192,7 +2197,7 @@ retry:
qdisc_tree_reduce_backlog(sch, 1, qdisc_pkt_len(skb));
qdisc_qstats_drop(sch);
kfree_skb_reason(skb, reason);
goto retry;
}
-@@ -2320,7 +2325,7 @@ static int cake_config_besteffort(struct
+@@ -2317,7 +2322,7 @@ static int cake_config_besteffort(struct
struct cake_sched_data *q = qdisc_priv(sch);
struct cake_tin_data *b = &q->tins[0];
u32 mtu = psched_mtu(qdisc_dev(sch));
q->tin_cnt = 1;
-@@ -2328,7 +2333,7 @@ static int cake_config_besteffort(struct
+@@ -2325,7 +2330,7 @@ static int cake_config_besteffort(struct
q->tin_order = normal_order;
cake_set_rate(b, rate, mtu,
b->tin_quantum = 65535;
return 0;
-@@ -2339,7 +2344,7 @@ static int cake_config_precedence(struct
+@@ -2336,7 +2341,7 @@ static int cake_config_precedence(struct
/* convert high-level (user visible) parameters into internal format */
struct cake_sched_data *q = qdisc_priv(sch);
u32 mtu = psched_mtu(qdisc_dev(sch));
u32 quantum = 256;
u32 i;
-@@ -2350,8 +2355,8 @@ static int cake_config_precedence(struct
+@@ -2347,8 +2352,8 @@ static int cake_config_precedence(struct
for (i = 0; i < q->tin_cnt; i++) {
struct cake_tin_data *b = &q->tins[i];
b->tin_quantum = max_t(u16, 1U, quantum);
-@@ -2428,7 +2433,7 @@ static int cake_config_diffserv8(struct
+@@ -2425,7 +2430,7 @@ static int cake_config_diffserv8(struct
struct cake_sched_data *q = qdisc_priv(sch);
u32 mtu = psched_mtu(qdisc_dev(sch));
u32 quantum = 256;
u32 i;
-@@ -2442,8 +2447,8 @@ static int cake_config_diffserv8(struct
+@@ -2439,8 +2444,8 @@ static int cake_config_diffserv8(struct
for (i = 0; i < q->tin_cnt; i++) {
struct cake_tin_data *b = &q->tins[i];
b->tin_quantum = max_t(u16, 1U, quantum);
-@@ -2472,7 +2477,7 @@ static int cake_config_diffserv4(struct
+@@ -2469,7 +2474,7 @@ static int cake_config_diffserv4(struct
struct cake_sched_data *q = qdisc_priv(sch);
u32 mtu = psched_mtu(qdisc_dev(sch));
u32 quantum = 1024;
q->tin_cnt = 4;
-@@ -2483,13 +2488,13 @@ static int cake_config_diffserv4(struct
+@@ -2480,13 +2485,13 @@ static int cake_config_diffserv4(struct
/* class characteristics */
cake_set_rate(&q->tins[0], rate, mtu,
/* bandwidth-sharing weights */
q->tins[0].tin_quantum = quantum;
-@@ -2509,7 +2514,7 @@ static int cake_config_diffserv3(struct
+@@ -2506,7 +2511,7 @@ static int cake_config_diffserv3(struct
*/
struct cake_sched_data *q = qdisc_priv(sch);
u32 mtu = psched_mtu(qdisc_dev(sch));
u32 quantum = 1024;
q->tin_cnt = 3;
-@@ -2520,11 +2525,11 @@ static int cake_config_diffserv3(struct
+@@ -2517,11 +2522,11 @@ static int cake_config_diffserv3(struct
/* class characteristics */
cake_set_rate(&q->tins[0], rate, mtu,
/* bandwidth-sharing weights */
q->tins[0].tin_quantum = quantum;
-@@ -2536,7 +2541,8 @@ static int cake_config_diffserv3(struct
+@@ -2533,7 +2538,8 @@ static int cake_config_diffserv3(struct
static void cake_reconfigure(struct Qdisc *sch)
{
int c, ft;
switch (q->tin_mode) {
-@@ -2562,36 +2568,37 @@ static void cake_reconfigure(struct Qdis
+@@ -2559,36 +2565,37 @@ static void cake_reconfigure(struct Qdis
break;
}
struct nlattr *tb[TCA_CAKE_MAX + 1];
u16 rate_flags;
u8 flow_mode;
-@@ -2645,19 +2652,19 @@ static int cake_change(struct Qdisc *sch
+@@ -2642,19 +2649,19 @@ static int cake_change(struct Qdisc *sch
nla_get_s32(tb[TCA_CAKE_OVERHEAD]));
rate_flags |= CAKE_FLAG_OVERHEAD;
}
if (tb[TCA_CAKE_MPU])
-@@ -2713,7 +2720,7 @@ static int cake_change(struct Qdisc *sch
+@@ -2710,7 +2717,7 @@ static int cake_change(struct Qdisc *sch
WRITE_ONCE(q->rate_flags, rate_flags);
WRITE_ONCE(q->flow_mode, flow_mode);
sch_tree_lock(sch);
cake_reconfigure(sch);
sch_tree_unlock(sch);
-@@ -2729,14 +2736,20 @@ static void cake_destroy(struct Qdisc *s
+@@ -2726,14 +2733,20 @@ static void cake_destroy(struct Qdisc *s
qdisc_watchdog_cancel(&q->watchdog);
tcf_block_put(q->block);
kvfree(q->tins);
sch->limit = 10240;
q->tin_mode = CAKE_DIFFSERV_DIFFSERV3;
q->flow_mode = CAKE_FLOW_TRIPLE;
-@@ -2748,33 +2761,36 @@ static int cake_init(struct Qdisc *sch,
+@@ -2745,33 +2758,36 @@ static int cake_init(struct Qdisc *sch,
* for 5 to 10% of interval
*/
q->rate_flags |= CAKE_FLAG_SPLIT_GSO;
INIT_LIST_HEAD(&b->new_flows);
INIT_LIST_HEAD(&b->old_flows);
-@@ -2790,22 +2806,27 @@ static int cake_init(struct Qdisc *sch,
+@@ -2787,22 +2803,27 @@ static int cake_init(struct Qdisc *sch,
INIT_LIST_HEAD(&flow->flowchain);
cobalt_vars_init(&flow->cvars);
#include <net/pkt_cls.h>
#include <net/tcp.h>
#include <net/flow_dissector.h>
-@@ -3163,14 +3164,89 @@ static struct Qdisc_ops cake_qdisc_ops _
+@@ -3160,14 +3161,89 @@ static struct Qdisc_ops cake_qdisc_ops _
};
MODULE_ALIAS_NET_SCH("cake");
}
module_init(cake_module_init)
-@@ -3178,3 +3254,4 @@ module_exit(cake_module_exit)
+@@ -3175,3 +3251,4 @@ module_exit(cake_module_exit)
MODULE_AUTHOR("Jonathan Morton");
MODULE_LICENSE("Dual BSD/GPL");
MODULE_DESCRIPTION("The CAKE shaper.");
};
struct cake_sched_data {
-@@ -2595,14 +2596,12 @@ static void cake_reconfigure(struct Qdis
+@@ -2592,14 +2593,12 @@ static void cake_reconfigure(struct Qdis
q->buffer_config_limit));
}
int err;
err = nla_parse_nested_deprecated(tb, TCA_CAKE_MAX, opt, cake_policy,
-@@ -2610,7 +2609,6 @@ static int cake_change(struct Qdisc *sch
+@@ -2607,7 +2606,6 @@ static int cake_change(struct Qdisc *sch
if (err < 0)
return err;
if (tb[TCA_CAKE_NAT]) {
#if IS_ENABLED(CONFIG_NF_CONNTRACK)
flow_mode &= ~CAKE_FLOW_NAT_FLAG;
-@@ -2623,6 +2621,19 @@ static int cake_change(struct Qdisc *sch
+@@ -2620,6 +2618,19 @@ static int cake_change(struct Qdisc *sch
#endif
}
if (tb[TCA_CAKE_BASE_RATE64])
WRITE_ONCE(q->rate_bps,
nla_get_u64(tb[TCA_CAKE_BASE_RATE64]));
-@@ -2631,7 +2642,6 @@ static int cake_change(struct Qdisc *sch
+@@ -2628,7 +2639,6 @@ static int cake_change(struct Qdisc *sch
WRITE_ONCE(q->tin_mode,
nla_get_u32(tb[TCA_CAKE_DIFFSERV_MODE]));
if (tb[TCA_CAKE_WASH]) {
if (!!nla_get_u32(tb[TCA_CAKE_WASH]))
rate_flags |= CAKE_FLAG_WASH;
-@@ -2652,20 +2662,12 @@ static int cake_change(struct Qdisc *sch
+@@ -2649,20 +2659,12 @@ static int cake_change(struct Qdisc *sch
WRITE_ONCE(q->rate_overhead,
nla_get_s32(tb[TCA_CAKE_OVERHEAD]));
rate_flags |= CAKE_FLAG_OVERHEAD;
}
if (tb[TCA_CAKE_MPU])
-@@ -2684,13 +2686,6 @@ static int cake_change(struct Qdisc *sch
+@@ -2681,13 +2683,6 @@ static int cake_change(struct Qdisc *sch
WRITE_ONCE(q->target, max(target, 1U));
}
if (tb[TCA_CAKE_INGRESS]) {
if (!!nla_get_u32(tb[TCA_CAKE_INGRESS]))
rate_flags |= CAKE_FLAG_INGRESS;
-@@ -2721,6 +2716,34 @@ static int cake_change(struct Qdisc *sch
+@@ -2718,6 +2713,34 @@ static int cake_change(struct Qdisc *sch
WRITE_ONCE(q->rate_flags, rate_flags);
WRITE_ONCE(q->flow_mode, flow_mode);
if (qd->tins) {
sch_tree_lock(sch);
cake_reconfigure(sch);
-@@ -2737,7 +2760,23 @@ static void cake_destroy(struct Qdisc *s
+@@ -2734,7 +2757,23 @@ static void cake_destroy(struct Qdisc *s
qdisc_watchdog_cancel(&q->watchdog);
tcf_block_put(q->block);
kvfree(q->tins);
}
static int cake_init(struct Qdisc *sch, struct nlattr *opt,
-@@ -2751,17 +2790,9 @@ static int cake_init(struct Qdisc *sch,
+@@ -2748,17 +2787,9 @@ static int cake_init(struct Qdisc *sch,
if (!q)
return -ENOMEM;
qd->cur_tin = 0;
qd->cur_flow = 0;
qd->config = q;
-@@ -2824,10 +2855,21 @@ err:
+@@ -2821,10 +2852,21 @@ err:
return err;
}
struct nlattr *opts;
u16 rate_flags;
u8 flow_mode;
-@@ -2903,6 +2945,13 @@ nla_put_failure:
+@@ -2900,6 +2942,13 @@ nla_put_failure:
return -1;
}
static int cake_dump_stats(struct Qdisc *sch, struct gnet_dump *d)
{
struct nlattr *stats = nla_nest_start_noflag(d->skb, TCA_STATS_APP);
-@@ -3166,6 +3215,7 @@ MODULE_ALIAS_NET_SCH("cake");
+@@ -3163,6 +3212,7 @@ MODULE_ALIAS_NET_SCH("cake");
struct cake_mq_sched {
struct mq_sched mq_priv; /* must be first */
};
static void cake_mq_destroy(struct Qdisc *sch)
-@@ -3176,25 +3226,68 @@ static void cake_mq_destroy(struct Qdisc
+@@ -3173,25 +3223,68 @@ static void cake_mq_destroy(struct Qdisc
static int cake_mq_init(struct Qdisc *sch, struct nlattr *opt,
struct netlink_ext_ack *extack)
{
/* http://en.wikipedia.org/wiki/Methods_of_computing_square_roots
* new_invsqrt = (invsqrt / 2) * (3 - count * invsqrt^2)
*
-@@ -2009,6 +2017,40 @@ static struct sk_buff *cake_dequeue(stru
+@@ -2006,6 +2014,40 @@ static struct sk_buff *cake_dequeue(stru
u64 delay;
u32 len;
begin:
if (!sch->q.qlen)
return NULL;
-@@ -2208,6 +2250,7 @@ retry:
+@@ -2205,6 +2247,7 @@ retry:
WRITE_ONCE(b->tin_ecn_mark, b->tin_ecn_mark + !!flow->cvars.ecn_marked);
qdisc_bstats_update(sch, skb);
/* collect delay stats */
delay = ktime_to_ns(ktime_sub(now, cobalt_get_enqueue_time(skb)));
-@@ -2310,6 +2353,9 @@ static void cake_set_rate(struct cake_ti
+@@ -2307,6 +2350,9 @@ static void cake_set_rate(struct cake_ti
b->tin_rate_ns = rate_ns;
b->tin_rate_shft = rate_shft;
byte_target_ns = (byte_target * rate_ns) >> rate_shft;
WRITE_ONCE(b->cparams.target,
-@@ -2777,6 +2823,7 @@ static void cake_config_init(struct cake
+@@ -2774,6 +2820,7 @@ static void cake_config_init(struct cake
*/
q->rate_flags |= CAKE_FLAG_SPLIT_GSO;
q->is_shared = is_shared;
}
static int cake_init(struct Qdisc *sch, struct nlattr *opt,
-@@ -2848,6 +2895,9 @@ static int cake_init(struct Qdisc *sch,
+@@ -2845,6 +2892,9 @@ static int cake_init(struct Qdisc *sch,
qd->avg_peak_bandwidth = q->rate_bps;
qd->min_netlen = ~0;
qd->min_adjlen = ~0;
return 0;
err:
kvfree(qd->config);
-@@ -2980,6 +3030,7 @@ static int cake_dump_stats(struct Qdisc
+@@ -2977,6 +3027,7 @@ static int cake_dump_stats(struct Qdisc
PUT_STAT_U32(MAX_ADJLEN, q->max_adjlen);
PUT_STAT_U32(MIN_NETLEN, q->min_netlen);
PUT_STAT_U32(MIN_ADJLEN, q->min_adjlen);
struct cake_heap_entry overflow_heap[CAKE_QUEUES * CAKE_MAX_TINS];
-@@ -2806,8 +2807,6 @@ static void cake_destroy(struct Qdisc *s
+@@ -2803,8 +2804,6 @@ static void cake_destroy(struct Qdisc *s
qdisc_watchdog_cancel(&q->watchdog);
tcf_block_put(q->block);
kvfree(q->tins);
}
static void cake_config_init(struct cake_sched_config *q, bool is_shared)
-@@ -2830,13 +2829,9 @@ static int cake_init(struct Qdisc *sch,
+@@ -2827,13 +2826,9 @@ static int cake_init(struct Qdisc *sch,
struct netlink_ext_ack *extack)
{
struct cake_sched_data *qd = qdisc_priv(sch);
cake_config_init(q, false);
sch->limit = 10240;
-@@ -2848,14 +2843,13 @@ static int cake_init(struct Qdisc *sch,
+@@ -2845,14 +2840,13 @@ static int cake_init(struct Qdisc *sch,
if (opt) {
err = cake_change(sch, opt, extack);
quantum_div[0] = ~0;
for (i = 1; i <= CAKE_QUEUES; i++)
-@@ -2863,10 +2857,8 @@ static int cake_init(struct Qdisc *sch,
+@@ -2860,10 +2854,8 @@ static int cake_init(struct Qdisc *sch,
qd->tins = kvcalloc(CAKE_MAX_TINS, sizeof(struct cake_tin_data),
GFP_KERNEL);
for (i = 0; i < CAKE_MAX_TINS; i++) {
struct cake_tin_data *b = qd->tins + i;
-@@ -2899,22 +2891,13 @@ static int cake_init(struct Qdisc *sch,
+@@ -2896,22 +2888,13 @@ static int cake_init(struct Qdisc *sch,
qd->last_checked_active = 0;
return 0;
--- a/net/sched/sch_cake.c
+++ b/net/sched/sch_cake.c
-@@ -2018,7 +2018,8 @@ static struct sk_buff *cake_dequeue(stru
+@@ -2015,7 +2015,8 @@ static struct sk_buff *cake_dequeue(stru
u64 delay;
u32 len;
/* http://en.wikipedia.org/wiki/Methods_of_computing_square_roots
* new_invsqrt = (invsqrt / 2) * (3 - count * invsqrt^2)
*
-@@ -2045,12 +2045,9 @@ static struct sk_buff *cake_dequeue(stru
+@@ -2042,12 +2042,9 @@ static struct sk_buff *cake_dequeue(stru
if (num_active_qs > 1)
new_rate = div64_u64(q->config->rate_bps, num_active_qs);
}
begin:
-@@ -2370,12 +2367,10 @@ static void cake_set_rate(struct cake_ti
+@@ -2367,12 +2364,10 @@ static void cake_set_rate(struct cake_ti
b->cparams.p_dec = 1 << 20; /* 1/4096 */
}
q->tin_cnt = 1;
-@@ -2389,12 +2384,10 @@ static int cake_config_besteffort(struct
+@@ -2386,12 +2381,10 @@ static int cake_config_besteffort(struct
return 0;
}
u32 quantum = 256;
u32 i;
-@@ -2465,7 +2458,7 @@ static int cake_config_precedence(struct
+@@ -2462,7 +2455,7 @@ static int cake_config_precedence(struct
* Total 12 traffic classes.
*/
{
/* Pruned list of traffic classes for typical applications:
*
-@@ -2482,8 +2475,6 @@ static int cake_config_diffserv8(struct
+@@ -2479,8 +2472,6 @@ static int cake_config_diffserv8(struct
*/
struct cake_sched_data *q = qdisc_priv(sch);
u32 quantum = 256;
u32 i;
-@@ -2513,7 +2504,7 @@ static int cake_config_diffserv8(struct
+@@ -2510,7 +2501,7 @@ static int cake_config_diffserv8(struct
return 0;
}
{
/* Further pruned list of traffic classes for four-class system:
*
-@@ -2526,8 +2517,6 @@ static int cake_config_diffserv4(struct
+@@ -2523,8 +2514,6 @@ static int cake_config_diffserv4(struct
*/
struct cake_sched_data *q = qdisc_priv(sch);
u32 quantum = 1024;
q->tin_cnt = 4;
-@@ -2555,7 +2544,7 @@ static int cake_config_diffserv4(struct
+@@ -2552,7 +2541,7 @@ static int cake_config_diffserv4(struct
return 0;
}
{
/* Simplified Diffserv structure with 3 tins.
* Latency Sensitive (CS7, CS6, EF, VA, TOS4)
-@@ -2563,8 +2552,6 @@ static int cake_config_diffserv3(struct
+@@ -2560,8 +2549,6 @@ static int cake_config_diffserv3(struct
* Low Priority (LE, CS1)
*/
struct cake_sched_data *q = qdisc_priv(sch);
u32 quantum = 1024;
q->tin_cnt = 3;
-@@ -2589,32 +2576,33 @@ static int cake_config_diffserv3(struct
+@@ -2586,32 +2573,33 @@ static int cake_config_diffserv3(struct
return 0;
}
break;
}
-@@ -2625,6 +2613,14 @@ static void cake_reconfigure(struct Qdis
+@@ -2622,6 +2610,14 @@ static void cake_reconfigure(struct Qdis
qd->rate_ns = qd->tins[ft].tin_rate_ns;
qd->rate_shft = qd->tins[ft].tin_rate_shft;
/* Access rules:
* state_hw_drive: st_mutex held
* state_hw_mask: st_mutex held
-@@ -861,6 +878,45 @@ static int sfp_read(struct sfp *sfp, boo
+@@ -862,6 +879,45 @@ static int sfp_read(struct sfp *sfp, boo
return sfp->read(sfp, a2, addr, buf, len);
}
static int sfp_write(struct sfp *sfp, bool a2, u8 addr, void *buf, size_t len)
{
return sfp->write(sfp, a2, addr, buf, len);
-@@ -3159,9 +3215,30 @@ static int sfp_probe(struct platform_dev
+@@ -3160,9 +3216,30 @@ static int sfp_probe(struct platform_dev
sfp->get_state = sfp_gpio_get_state;
sfp->set_state = sfp_gpio_set_state;
+++ /dev/null
-From 0b7b378ce6cafbb948786cb6f17f406d94016c8c Mon Sep 17 00:00:00 2001
-From: George Moussalem <george.moussalem@outlook.com>
-Date: Mon, 8 Jun 2026 11:22:08 +0400
-Subject: [PATCH] net: dsa: qca8k: fix led devicename when using external mdio
- bus
-
-The qca8k dsa switch can use either an external or internal mdio bus.
-This depends on whether the mdio node is defined under the switch node
-itself. Upon registering the internal mdio bus, the internal_mdio_bus
-of the dsa switch is assigned to this bus. When an external mdio bus is
-used, the driver still uses the internal_mdio_bus id which is used to
-create the device names of the leds.
-This leads to the leds being prefixed with '(efault)' as the
-internal_mii_bus is null. So let's fix this by adding a null check and
-use the devicename of the external bus instead when an external bus is
-configured.
-
-Fixes: 1e264f9d2918 ("net: dsa: qca8k: add LEDs basic support")
-Signed-off-by: George Moussalem <george.moussalem@outlook.com>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-Link: https://patch.msgid.link/20260608-qca8k-leds-fix-v3-1-a915bb2f37ae@outlook.com
-Signed-off-by: Jakub Kicinski <kuba@kernel.org>
----
- drivers/net/dsa/qca/qca8k-leds.c | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
---- a/drivers/net/dsa/qca/qca8k-leds.c
-+++ b/drivers/net/dsa/qca/qca8k-leds.c
-@@ -429,7 +429,8 @@ qca8k_parse_port_leds(struct qca8k_priv
- init_data.fwnode = led;
- init_data.devname_mandatory = true;
- init_data.devicename = kasprintf(GFP_KERNEL, "%s:0%d",
-- priv->internal_mdio_bus->id,
-+ priv->internal_mdio_bus ?
-+ priv->internal_mdio_bus->id : priv->bus->id,
- port_num);
- if (!init_data.devicename) {
- fwnode_handle_put(led);
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
-@@ -1494,6 +1516,168 @@ static int rtl822xb_c45_read_status(stru
+@@ -1495,6 +1517,168 @@ static int rtl822xb_c45_read_status(stru
return 0;
}
static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
{
int val;
-@@ -1971,11 +2155,14 @@ static struct phy_driver realtek_drvs[]
+@@ -1972,11 +2156,14 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001ccad0),
.name = "RTL8224 2.5Gbps PHY",
#define RTL8224_MII_RTCT 0x11
#define RTL8224_MII_RTCT_ENABLE BIT(0)
#define RTL8224_MII_RTCT_PAIR_A BIT(4)
-@@ -1921,6 +1926,53 @@ static irqreturn_t rtl9000a_handle_inter
+@@ -1922,6 +1927,53 @@ static irqreturn_t rtl9000a_handle_inter
return IRQ_HANDLED;
}
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
-@@ -2095,6 +2147,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2096,6 +2148,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -2119,6 +2173,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2120,6 +2174,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vm_cg_c45_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C45)",
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1976,7 +1976,7 @@ static irqreturn_t rtl8221b_handle_inter
+@@ -1977,7 +1977,7 @@ static irqreturn_t rtl8221b_handle_inter
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
-@@ -2102,7 +2102,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2103,7 +2103,7 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.get_rate_matching = rtl822xb_get_rate_matching,
.read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
-@@ -2111,112 +2111,112 @@ static struct phy_driver realtek_drvs[]
+@@ -2112,112 +2112,112 @@ static struct phy_driver realtek_drvs[]
.write_page = rtl821x_write_page,
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.cable_test_start = rtl8224_cable_test_start,
.cable_test_get_status = rtl8224_cable_test_get_status,
}, {
-@@ -2235,7 +2235,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2236,7 +2236,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001ccb00),
.name = "RTL9000AA_RTL9000AN Ethernet",
static int rtl822xb_get_rate_matching(struct phy_device *phydev,
phy_interface_t iface)
{
-@@ -2103,6 +2156,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2104,6 +2157,8 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
-@@ -2116,6 +2171,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2117,6 +2172,8 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,
.config_init = rtl822x_config_init,
.read_status = rtl822xb_c45_read_status,
.suspend = genphy_c45_pma_suspend,
.resume = rtlgen_c45_resume,
-@@ -2125,6 +2182,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2126,6 +2183,8 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
-@@ -2138,6 +2197,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2139,6 +2198,8 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
-@@ -2151,6 +2212,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2152,6 +2213,8 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,
-@@ -2164,6 +2227,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2165,6 +2228,8 @@ static struct phy_driver realtek_drvs[]
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.read_status = rtl822xb_read_status,
.suspend = genphy_suspend,
-@@ -2177,6 +2242,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2178,6 +2243,8 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool gen1)
{
bool has_2500, has_sgmii;
-@@ -2150,6 +2222,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2151,6 +2223,8 @@ static struct phy_driver realtek_drvs[]
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
.match_phy_device = rtl8221b_match_phy_device,
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
-@@ -2164,6 +2238,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2165,6 +2239,8 @@ static struct phy_driver realtek_drvs[]
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
-@@ -2176,6 +2252,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2177,6 +2253,8 @@ static struct phy_driver realtek_drvs[]
.read_status = rtl822xb_c45_read_status,
.suspend = genphy_c45_pma_suspend,
.resume = rtlgen_c45_resume,
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
-@@ -2190,6 +2268,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2191,6 +2269,8 @@ static struct phy_driver realtek_drvs[]
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
-@@ -2205,6 +2285,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2206,6 +2286,8 @@ static struct phy_driver realtek_drvs[]
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
-@@ -2235,6 +2317,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2236,6 +2318,8 @@ static struct phy_driver realtek_drvs[]
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
#include "realtek.h"
-@@ -2099,6 +2100,45 @@ static irqreturn_t rtl8221b_handle_inter
+@@ -2100,6 +2101,45 @@ static irqreturn_t rtl8221b_handle_inter
return IRQ_HANDLED;
}
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
-@@ -2357,6 +2397,20 @@ static struct phy_driver realtek_drvs[]
+@@ -2358,6 +2398,20 @@ static struct phy_driver realtek_drvs[]
.suspend = genphy_suspend,
.resume = rtlgen_resume,
.read_page = rtl821x_read_page,
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -2315,6 +2315,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2316,6 +2316,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
-@@ -2347,6 +2349,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2348,6 +2350,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vm_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1880,28 +1880,18 @@ static int rtl8221b_match_phy_device(str
+@@ -1881,28 +1881,18 @@ static int rtl8221b_match_phy_device(str
return phydev->phy_id == RTL_8221B && rtlgen_supports_mmd(phydev);
}
}
static int rtl_internal_nbaset_match_phy_device(struct phy_device *phydev,
-@@ -2324,27 +2314,8 @@ static struct phy_driver realtek_drvs[]
+@@ -2325,27 +2315,8 @@ static struct phy_driver realtek_drvs[]
.read_mmd = rtl822xb_read_mmd,
.write_mmd = rtl822xb_write_mmd,
}, {
.config_intr = rtl8221b_config_intr,
.handle_interrupt = rtl8221b_handle_interrupt,
.probe = rtl822x_probe,
-@@ -2357,28 +2328,13 @@ static struct phy_driver realtek_drvs[]
+@@ -2358,28 +2329,13 @@ static struct phy_driver realtek_drvs[]
.read_status = rtl822xb_c45_read_status,
.suspend = genphy_c45_pma_suspend,
.resume = rtlgen_c45_resume,
.config_intr = rtl8221b_config_intr,
.handle_interrupt = rtl8221b_handle_interrupt,
.probe = rtl822x_probe,
-@@ -2391,6 +2347,10 @@ static struct phy_driver realtek_drvs[]
+@@ -2392,6 +2348,10 @@ static struct phy_driver realtek_drvs[]
.read_status = rtl822xb_c45_read_status,
.suspend = genphy_c45_pma_suspend,
.resume = rtlgen_c45_resume,
if (val < 0)
return val;
-@@ -1623,7 +1622,8 @@ static int rtl822x_c45_read_status(struc
+@@ -1624,7 +1623,8 @@ static int rtl822x_c45_read_status(struc
}
/* Read actual speed from vendor register. */
if (val < 0)
return val;
-@@ -2127,7 +2127,7 @@ static int rtlgen_sfp_read_status(struct
+@@ -2128,7 +2128,7 @@ static int rtlgen_sfp_read_status(struct
if (!phydev->link)
return 0;
--- a/scripts/kconfig/conf.c
+++ b/scripts/kconfig/conf.c
-@@ -312,6 +312,9 @@ static int conf_askvalue(struct symbol *
+@@ -310,6 +310,9 @@ static int conf_askvalue(struct symbol *
}
/* fall through */
default:
fflush(stdout);
xfgets(line, sizeof(line), stdin);
break;
-@@ -470,6 +473,9 @@ static void conf_choice(struct menu *men
+@@ -468,6 +471,9 @@ static void conf_choice(struct menu *men
}
/* fall through */
case oldaskconfig:
return connmark_tg_shift(skb, info);
}
-@@ -168,6 +195,16 @@ static struct xt_target connmark_tg_reg[
+@@ -178,6 +205,16 @@ static struct xt_target connmark_tg_reg[
.destroy = connmark_tg_destroy,
.me = THIS_MODULE,
},
#if IS_ENABLED(CONFIG_IP6_NF_IPTABLES)
{
.name = "CONNMARK",
-@@ -189,6 +226,16 @@ static struct xt_target connmark_tg_reg[
+@@ -199,6 +236,16 @@ static struct xt_target connmark_tg_reg[
.destroy = connmark_tg_destroy,
.me = THIS_MODULE,
},
depends on NETFILTER_ADVANCED
--- a/net/netfilter/Makefile
+++ b/net/netfilter/Makefile
-@@ -167,6 +167,7 @@ obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIF
+@@ -168,6 +168,7 @@ obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIF
obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o
obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o
obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o
+#endif /* _XT_FLOWOFFLOAD_H */
--- a/include/net/netfilter/nf_flow_table.h
+++ b/include/net/netfilter/nf_flow_table.h
-@@ -295,6 +295,11 @@ void nf_flow_table_free(struct nf_flowta
+@@ -301,6 +301,11 @@ void nf_flow_table_free(struct nf_flowta
void flow_offload_teardown(struct flow_offload *flow);
--- a/net/sched/sch_fq_codel.c
+++ b/net/sched/sch_fq_codel.c
-@@ -475,7 +475,11 @@ static int fq_codel_init(struct Qdisc *s
+@@ -512,7 +512,11 @@ static int fq_codel_init(struct Qdisc *s
sch->limit = 10*1024;
q->flows_cnt = 1024;
--- a/net/netfilter/nf_conntrack_core.c
+++ b/net/netfilter/nf_conntrack_core.c
-@@ -2640,7 +2640,7 @@ int nf_conntrack_init_start(void)
+@@ -2597,7 +2597,7 @@ int nf_conntrack_init_start(void)
if (!nf_conntrack_htable_size) {
nf_conntrack_htable_size
/* struct cobalt_params - contains codel and blue parameters
* @interval: codel initial drop rate
-@@ -2019,7 +2022,7 @@ static struct sk_buff *cake_dequeue(stru
+@@ -2016,7 +2019,7 @@ static struct sk_buff *cake_dequeue(stru
u32 len;
if (q->config->is_shared && q->rate_ns &&
struct net_device *dev = qdisc_dev(sch);
struct cake_sched_data *other_priv;
u64 new_rate = q->config->rate_bps;
-@@ -3361,8 +3364,13 @@ static int __init cake_module_init(void)
+@@ -3358,8 +3361,13 @@ static int __init cake_module_init(void)
return ret;
ret = register_qdisc(&cake_mq_qdisc_ops);
return ret;
}
-@@ -3371,6 +3379,7 @@ static void __exit cake_module_exit(void
+@@ -3368,6 +3376,7 @@ static void __exit cake_module_exit(void
{
unregister_qdisc(&cake_qdisc_ops);
unregister_qdisc(&cake_mq_qdisc_ops);
};
/* Specifies the type of the struct net_device::ml_priv pointer */
-@@ -2244,6 +2245,11 @@ struct net_device {
+@@ -2246,6 +2247,11 @@ struct net_device {
const struct tlsdev_ops *tlsdev_ops;
#endif
unsigned int operstate;
unsigned char link_mode;
-@@ -2320,6 +2326,10 @@ struct net_device {
+@@ -2322,6 +2328,10 @@ struct net_device {
struct psp_dev __rcu *psp_dev;
#endif
--- a/net/core/sock.c
+++ b/net/core/sock.c
-@@ -4358,6 +4358,8 @@ static __net_initdata struct pernet_oper
+@@ -4353,6 +4353,8 @@ static __net_initdata struct pernet_oper
static int __init proto_init(void)
{
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
-@@ -1652,7 +1652,7 @@ static void device_links_purge(struct de
+@@ -1717,7 +1717,7 @@ static void device_links_purge(struct de
#define FW_DEVLINK_FLAGS_RPM (FW_DEVLINK_FLAGS_ON | \
DL_FLAG_PM_RUNTIME)
-LINUX_VERSION-6.18 = .39
-LINUX_KERNEL_HASH-6.18.39 = a7a7e3d2ae9d95e74197223a8d4eb5f6be7aac21b6e6de27e9685d001c1f8cb0
+LINUX_VERSION-6.18 = .40
+LINUX_KERNEL_HASH-6.18.40 = 3712fc1ec839e4daac981176c8518912e8f452650aaedfe4381da4419613a431
child->size = child->part.size;
--- a/drivers/mtd/spi-nor/Kconfig
+++ b/drivers/mtd/spi-nor/Kconfig
-@@ -10,6 +10,16 @@ menuconfig MTD_SPI_NOR
+@@ -9,6 +9,16 @@ menuconfig MTD_SPI_NOR
if MTD_SPI_NOR
}
static int ip6_tnl_newlink(struct net_device *dev,
-@@ -2123,6 +2342,12 @@ static void ip6_tnl_dellink(struct net_d
+@@ -2126,6 +2345,12 @@ static void ip6_tnl_dellink(struct net_d
static size_t ip6_tnl_get_size(const struct net_device *dev)
{
return
/* IFLA_IPTUN_LINK */
nla_total_size(4) +
-@@ -2152,6 +2377,24 @@ static size_t ip6_tnl_get_size(const str
+@@ -2155,6 +2380,24 @@ static size_t ip6_tnl_get_size(const str
nla_total_size(0) +
/* IFLA_IPTUN_FWMARK */
nla_total_size(4) +
0;
}
-@@ -2159,6 +2402,9 @@ static int ip6_tnl_fill_info(struct sk_b
+@@ -2162,6 +2405,9 @@ static int ip6_tnl_fill_info(struct sk_b
{
struct ip6_tnl *tunnel = netdev_priv(dev);
struct __ip6_tnl_parm *parm = &tunnel->parms;
if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) ||
nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) ||
-@@ -2168,9 +2414,27 @@ static int ip6_tnl_fill_info(struct sk_b
+@@ -2171,9 +2417,27 @@ static int ip6_tnl_fill_info(struct sk_b
nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) ||
nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) ||
nla_put_u8(skb, IFLA_IPTUN_PROTO, parm->proto) ||
if (nla_put_u16(skb, IFLA_IPTUN_ENCAP_TYPE, tunnel->encap.type) ||
nla_put_be16(skb, IFLA_IPTUN_ENCAP_SPORT, tunnel->encap.sport) ||
nla_put_be16(skb, IFLA_IPTUN_ENCAP_DPORT, tunnel->encap.dport) ||
-@@ -2210,6 +2474,7 @@ static const struct nla_policy ip6_tnl_p
+@@ -2213,6 +2477,7 @@ static const struct nla_policy ip6_tnl_p
[IFLA_IPTUN_ENCAP_DPORT] = { .type = NLA_U16 },
[IFLA_IPTUN_COLLECT_METADATA] = { .type = NLA_FLAG },
[IFLA_IPTUN_FWMARK] = { .type = NLA_U32 },
/*
* Allocate a dst for local (unicast / anycast) address.
*/
-@@ -5209,7 +5239,8 @@ static int rtm_to_fib6_config(struct sk_
+@@ -5212,7 +5242,8 @@ static int rtm_to_fib6_config(struct sk_
if (rtm->rtm_type == RTN_UNREACHABLE ||
rtm->rtm_type == RTN_BLACKHOLE ||
rtm->rtm_type == RTN_PROHIBIT ||
cfg->fc_flags |= RTF_REJECT;
if (rtm->rtm_type == RTN_LOCAL)
-@@ -6480,6 +6511,8 @@ static int ip6_route_dev_notify(struct n
+@@ -6483,6 +6514,8 @@ static int ip6_route_dev_notify(struct n
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.ip6_prohibit_entry->dst.dev = dev;
net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
#endif
-@@ -6491,6 +6524,7 @@ static int ip6_route_dev_notify(struct n
+@@ -6494,6 +6527,7 @@ static int ip6_route_dev_notify(struct n
in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
#endif
}
-@@ -6686,6 +6720,8 @@ static int __net_init ip6_route_net_init
+@@ -6689,6 +6723,8 @@ static int __net_init ip6_route_net_init
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.fib6_has_custom_rules = false;
net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
sizeof(*net->ipv6.ip6_prohibit_entry),
GFP_KERNEL);
-@@ -6696,11 +6732,21 @@ static int __net_init ip6_route_net_init
+@@ -6699,11 +6735,21 @@ static int __net_init ip6_route_net_init
ip6_template_metrics, true);
INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->dst.rt_uncached);
net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
ip6_template_metrics, true);
-@@ -6727,6 +6773,8 @@ out:
+@@ -6730,6 +6776,8 @@ out:
return ret;
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
out_ip6_prohibit_entry:
kfree(net->ipv6.ip6_prohibit_entry);
out_ip6_null_entry:
-@@ -6746,6 +6794,7 @@ static void __net_exit ip6_route_net_exi
+@@ -6749,6 +6797,7 @@ static void __net_exit ip6_route_net_exi
kfree(net->ipv6.ip6_null_entry);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
kfree(net->ipv6.ip6_prohibit_entry);
kfree(net->ipv6.ip6_blk_hole_entry);
#endif
dst_entries_destroy(&net->ipv6.ip6_dst_ops);
-@@ -6829,6 +6878,9 @@ void __init ip6_route_init_special_entri
+@@ -6832,6 +6881,9 @@ void __init ip6_route_init_special_entri
init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
}
--- a/net/netfilter/nft_flow_offload.c
+++ b/net/netfilter/nft_flow_offload.c
-@@ -494,47 +494,14 @@ static struct nft_expr_type nft_flow_off
+@@ -235,47 +235,14 @@ static struct nft_expr_type nft_flow_off
.owner = THIS_MODULE,
};
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
-@@ -9092,7 +9092,7 @@ static int nft_register_flowtable_ops(st
+@@ -9095,7 +9095,7 @@ static int nft_register_flowtable_ops(st
err = flowtable->data.type->setup(&flowtable->data,
ops->dev, FLOW_BLOCK_BIND);
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -2255,6 +2255,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2256,6 +2256,7 @@ static struct phy_driver realtek_drvs[]
}, {
.name = "RTL8226 2.5Gbps PHY",
.match_phy_device = rtl8226_match_phy_device,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
-@@ -2267,6 +2268,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2268,6 +2269,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_match_phy_device,
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
-@@ -2297,6 +2299,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2298,6 +2300,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
-@@ -2315,6 +2318,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2316,6 +2319,7 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8221B-VB-CG 2.5Gbps PHY",
.config_intr = rtl8221b_config_intr,
.handle_interrupt = rtl8221b_handle_interrupt,
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
.inband_caps = rtl822x_inband_caps,
-@@ -2334,6 +2338,7 @@ static struct phy_driver realtek_drvs[]
+@@ -2335,6 +2339,7 @@ static struct phy_driver realtek_drvs[]
.name = "RTL8221B-VM-CG 2.5Gbps PHY",
.config_intr = rtl8221b_config_intr,
.handle_interrupt = rtl8221b_handle_interrupt,
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1823,9 +1823,11 @@ static bool rtlgen_supports_2_5gbps(stru
+@@ -1824,9 +1824,11 @@ static bool rtlgen_supports_2_5gbps(stru
{
int val;
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1908,10 +1908,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1909,10 +1909,32 @@ static int rtl8226_match_phy_device(stru
static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
bool is_c45)
{
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1604,6 +1604,9 @@ static int rtl822x_c45_get_features(stru
+@@ -1605,6 +1605,9 @@ static int rtl822x_c45_get_features(stru
linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
phydev->supported);
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
-@@ -2304,7 +2304,7 @@ struct net_device {
+@@ -2306,7 +2306,7 @@ struct net_device {
#if IS_ENABLED(CONFIG_AX25)
struct ax25_dev __rcu *ax25_ptr;
#endif
foe_flow_size = (MTK_PPE_ENTRIES / soc->hash_offset) *
@@ -928,6 +929,7 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_
if (!mib)
- return NULL;
+ goto err_free_l2_flows;
+ memset(mib, 0, MTK_PPE_ENTRIES * sizeof(*mib));
ppe->mib_table = mib;
MODULE_DESCRIPTION("Realtek PHY driver");
MODULE_AUTHOR("Johnson Leung");
MODULE_LICENSE("GPL");
-@@ -1993,6 +2012,125 @@ static int rtl8251b_c45_match_phy_device
+@@ -1994,6 +2013,125 @@ static int rtl8251b_c45_match_phy_device
return rtlgen_is_c45_match(phydev, RTL_8251B, true);
}
static int rtlgen_resume(struct phy_device *phydev)
{
int ret = genphy_resume(phydev);
-@@ -2214,6 +2352,482 @@ static int rtlgen_sfp_config_aneg(struct
+@@ -2215,6 +2353,482 @@ static int rtlgen_sfp_config_aneg(struct
return 0;
}
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
-@@ -2520,6 +3134,108 @@ static struct phy_driver realtek_drvs[]
+@@ -2521,6 +3135,108 @@ static struct phy_driver realtek_drvs[]
.resume = genphy_resume,
.read_mmd = genphy_read_mmd_unsupported,
.write_mmd = genphy_write_mmd_unsupported,
/* show configuration fields */
#define pci_config_attr(field, format_string) \
-@@ -1673,12 +1675,32 @@ static const struct attribute_group pci_
+@@ -1660,12 +1662,32 @@ static const struct attribute_group pci_
.is_visible = resource_resize_is_visible,
};
}
/**
-@@ -1699,21 +1721,23 @@ static int __init pci_sysfs_init(void)
+@@ -1686,21 +1708,23 @@ static int __init pci_sysfs_init(void)
{
struct pci_dev *pdev = NULL;
struct pci_bus *pbus = NULL;
/**
* ata_build_rw_tf - Build ATA taskfile for given read/write request
* @qc: Metadata associated with the taskfile to build
-@@ -4867,6 +4878,9 @@ void __ata_qc_complete(struct ata_queued
+@@ -4882,6 +4893,9 @@ void __ata_qc_complete(struct ata_queued
link->active_tag = ATA_TAG_POISON;
ap->nr_active_links--;
}
/* clear exclusive status */
if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
-@@ -5596,6 +5610,9 @@ struct ata_port *ata_port_alloc(struct a
+@@ -5611,6 +5625,9 @@ struct ata_port *ata_port_alloc(struct a
ap->stats.unhandled_irq = 1;
ap->stats.idle_irq = 1;
#endif
ata_sff_port_init(ap);
ata_force_pflags(ap);
-@@ -5612,6 +5629,12 @@ void ata_port_free(struct ata_port *ap)
+@@ -5627,6 +5644,12 @@ void ata_port_free(struct ata_port *ap)
kfree(ap->pmp_link);
kfree(ap->slave_link);
ida_free(&ata_ida, ap->print_id);
kfree(ap);
}
EXPORT_SYMBOL_GPL(ata_port_free);
-@@ -6016,7 +6039,23 @@ int ata_host_register(struct ata_host *h
+@@ -6031,7 +6054,23 @@ int ata_host_register(struct ata_host *h
WARN_ON(1);
return -EINVAL;
}
rtnl_lock();
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
-@@ -1991,7 +1991,7 @@ static int sfp_sm_probe_phy(struct sfp *
+@@ -1992,7 +1992,7 @@ static int sfp_sm_probe_phy(struct sfp *
/* Mark this PHY as being on a SFP module */
phy->is_on_sfp_module = true;
/* Qcom IP rev.: 2.3.3 Synopsys IP rev.: 4.30a */
static const struct qcom_pcie_ops ops_2_3_3 = {
.get_resources = qcom_pcie_get_resources_2_3_3,
-@@ -1457,6 +1544,10 @@ static const struct qcom_pcie_cfg cfg_2_
+@@ -1458,6 +1545,10 @@ static const struct qcom_pcie_cfg cfg_2_
.ops = &ops_2_4_0,
};
static const struct qcom_pcie_cfg cfg_2_7_0 = {
.ops = &ops_2_7_0,
};
-@@ -2022,6 +2113,7 @@ static const struct of_device_id qcom_pc
+@@ -2023,6 +2114,7 @@ static const struct of_device_id qcom_pc
{ .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 },
{ .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 },
{ .compatible = "qcom,pcie-ipq4019", .data = &cfg_2_4_0 },
(transaction layer end-to-end CRC checking).
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
-@@ -1654,6 +1654,8 @@ void pci_walk_bus(struct pci_bus *top, i
+@@ -1655,6 +1655,8 @@ void pci_walk_bus(struct pci_bus *top, i
void *userdata);
int pci_cfg_space_size(struct pci_dev *dev);
unsigned char pci_bus_max_busnr(struct pci_bus *bus);
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
-@@ -859,9 +859,9 @@ static const struct flash_info spansion_
+@@ -861,9 +861,9 @@ static const struct flash_info spansion_
.name = "s25fs512s",
.size = SZ_64M,
.sector_size = SZ_256K,
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
-@@ -601,9 +601,9 @@ static void mtk_pcie_intr_handler(struct
+@@ -604,9 +604,9 @@ static void mtk_pcie_intr_handler(struct
if (status & INTX_MASK) {
for_each_set_bit_from(bit, &status, PCI_NUM_INTX + INTX_SHIFT) {
/* Clear the INTx */
};
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
-@@ -21,6 +21,7 @@
+@@ -22,6 +22,7 @@
#include <linux/of_address.h>
#include <linux/of_pci.h>
#include <linux/of_platform.h>
#include <linux/pci.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
-@@ -140,6 +141,11 @@
+@@ -141,6 +142,11 @@
#define PCIE_LINK_STATUS_V2 0x804
#define PCIE_PORT_LINKUP_V2 BIT(10)
struct mtk_pcie_port;
/**
-@@ -1051,6 +1057,27 @@ static int mtk_pcie_setup(struct mtk_pci
+@@ -1062,6 +1068,27 @@ static int mtk_pcie_setup(struct mtk_pci
struct mtk_pcie_port *port, *tmp;
int err, slot;
ret = mtk_wed_get_reserved_memory_region(wo->hw, mem_region[i].name,
&mem_region[i]);
if (ret)
-@@ -364,13 +381,13 @@ mtk_wed_mcu_load_firmware(struct mtk_wed
+@@ -364,17 +381,17 @@ mtk_wed_mcu_load_firmware(struct mtk_wed
boot_cr = MTK_WO_MCU_CFG_LS_WA_BOOT_ADDR_ADDR;
else
boot_cr = MTK_WO_MCU_CFG_LS_WM_BOOT_ADDR_ADDR;
- wo_w32(MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, 0xc00);
+ wo_w32(wo, MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, 0xc00);
-- val = wo_r32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR) |
-+ val = wo_r32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR) |
- MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK;
+- val = wo_r32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR);
++ val = wo_r32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR);
+
+ if (!mtk_wed_is_v3_or_greater(wo->hw) && wo->hw->index)
+ val |= MTK_WO_MCU_CFG_LS_WF_WM_WA_WA_CPU_RSTB_MASK;
+ else
+ val |= MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK;
- wo_w32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val);
+ wo_w32(wo, MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val);
out:
static const struct cmn_pll_fixed_output_clk ipq5424_output_clks[] = {
CLK_PLL_OUTPUT(IPQ5424_XO_24MHZ_CLK, "xo-24mhz", 24000000UL),
CLK_PLL_OUTPUT(IPQ5424_SLEEP_32KHZ_CLK, "sleep-32khz", 32000UL),
-@@ -448,6 +455,7 @@ static const struct dev_pm_ops ipq_cmn_p
+@@ -455,6 +462,7 @@ static const struct dev_pm_ops ipq_cmn_p
static const struct of_device_id ipq_cmn_pll_clk_ids[] = {
{ .compatible = "qcom,ipq5018-cmn-pll", .data = &ipq5018_output_clks },
{ .compatible = "qcom,ipq5424-cmn-pll", .data = &ipq5424_output_clks },
static const struct cmn_pll_fixed_output_clk ipq5424_output_clks[] = {
CLK_PLL_OUTPUT(IPQ5424_XO_24MHZ_CLK, "xo-24mhz", 24000000UL),
CLK_PLL_OUTPUT(IPQ5424_SLEEP_32KHZ_CLK, "sleep-32khz", 32000UL),
-@@ -456,6 +463,7 @@ static const struct of_device_id ipq_cmn
+@@ -463,6 +470,7 @@ static const struct of_device_id ipq_cmn
{ .compatible = "qcom,ipq5018-cmn-pll", .data = &ipq5018_output_clks },
{ .compatible = "qcom,ipq5424-cmn-pll", .data = &ipq5424_output_clks },
{ .compatible = "qcom,ipq6018-cmn-pll", .data = &ipq6018_output_clks },
+++ /dev/null
-From 88c543fff756450bcd04ec4560c4440be36c9e75 Mon Sep 17 00:00:00 2001
-From: Luo Jie <jie.luo@oss.qualcomm.com>
-Date: Tue, 6 Jan 2026 21:35:10 -0800
-Subject: [PATCH] clk: qcom: cmnpll: Account for reference clock divider
-
-The clk_cmn_pll_recalc_rate() function must account for the reference clock
-divider programmed in CMN_PLL_REFCLK_CONFIG. Without this fix, platforms
-with a reference divider other than 1 calculate incorrect CMN PLL rates.
-For example, on IPQ5332 where the reference divider is 2, the computed rate
-becomes twice the actual output.
-
-Read CMN_PLL_REFCLK_DIV and divide the parent rate by this value before
-applying the 2 * FACTOR scaling. This yields the correct rate calculation:
-rate = (parent_rate / ref_div) * 2 * factor.
-
-Maintain backward compatibility with earlier platforms (e.g. IPQ9574,
-IPQ5424, IPQ5018) that use ref_div = 1.
-
-Fixes: f81715a4c87c ("clk: qcom: Add CMN PLL clock controller driver for IPQ SoC")
-Signed-off-by: Luo Jie <jie.luo@oss.qualcomm.com>
-Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
-Tested-by: George Moussalem <george.moussalem@outlook.com>
-Link: https://lore.kernel.org/r/20260106-qcom_ipq5332_cmnpll-v2-1-f9f7e4efbd79@oss.qualcomm.com
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
----
- drivers/clk/qcom/ipq-cmn-pll.c | 11 +++++++++--
- 1 file changed, 9 insertions(+), 2 deletions(-)
-
---- a/drivers/clk/qcom/ipq-cmn-pll.c
-+++ b/drivers/clk/qcom/ipq-cmn-pll.c
-@@ -199,7 +199,7 @@ static unsigned long clk_cmn_pll_recalc_
- unsigned long parent_rate)
- {
- struct clk_cmn_pll *cmn_pll = to_clk_cmn_pll(hw);
-- u32 val, factor;
-+ u32 val, factor, ref_div;
-
- /*
- * The value of CMN_PLL_DIVIDER_CTRL_FACTOR is automatically adjusted
-@@ -207,8 +207,15 @@ static unsigned long clk_cmn_pll_recalc_
- */
- regmap_read(cmn_pll->regmap, CMN_PLL_DIVIDER_CTRL, &val);
- factor = FIELD_GET(CMN_PLL_DIVIDER_CTRL_FACTOR, val);
-+ if (WARN_ON(factor == 0))
-+ factor = 1;
-
-- return parent_rate * 2 * factor;
-+ regmap_read(cmn_pll->regmap, CMN_PLL_REFCLK_CONFIG, &val);
-+ ref_div = FIELD_GET(CMN_PLL_REFCLK_DIV, val);
-+ if (WARN_ON(ref_div == 0))
-+ ref_div = 1;
-+
-+ return div_u64((u64)parent_rate * 2 * factor, ref_div);
- }
-
- static int clk_cmn_pll_determine_rate(struct clk_hw *hw,
#include <media/jpeg.h>
#include <media/v4l2-common.h>
-@@ -1344,9 +1349,149 @@ static void uvc_video_decode_data(struct
+@@ -1384,9 +1389,149 @@ static void uvc_video_decode_data(struct
uvc_urb->async_operations++;
}
/* Mark the buffer as done if the EOF marker is set. */
if (data[1] & UVC_STREAM_EOF && buf->bytesused != 0) {
uvc_dbg(stream->dev, FRAME, "Frame complete (EOF found)\n");
-@@ -1890,6 +2035,8 @@ static int uvc_init_video_isoc(struct uv
+@@ -1931,6 +2076,8 @@ static int uvc_init_video_isoc(struct uv
if (npackets == 0)
return -ENOMEM;
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
-@@ -1890,6 +1893,66 @@ static int rtl8224_cable_test_get_status
+@@ -1891,6 +1894,66 @@ static int rtl8224_cable_test_get_status
return rtl8224_cable_test_report(phydev, finished);
}
static bool rtlgen_supports_2_5gbps(struct phy_device *phydev)
{
int val;
-@@ -3086,6 +3149,8 @@ static struct phy_driver realtek_drvs[]
+@@ -3087,6 +3150,8 @@ static struct phy_driver realtek_drvs[]
PHY_ID_MATCH_EXACT(0x001ccad0),
.name = "RTL8224 2.5Gbps PHY",
.flags = PHY_POLL_CABLE_TEST,
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
-@@ -1941,9 +1942,40 @@ static int rtl8224_mdi_config_order(stru
+@@ -1942,9 +1943,40 @@ static int rtl8224_mdi_config_order(stru
order ? BIT(port_offset) : 0);
}
static int rtl822x_set_serdes_option_mode(struct phy_device *phydev, bool gen1)
{
bool has_2500, has_sgmii;
-@@ -3073,6 +3226,7 @@ static struct phy_driver realtek_drvs[]
+@@ -3074,6 +3227,7 @@ static struct phy_driver realtek_drvs[]
.soft_reset = rtl822x_c45_soft_reset,
.get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
-@@ -1815,6 +1815,7 @@ static int sfp_hwmon_insert(struct sfp *
+@@ -1816,6 +1816,7 @@ static int sfp_hwmon_insert(struct sfp *
sfp->hwmon_tries = R_PROBE_RETRY_SLOW;
}
static void sfp_i2c_mdiobus_destroy(struct sfp *sfp)
{
mdiobus_unregister(sfp->i2c_mii);
-@@ -2173,9 +2196,15 @@ static void sfp_sm_fault(struct sfp *sfp
+@@ -2174,9 +2197,15 @@ static void sfp_sm_fault(struct sfp *sfp
static int sfp_sm_add_mdio_bus(struct sfp *sfp)
{
--- a/drivers/net/mdio/Kconfig
+++ b/drivers/net/mdio/Kconfig
-@@ -191,6 +191,16 @@ config MDIO_REGMAP
+@@ -192,6 +192,16 @@ config MDIO_REGMAP
regmap. Users willing to use this driver must explicitly select
REGMAP.
#define RTL8221B_PHYCR1 0xa430
#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
-@@ -2070,6 +2105,147 @@ exit:
+@@ -2071,6 +2106,147 @@ exit:
return ret;
}
static int rtl8224_mdi_config_order(struct phy_device *phydev)
{
struct device_node *np = phydev->mdio.dev.of_node;
-@@ -2124,6 +2300,10 @@ static int rtl8224_config_init(struct ph
+@@ -2125,6 +2301,10 @@ static int rtl8224_config_init(struct ph
{
int ret;
obj-$(CONFIG_MDIO_SUN4I) += mdio-sun4i.o
--- a/drivers/net/mdio/Kconfig
+++ b/drivers/net/mdio/Kconfig
-@@ -191,6 +191,13 @@ config MDIO_REGMAP
+@@ -192,6 +192,13 @@ config MDIO_REGMAP
regmap. Users willing to use this driver must explicitly select
REGMAP.
obj-$(CONFIG_MDIO_THUNDER) += mdio-thunder.o
--- a/drivers/net/mdio/Kconfig
+++ b/drivers/net/mdio/Kconfig
-@@ -208,6 +208,13 @@ config MDIO_REALTEK_OTTO_AUX
+@@ -209,6 +209,13 @@ config MDIO_REALTEK_OTTO_AUX
This driver supports the auxilairy MDIO bus on RTL838x SoCs. This bus
is typically used to attach RTL8231 GPIO extenders.
/* Enable using of 128-bit task descriptors */
dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
-@@ -1468,7 +1555,7 @@ static int dwcmshc_probe(struct platform
+@@ -1471,7 +1558,7 @@ static int dwcmshc_probe(struct platform
priv->vendor_specific_area2 =
sdhci_readw(host, DWCMSHC_P_VENDOR_AREA2);
#include "trace.h"
#include "nvme.h"
-@@ -1368,6 +1369,15 @@ static inline bool nvme_poll_cq(struct n
+@@ -1373,6 +1374,15 @@ static inline bool nvme_poll_cq(struct n
{
bool found = false;
CONFIG_CRYPTO_DEV_ALLWINNER=y
CONFIG_CRYPTO_DEV_SUN4I_SS=y
# CONFIG_CRYPTO_DEV_SUN4I_SS_DEBUG is not set
-CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y
CONFIG_CRYPTO_DEV_SUN8I_CE=y
# CONFIG_CRYPTO_DEV_SUN8I_CE_DEBUG is not set
CONFIG_CRYPTO_DEV_SUN8I_CE_HASH=y
projects / thirdparty / openwrt.git / commitdiff
