]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: renesas: r9a09g057h48-kakip: Enable SPI NOR Flash
authorNobuhiro Iwamatsu <iwamatsu@nigauri.org>
Sat, 1 Nov 2025 07:29:51 +0000 (16:29 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 5 Jan 2026 13:37:17 +0000 (14:37 +0100)
This enables W25Q256JWPIM NOR Flash connected to XSPI.
Additionally, this adds fixed 1.8V regulator node (`reg_1p8v`) required for
NOR Flash.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251101072951.2681630-1-iwamatsu@nigauri.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a09g057h48-kakip.dts

index adf3ab8aef2b559f0b26e7f299d3b31e68d911a5..e8523bb6705a66f6fa94edb371d3362feaff036e 100644 (file)
                reg = <0x0 0x48000000 0x1 0xF8000000>;
        };
 
+       reg_1p8v: regulator-1p8v {
+               compatible = "regulator-fixed";
+               regulator-name = "fixed-1.8V";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               regulator-boot-on;
+               regulator-always-on;
+       };
+
        reg_3p3v: regulator-3v3 {
                compatible = "regulator-fixed";
                regulator-name = "fixed-3.3V";
                        pinmux = <RZV2H_PORT_PINMUX(A, 5, 15)>; /* SD0_CD */
                };
        };
+
+       xspi_pins: xspi0 {
+               ctrl {
+                       pins = "XSPI0_RESET0N", "XSPI0_CS0N", "XSPI0_CKP";
+                       output-enable;
+               };
+
+               io {
+                       pins = "XSPI0_IO0", "XSPI0_IO1", "XSPI0_IO2", "XSPI0_IO3";
+                       renesas,output-impedance = <3>;
+               };
+       };
 };
 
 &qextal_clk {
 
        status = "okay";
 };
+
+&xspi {
+       pinctrl-0 = <&xspi_pins>;
+       pinctrl-names = "default";
+       assigned-clocks = <&cpg CPG_CORE R9A09G057_SPI_CLK_SPI>;
+       assigned-clock-rates = <133333334>;
+       status = "okay";
+
+       flash@0 {
+               /* W25Q256JWPIM */
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               vcc-supply = <&reg_1p8v>;
+               m25p,fast-read;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
+       };
+};