Revert "drm/amd/display: Move setup_stream_attribute"

commit 3126c9ccb4373d8758733c6699ba5ab93dbe5c9d upstream.

This reverts commit 2681bf4ae8d24df950138b8c9ea9c271cd62e414.

This results in a blank screen on the HDMI port on some systems.
Revert for now so as not to regress 6.18, can be addressed
in 6.19 once the issue is root caused.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4652
Cc: Sunpeng.Li@amd.com
Cc: ivan.lipski@amd.com
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit d0e9de7a81503cdde37fb2d37f1d102f9e0f38fb)
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
index 537f5381146075eed7ebb862e4afa9b056058349..39de51cbbde9e5744da23ebc0ef493797946f786 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
@@ -671,7 +671,6 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
        uint32_t early_control = 0;
        struct timing_generator *tg = pipe_ctx->stream_res.tg;
 
-       link_hwss->setup_stream_attribute(pipe_ctx);
        link_hwss->setup_stream_encoder(pipe_ctx);
 
        dc->hwss.update_info_frame(pipe_ctx);

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
index d938170ebabddf11e00241a46e5607a54213eb53..e3525e41c5e8e0bded03f94b57bddc8b0032f7d6 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
@@ -3060,8 +3060,6 @@ void dcn20_enable_stream(struct pipe_ctx *pipe_ctx)
                                                      link_enc->transmitter - TRANSMITTER_UNIPHY_A);
        }
 
-       link_hwss->setup_stream_attribute(pipe_ctx);
-
        if (dc->res_pool->dccg->funcs->set_pixel_rate_div)
                dc->res_pool->dccg->funcs->set_pixel_rate_div(
                        dc->res_pool->dccg,

diff --git a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
index 0fe763704945752d8348447317a2acd6d1bbd192..b95b98cc255348a4ed8ba1e29f7f8c6dc411c3d7 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
@@ -968,8 +968,6 @@ void dcn401_enable_stream(struct pipe_ctx *pipe_ctx)
                }
        }
 
-       link_hwss->setup_stream_attribute(pipe_ctx);
-
        if (dc->res_pool->dccg->funcs->set_pixel_rate_div) {
                dc->res_pool->dccg->funcs->set_pixel_rate_div(
                        dc->res_pool->dccg,

diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
index cb80b4599936001cd6a7f8c681889bf160c3ea5c..8c8682f743d6fd28817e23804a1a9e855a5632d4 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
+++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c
@@ -2458,6 +2458,7 @@ void link_set_dpms_on(
        struct link_encoder *link_enc = pipe_ctx->link_res.dio_link_enc;
        enum otg_out_mux_dest otg_out_dest = OUT_MUX_DIO;
        struct vpg *vpg = pipe_ctx->stream_res.stream_enc->vpg;
+       const struct link_hwss *link_hwss = get_link_hwss(link, &pipe_ctx->link_res);
        bool apply_edp_fast_boot_optimization =
                pipe_ctx->stream->apply_edp_fast_boot_optimization;
 
@@ -2501,6 +2502,8 @@ void link_set_dpms_on(
                pipe_ctx->stream_res.tg->funcs->set_out_mux(pipe_ctx->stream_res.tg, otg_out_dest);
        }
 
+       link_hwss->setup_stream_attribute(pipe_ctx);
+
        pipe_ctx->stream->apply_edp_fast_boot_optimization = false;
 
        // Enable VPG before building infoframe

diff --git a/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
index 6ffc74fc9dcd86be73615ccd85c6b740f7243955..ad088d70e1893220675b91f0234a8d3a66a7adf1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/virtual/virtual_stream_encoder.c
@@ -44,11 +44,6 @@ static void virtual_stream_encoder_dvi_set_stream_attribute(
        struct dc_crtc_timing *crtc_timing,
        bool is_dual_link) {}
 
-static void virtual_stream_encoder_lvds_set_stream_attribute(
-       struct stream_encoder *enc,
-       struct dc_crtc_timing *crtc_timing)
-{}
-
 static void virtual_stream_encoder_set_throttled_vcp_size(
        struct stream_encoder *enc,
        struct fixed31_32 avg_time_slots_per_mtp)
@@ -120,8 +115,6 @@ static const struct stream_encoder_funcs virtual_str_enc_funcs = {
                virtual_stream_encoder_hdmi_set_stream_attribute,
        .dvi_set_stream_attribute =
                virtual_stream_encoder_dvi_set_stream_attribute,
-       .lvds_set_stream_attribute =
-               virtual_stream_encoder_lvds_set_stream_attribute,
        .set_throttled_vcp_size =
                virtual_stream_encoder_set_throttled_vcp_size,
        .update_hdmi_info_packets =