#define ADB_IOP_SRQ 0x04 /* SRQ detected */
#define ADB_IOP_TIMEOUT 0x02 /* nonzero if timeout */
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
struct adb_iopmsg {
__u8 flags; /* ADB flags */
__u8 spare[21]; /* spare */
};
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#include <uapi/asm/bootinfo.h>
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#ifdef CONFIG_BOOTINFO_PROC
extern void save_bootinfo(const struct bi_record *bi);
static inline void process_uboot_commandline(char *commandp, int size) {}
#endif
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* _M68K_BOOTINFO_H */
#include <asm/setup.h>
#include <asm/page.h>
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
#include <asm/thread_info.h>
#endif
#define ALLOWINT (~0x700)
#endif /* machine compilation types */
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
/*
* This defines the normal kernel pt-regs layout.
*
#define KEXEC_ARCH KEXEC_ARCH_68K
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
static inline void crash_setup_regs(struct pt_regs *newregs,
struct pt_regs *oldregs)
/* Dummy implementation for now */
}
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* CONFIG_KEXEC_CORE */
#define BABOON_BASE (0x50F1A000) /* same as IDE controller base */
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
struct baboon {
char pad1[208]; /* generic IDE registers, not used here */
extern void baboon_irq_enable(int);
extern void baboon_irq_disable(int);
-#endif /* __ASSEMBLY **/
+#endif /* __ASSEMBLER__ */
#define IOP_ADDR_ALIVE 0x031F
#define IOP_ADDR_RECV_MSG 0x0320
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/*
* IOP Control registers, staggered because in usual Apple style they were
extern void iop_register_interrupts(void);
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#define OSS_POWEROFF 0x80
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
struct mac_oss {
__u8 irq_level[0x10]; /* [0x000-0x00f] Interrupt levels */
extern void oss_irq_enable(int);
extern void oss_irq_disable(int);
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
* Unknown, always 0x0000.
*/
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
extern volatile __u8 *psc;
return *((volatile __u32 *)(psc + offset));
}
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#define IER_SET_BIT(b) (0x80 | (1<<(b)) )
#define IER_CLR_BIT(b) (0x7F & (1<<(b)) )
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
extern volatile __u8 *via1,*via2;
extern int rbv_present,via_alt_mapping;
extern void via1_set_head(int);
extern int via2_scsi_drq_pending(void);
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* _ASM_MAC_VIA_H_ */
#define PMUNIMPL (1<<PUNIMPL)
#define PMMOVEM (1<<PMOVEM)
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <linux/kernel.h>
#include <linux/sched.h>
#define FPDATA ((struct fp_data *)current->thread.fp)
-#else /* __ASSEMBLY__ */
+#else /* __ASSEMBLER__ */
#define FPDATA %a2
.endm
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* _ASM_M68K_SETUP_H */
#define PTE_MASK PAGE_MASK
#define CF_PAGE_CHG_MASK (PTE_MASK | CF_PAGE_ACCESSED | CF_PAGE_DIRTY)
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#define pmd_pgtable(pmd) pfn_to_virt(pmd_val(pmd) >> PAGE_SHIFT)
#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
#endif /* _MCF_PGTABLE_H */
#define MMUDR_PAN 10 /* Physical address */
#define MMUDR_PAMASK 0xfffffc00 /* PA mask */
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/*
* Simple access functions for the MMU registers. Nothing fancy
/* We borrow bit 11 to store the exclusive marker in swap PTEs. */
#define _PAGE_SWP_EXCLUSIVE 0x800
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/* This is the cache mode to be used for pages containing page descriptors for
* processors >= '040. It is in pte_mknocache(), and the variable is defined
return pte;
}
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
#endif /* _MOTOROLA_PGTABLE_H */
#define NETtel_LEDADDR 0x30400000
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
extern volatile unsigned short ppdata;
#define MCFPP_DTR0 0x0040
#define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/*
* These functions defined to give quasi generic access to the
* PPIO bits used for DTR/DCD.
#define LINUX_OPPROM_MAGIC 0x10010407
#endif
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/* V0 prom device operations. */
struct linux_dev_v0_funcs {
int (*v0_devopen)(char *device_str);
unsigned int or_size;
};
-#endif /* !(__ASSEMBLY__) */
+#endif /* !(__ASSEMBLER__) */
#endif /* !(__SPARC_OPENPROM_H) */
#define PAGE_OFFSET (PAGE_OFFSET_RAW)
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/*
* These are used to make use of C type-checking..
extern unsigned long _ramstart;
extern unsigned long _ramend;
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
#ifdef CONFIG_MMU
#include <asm/page_mm.h>
#ifndef _M68K_PAGE_MM_H
#define _M68K_PAGE_MM_H
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <linux/compiler.h>
#include <asm/module.h>
#define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
#define pfn_valid(pfn) virt_addr_valid(pfn_to_virt(pfn))
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* _M68K_PAGE_MM_H */
#ifndef _M68K_PAGE_NO_H
#define _M68K_PAGE_NO_H
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
extern unsigned long memory_start;
extern unsigned long memory_end;
#define ARCH_PFN_OFFSET PHYS_PFN(PAGE_OFFSET_RAW)
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* _M68K_PAGE_NO_H */
#include <asm/pgtable_mm.h>
#endif
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
extern void paging_init(void);
#endif
#include <asm/setup.h>
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <asm/processor.h>
#include <linux/sched.h>
#include <linux/threads.h>
#define update_mmu_cache(vma, addr, ptep) \
update_mmu_cache_range(NULL, vma, addr, ptep, 1)
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
/* MMU-specific headers */
#include <asm/motorola_pgtable.h>
#endif
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/*
* Macro to mark a page protection value as "uncacheable".
*/
#define pgprot_dmacoherent(prot) pgprot_dmacoherent(prot)
#endif /* CONFIG_COLDFIRE */
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
#endif /* _M68K_PGTABLE_H */
#include <uapi/asm/ptrace.h>
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#ifndef PS_S
#define PS_S (0x2000)
#define arch_has_block_step() (1)
#endif
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* _M68K_PTRACE_H */
#define CL_SIZE COMMAND_LINE_SIZE
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
extern unsigned long m68k_machtype;
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
#if !defined(CONFIG_AMIGA)
# define MACH_IS_AMIGA (0)
#endif
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
extern unsigned long m68k_cputype;
extern unsigned long m68k_fputype;
extern unsigned long m68k_mmutype;
*/
extern int m68k_is040or060;
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
#if !defined(CONFIG_M68020)
# define CPU_IS_020 (0)
#define NUM_MEMINFO 4
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
struct m68k_mem_info {
unsigned long addr; /* physical address of memory chunk */
unsigned long size; /* length of memory chunk (in bytes) */
#include <asm/sun3mmu.h>
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <asm/virtconvert.h>
#include <linux/linkage.h>
#define PTOV(addr) __va(addr)
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
/* These need to be defined for compatibility although the sun3 doesn't use them */
#define _PAGE_NOCACHE030 0x040
/* We borrow bit 6 to store the exclusive marker in swap PTEs. */
#define _PAGE_SWP_EXCLUSIVE 0x040
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
return pte;
}
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
#endif /* !_SUN3_PGTABLE_H */
#define SUN3_BUSERR_PROTERR (0x40)
#define SUN3_BUSERR_INVALID (0x80)
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/* Read bus error status register (implicitly clearing it). */
static inline unsigned char sun3_get_buserr(void)
extern int sun3_map_test(unsigned long addr, char *val);
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
#endif /* !__SUN3_MMU_H__ */
#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
struct thread_info {
struct task_struct *task; /* main task structure */
__u32 cpu; /* should always be 0 on m68k */
unsigned long tp_value; /* thread pointer */
};
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#define INIT_THREAD_INFO(tsk) \
{ \
.preempt_count = INIT_PREEMPT_COUNT, \
}
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/* how to get the thread information struct from C */
static inline struct thread_info *current_thread_info(void)
{
#ifndef _M68K_TRAPS_H
#define _M68K_TRAPS_H
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#include <linux/linkage.h>
#include <asm/ptrace.h>
#define VECOFF(vec) ((vec)<<2)
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
/* Status register bits */
#define PS_T (0x8000)
asmlinkage void berr_040cleanup(struct frame *fp);
#endif
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* _M68K_TRAPS_H */
#ifndef _FP_EMU_H
#define _FP_EMU_H
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
#include <asm/asm-offsets.h>
#endif
#include <asm/math-emu.h>
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
#define IS_INF(a) ((a)->exp == 0x7fff)
#define IS_ZERO(a) ((a)->mant.m64 == 0)
: "a1", "d1", "d2", "memory"); \
})
-#else /* __ASSEMBLY__ */
+#else /* __ASSEMBLER__ */
/*
* set, reset or clear a bit in the fp status register
btst #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
.endm
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
#endif /* _FP_EMU_H */