]> git.ipfire.org Git - thirdparty/zlib-ng.git/commitdiff
Rename most ACLE references to ARMv8
authorCameron Cawley <ccawley2011@gmail.com>
Thu, 29 Feb 2024 18:34:01 +0000 (18:34 +0000)
committerHans Kristian Rosbach <hk-github@circlestorm.org>
Wed, 12 Feb 2025 12:54:30 +0000 (13:54 +0100)
17 files changed:
.github/workflows/cmake.yml
.github/workflows/configure.yml
CMakeLists.txt
README.md
arch/arm/Makefile.in
arch/arm/acle_intrins.h
arch/arm/arm_features.c
arch/arm/arm_functions.h
arch/arm/crc32_armv8.c [moved from arch/arm/crc32_acle.c with 90% similarity]
cmake/detect-intrinsics.cmake
configure
functable.c
test/CMakeLists.txt
test/benchmarks/benchmark_crc32.cc
test/test_crc32.cc
win32/Makefile.a64
win32/Makefile.arm

index 90e222a6fcd5c30eed269bf1f4d25ce87fc96aae..d1ddb0f28f7d7314fa3a428bbcbfa19473901fd7 100644 (file)
@@ -170,13 +170,13 @@ jobs:
             gcov-exec: arm-linux-gnueabihf-gcov
             codecov: ubuntu_gcc_armhf
 
-          - name: Ubuntu GCC ARM HF No ACLE ASAN
+          - name: Ubuntu GCC ARM HF No ARMv8 ASAN
             os: ubuntu-latest
-            cmake-args: -DCMAKE_TOOLCHAIN_FILE=cmake/toolchain-armhf.cmake -DWITH_ACLE=OFF -DWITH_SANITIZER=Address
+            cmake-args: -DCMAKE_TOOLCHAIN_FILE=cmake/toolchain-armhf.cmake -DWITH_ARMV8=OFF -DWITH_SANITIZER=Address
             asan-options: detect_leaks=0
             packages: qemu-user crossbuild-essential-armhf
             gcov-exec: arm-linux-gnueabihf-gcov
-            codecov: ubuntu_gcc_armhf_no_acle
+            codecov: ubuntu_gcc_armhf_no_armv8
 
           - name: Ubuntu GCC ARM HF No NEON ASAN
             os: ubuntu-latest
@@ -201,12 +201,12 @@ jobs:
             gcov-exec: aarch64-linux-gnu-gcov
             codecov: ubuntu_gcc_aarch64
 
-          - name: Ubuntu GCC AARCH64 No ACLE UBSAN
+          - name: Ubuntu GCC AARCH64 No ARMv8 UBSAN
             os: ubuntu-22.04
-            cmake-args: -DCMAKE_TOOLCHAIN_FILE=cmake/toolchain-aarch64.cmake -DWITH_ACLE=OFF -DWITH_SANITIZER=Undefined
+            cmake-args: -DCMAKE_TOOLCHAIN_FILE=cmake/toolchain-aarch64.cmake -DWITH_ARMV8=OFF -DWITH_SANITIZER=Undefined
             packages: qemu-user gcc-aarch64-linux-gnu g++-aarch64-linux-gnu libc-dev-arm64-cross
             gcov-exec: aarch64-linux-gnu-gcov
-            codecov: ubuntu_gcc_aarch64_no_acle
+            codecov: ubuntu_gcc_aarch64_no_armv8
 
           - name: Ubuntu GCC AARCH64 No NEON UBSAN
             os: ubuntu-22.04
index 6643edb1fa46ef9c1fabc79b2939749d608cfd66..31d5206c05784672d6d22320b86191cfa84d3fd8 100644 (file)
@@ -54,10 +54,10 @@ jobs:
             chost: arm-linux-gnueabihf
             packages: qemu-user gcc-arm-linux-gnueabihf libc-dev-armel-cross
 
-          - name: Ubuntu GCC ARM HF No ACLE
+          - name: Ubuntu GCC ARM HF No ARMv8
             os: ubuntu-latest
             compiler: arm-linux-gnueabihf-gcc
-            configure-args: --warn --without-acle
+            configure-args: --warn --without-armv8
             chost: arm-linux-gnueabihf
             packages: qemu-user gcc-arm-linux-gnueabihf libc-dev-armel-cross
 
@@ -82,10 +82,10 @@ jobs:
             chost: aarch64-linux-gnu
             packages: qemu-user gcc-aarch64-linux-gnu libc-dev-arm64-cross
 
-          - name: Ubuntu GCC AARCH64 No ACLE
+          - name: Ubuntu GCC AARCH64 No ARMv8
             os: ubuntu-latest
             compiler: aarch64-linux-gnu-gcc
-            configure-args: --warn --without-acle
+            configure-args: --warn --without-armv8
             chost: aarch64-linux-gnu
             packages: qemu-user gcc-aarch64-linux-gnu libc-dev-arm64-cross
 
index 367413062fc3daa22319df8d555bd502aec42c3a..64dd7ad46ed2c24c1ec2121e88049ec32999b893 100644 (file)
@@ -103,7 +103,7 @@ set(WITH_SANITIZER AUTO CACHE STRING "Enable sanitizer support")
 set_property(CACHE WITH_SANITIZER PROPERTY STRINGS "Memory" "Address" "Undefined" "Thread")
 
 if(BASEARCH_ARM_FOUND)
-    option(WITH_ACLE "Build with ACLE" ON)
+    option(WITH_ARMV8 "Build with ARMv8 CRC32 intrinsics" ON)
     option(WITH_NEON "Build with NEON intrinsics" ON)
     cmake_dependent_option(WITH_ARMV6 "Build with ARMv6 SIMD" ON "NOT ARCH MATCHES \"aarch64\"" OFF)
 elseif(BASEARCH_PPC_FOUND)
@@ -132,7 +132,7 @@ option(INSTALL_UTILS "Copy minigzip and minideflate during install" OFF)
 mark_as_advanced(FORCE
     ZLIB_SYMBOL_PREFIX
     WITH_REDUCED_MEM
-    WITH_ACLE WITH_NEON
+    WITH_ARMV8 WITH_NEON
     WITH_ARMV6
     WITH_DFLTCC_DEFLATE
     WITH_DFLTCC_INFLATE
@@ -711,19 +711,19 @@ if(WITH_OPTIM)
             list(APPEND ZLIB_ARCH_SRCS ${ARCHDIR}/arm_features.c)
         endif()
 
-        if(WITH_ACLE)
-            check_acle_compiler_flag()
-            if(HAVE_ACLE_FLAG)
-                add_definitions(-DARM_ACLE)
-                set(ACLE_SRCS ${ARCHDIR}/crc32_acle.c)
-                set_property(SOURCE ${ACLE_SRCS} PROPERTY COMPILE_FLAGS "${ACLEFLAG} ${NOLTOFLAG}")
-                list(APPEND ZLIB_ARCH_SRCS ${ACLE_SRCS})
-                add_feature_info(ACLE_CRC 1 "Support ACLE optimized CRC hash generation, using \"${ACLEFLAG}\"")
+        if(WITH_ARMV8)
+            check_armv8_compiler_flag()
+            if(HAVE_ARMV8_FLAG)
+                add_definitions(-DARM_CRC32)
+                set(ARMV8_SRCS ${ARCHDIR}/crc32_armv8.c)
+                set_property(SOURCE ${ARMV8_SRCS} PROPERTY COMPILE_FLAGS "${ARMV8FLAG} ${NOLTOFLAG}")
+                list(APPEND ZLIB_ARCH_SRCS ${ARMV8_SRCS})
+                add_feature_info(ARMV8_CRC 1 "Support ARMv8 optimized CRC hash generation, using \"${ARMV8FLAG}\"")
             else()
-                set(WITH_ACLE OFF)
+                set(WITH_ARMV8 OFF)
             endif()
         else()
-            set(WITH_ACLE OFF)
+            set(WITH_ARMV8 OFF)
         endif()
         if(WITH_NEON)
             check_neon_compiler_flag()
@@ -1389,7 +1389,7 @@ add_feature_info(WITH_INFLATE_STRICT WITH_INFLATE_STRICT "Build with strict infl
 add_feature_info(WITH_INFLATE_ALLOW_INVALID_DIST WITH_INFLATE_ALLOW_INVALID_DIST "Build with zero fill for inflate invalid distances")
 
 if(BASEARCH_ARM_FOUND)
-    add_feature_info(WITH_ACLE WITH_ACLE "Build with ACLE")
+    add_feature_info(WITH_ARMV8 WITH_ARMV8 "Build with ARMv8 CRC32 intrinsics")
     add_feature_info(WITH_NEON WITH_NEON "Build with NEON intrinsics")
     add_feature_info(WITH_ARMV6 WITH_ARMV6 "Build with ARMv6 SIMD")
 elseif(BASEARCH_PPC_FOUND)
index 28aad7f1dc4518c9b0edae6a0d0ed57ed3956789..bcf8bc844cd9d7c361971e3bdcdbd6d6015f6a28 100644 (file)
--- a/README.md
+++ b/README.md
@@ -20,7 +20,7 @@ Features
 * Deflate medium and quick algorithms based on Intel’s zlib fork
 * Support for CPU intrinsics when available
   * Adler32 implementation using SSSE3, AVX2, AVX512, AVX512-VNNI, Neon, VMX & VSX
-  * CRC32-B implementation using PCLMULQDQ, VPCLMULQDQ, ACLE, & IBM Z
+  * CRC32-B implementation using PCLMULQDQ, VPCLMULQDQ, ARMv8, & IBM Z
   * Slide hash implementations using SSE2, AVX2, ARMv6, Neon, VMX & VSX
   * Compare256 implementations using SSE2, AVX2, Neon, POWER9 & RVV
   * Inflate chunk copying using SSE2, SSSE3, AVX, Neon & VSX
@@ -204,7 +204,7 @@ Advanced Build Options
 | WITH_SSE42                      |                       | Build with SSE42 intrinsics                                         | ON                     |
 | WITH_PCLMULQDQ                  |                       | Build with PCLMULQDQ intrinsics                                     | ON                     |
 | WITH_VPCLMULQDQ                 | --without-vpclmulqdq  | Build with VPCLMULQDQ intrinsics                                    | ON                     |
-| WITH_ACLE                       | --without-acle        | Build with ACLE intrinsics                                          | ON                     |
+| WITH_ARMV8                      | --without-armv8       | Build with ARMv8 intrinsics                                          | ON                     |
 | WITH_NEON                       | --without-neon        | Build with NEON intrinsics                                          | ON                     |
 | WITH_ARMV6                      | --without-armv6       | Build with ARMv6 intrinsics                                         | ON                     |
 | WITH_ALTIVEC                    | --without-altivec     | Build with AltiVec (VMX) intrinsics                                 | ON                     |
index b6f0aaf21145257bfeff3fbfb3efde7908104292..08d986b1120f2c6a4ebb38889296dcf82c8ea0c6 100644 (file)
@@ -8,7 +8,7 @@ SFLAGS=
 INCLUDES=
 SUFFIX=
 
-ACLEFLAG=
+ARMV8FLAG=
 NEONFLAG=
 ARMV6FLAG=
 NOLTOFLAG=
@@ -22,7 +22,7 @@ all: \
        arm_features.o arm_features.lo \
        chunkset_neon.o chunkset_neon.lo \
        compare256_neon.o compare256_neon.lo \
-       crc32_acle.o crc32_acle.lo \
+       crc32_armv8.o crc32_armv8.lo \
        slide_hash_neon.o slide_hash_neon.lo \
        slide_hash_armv6.o slide_hash_armv6.lo \
 
@@ -50,11 +50,11 @@ compare256_neon.o:
 compare256_neon.lo:
        $(CC) $(SFLAGS) $(NEONFLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/compare256_neon.c
 
-crc32_acle.o:
-       $(CC) $(CFLAGS) $(ACLEFLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_acle.c
+crc32_armv8.o:
+       $(CC) $(CFLAGS) $(ARMV8FLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_armv8.c
 
-crc32_acle.lo:
-       $(CC) $(SFLAGS) $(ACLEFLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_acle.c
+crc32_armv8.lo:
+       $(CC) $(SFLAGS) $(ARMV8FLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/crc32_armv8.c
 
 slide_hash_neon.o:
        $(CC) $(CFLAGS) $(NEONFLAG) $(NOLTOFLAG) $(INCLUDES) -c -o $@ $(SRCDIR)/slide_hash_neon.c
index a67cf3aabdf0729471aac746262cf7f1e7c5523d..cc4faa9c26eb736104f750fb6fe5ee70559e4385 100644 (file)
@@ -8,7 +8,7 @@
 #  include <arm_acle.h>
 #endif
 
-#ifdef ARM_ACLE
+#ifdef ARM_CRC32
 #if defined(__aarch64__)
 #  define Z_TARGET_CRC Z_TARGET("+crc")
 #else
index d0d49764f4e5d7cba41fe5e492a9d5e10aaeaa02..d591a3bdfc5ef4816d2b2a62c508e5e4d7d8a50c 100644 (file)
@@ -52,7 +52,7 @@ static int arm_has_crc32() {
       && hascrc32 == 1;
 #elif defined(_WIN32)
     return IsProcessorFeaturePresent(PF_ARM_V8_CRC32_INSTRUCTIONS_AVAILABLE);
-#elif defined(ARM_NOCHECK_ACLE)
+#elif defined(ARM_NOCHECK_CRC32)
     return 1;
 #else
     return 0;
index b256c37bff84f9541d50a79db0f56834e1e8889f..2344b1401aee268fcc114064b522ea2546471800 100644 (file)
@@ -19,8 +19,8 @@ void slide_hash_neon(deflate_state *s);
 void inflate_fast_neon(PREFIX3(stream) *strm, uint32_t start);
 #endif
 
-#ifdef ARM_ACLE
-uint32_t crc32_acle(uint32_t crc, const uint8_t *buf, size_t len);
+#ifdef ARM_CRC32
+uint32_t crc32_armv8(uint32_t crc, const uint8_t *buf, size_t len);
 #endif
 
 #ifdef ARM_SIMD
@@ -55,10 +55,10 @@ void slide_hash_armv6(deflate_state *s);
 #      define native_longest_match_slow longest_match_slow_neon
 #    endif
 #  endif
-// ARM - ACLE
-#  if defined(ARM_ACLE) && (defined(__ARM_ACLE) || defined(__ARM_FEATURE_CRC32))
+// ARM - CRC32
+#  if (defined(ARM_CRC32) && defined(__ARM_FEATURE_CRC32))
 #    undef native_crc32
-#    define native_crc32 crc32_acle
+#    define native_crc32 crc32_armv8
 #  endif
 #endif
 
similarity index 90%
rename from arch/arm/crc32_acle.c
rename to arch/arm/crc32_armv8.c
index a3a1fefc03ba4ee17ab0208a98d298b640662e60..c3561d5159ff7f90ab04561d87b44a8e6240ab92 100644 (file)
@@ -1,15 +1,15 @@
-/* crc32_acle.c -- compute the CRC-32 of a data stream
+/* crc32_armv8.c -- compute the CRC-32 of a data stream
  * Copyright (C) 1995-2006, 2010, 2011, 2012 Mark Adler
  * Copyright (C) 2016 Yang Zhang
  * For conditions of distribution and use, see copyright notice in zlib.h
  *
 */
 
-#ifdef ARM_ACLE
+#if defined(ARM_CRC32)
 #include "acle_intrins.h"
 #include "zbuild.h"
 
-Z_INTERNAL Z_TARGET_CRC uint32_t crc32_acle(uint32_t crc, const uint8_t *buf, size_t len) {
+Z_INTERNAL Z_TARGET_CRC uint32_t crc32_armv8(uint32_t crc, const uint8_t *buf, size_t len) {
     Z_REGISTER uint32_t c;
     Z_REGISTER uint16_t buf2;
     Z_REGISTER uint32_t buf4;
index b96ac0a4428a9fdc6f153a715b7c0671a1da682c..e7498e27f4629dc788fb9ee47111a32fec524c8c 100644 (file)
@@ -1,22 +1,22 @@
 # detect-intrinsics.cmake -- Detect compiler intrinsics support
 # Licensed under the Zlib license, see LICENSE.md for details
 
-macro(check_acle_compiler_flag)
+macro(check_armv8_compiler_flag)
     if(NOT NATIVEFLAG)
         if(CMAKE_C_COMPILER_ID MATCHES "GNU" OR CMAKE_C_COMPILER_ID MATCHES "Clang")
             check_c_compiler_flag("-march=armv8-a+crc" HAVE_MARCH_ARMV8_CRC)
             if(HAVE_MARCH_ARMV8_CRC)
-                set(ACLEFLAG "-march=armv8-a+crc" CACHE INTERNAL "Compiler option to enable ACLE support")
+                set(ARMV8FLAG "-march=armv8-a+crc" CACHE INTERNAL "Compiler option to enable ARMv8 support")
             else()
                 check_c_compiler_flag("-march=armv8-a+crc+simd" HAVE_MARCH_ARMV8_CRC_SIMD)
                 if(HAVE_MARCH_ARMV8_CRC_SIMD)
-                    set(ACLEFLAG "-march=armv8-a+crc+simd" CACHE INTERNAL "Compiler option to enable ACLE support")
+                    set(ARMV8FLAG "-march=armv8-a+crc+simd" CACHE INTERNAL "Compiler option to enable ARMv8 support")
                 endif()
             endif()
         endif()
     endif()
     # Check whether compiler supports ARMv8 CRC intrinsics
-    set(CMAKE_REQUIRED_FLAGS "${ACLEFLAG} ${NATIVEFLAG} ${ZNOLTOFLAG}")
+    set(CMAKE_REQUIRED_FLAGS "${ARMV8FLAG} ${NATIVEFLAG} ${ZNOLTOFLAG}")
     check_c_source_compiles(
         "#if defined(_MSC_VER)
         #include <intrin.h>
@@ -27,7 +27,7 @@ macro(check_acle_compiler_flag)
             return __crc32w(a, b);
         }
         int main(void) { return 0; }"
-        HAVE_ACLE_FLAG
+        HAVE_ARMV8_FLAG
     )
     set(CMAKE_REQUIRED_FLAGS)
 endmacro()
index 3487d092bc9dfe3a62d1cbc23d0601389af230f9..a092e8eced6f9fce0717a29429e2589e7c444d92 100755 (executable)
--- a/configure
+++ b/configure
@@ -92,7 +92,7 @@ cover=0
 build32=0
 build64=0
 buildvpclmulqdq=1
-buildacle=1
+buildarmv8=1
 buildarmv6=1
 buildaltivec=1
 buildpower8=1
@@ -114,7 +114,7 @@ sse42flag="-msse4.2"
 pclmulflag="-mpclmul"
 vpclmulflag="-mvpclmulqdq -mavx512f"
 xsaveflag="-mxsave"
-acleflag=
+armv8flag=
 neonflag=
 armv6flag=
 noltoflag="-fno-lto"
@@ -166,7 +166,7 @@ case "$1" in
       echo '    [--without-gzfileops]       Compiles without the gzfile parts of the API enabled' | tee -a configure.log
       echo '    [--without-optimizations]   Compiles without support for optional instruction sets' | tee -a configure.log
       echo '    [--without-new-strategies]  Compiles without using new additional deflate strategies' | tee -a configure.log
-      echo '    [--without-acle]            Compiles without ARM C Language Extensions' | tee -a configure.log
+      echo '    [--without-armv8]           Compiles without ARMv8 CRC32 instruction set' | tee -a configure.log
       echo '    [--without-neon]            Compiles without ARM Neon SIMD instruction set' | tee -a configure.log
       echo '    [--without-armv6]           Compiles without ARMv6 SIMD instruction set' | tee -a configure.log
       echo '    [--without-altivec]         Compiles without PPC AltiVec support' | tee -a configure.log
@@ -198,7 +198,7 @@ case "$1" in
     -3* | --32) build32=1; shift ;;
     -6* | --64) build64=1; shift ;;
     --without-vpclmulqdq) buildvpclmulqdq=0; shift ;;
-    --without-acle) buildacle=0; shift ;;
+    --without-armv8) buildarmv8=0; shift ;;
     --without-neon) buildneon=0; shift ;;
     --without-armv6) buildarmv6=0; shift ;;
     --without-altivec) buildaltivec=0 ; shift ;;
@@ -1121,19 +1121,19 @@ EOF
     fi
 }
 
-check_acle_compiler_flag() {
+check_armv8_compiler_flag() {
     # Check whether -march=armv8-a+crc works correctly
     cat > $test.c << EOF
 int main() { return 0; }
 EOF
     if try $CC -c $CFLAGS -march=armv8-a+crc $test.c; then
         echo "Check whether -march=armv8-a+crc works ... Yes." | tee -a configure.log
-        acleflag="-march=armv8-a+crc"
+        armv8flag="-march=armv8-a+crc"
     else
         echo "Check whether -march=armv8-a+crc works ... No." | tee -a configure.log
         if try $CC -c $CFLAGS -march=armv8-a+crc+simd $test.c; then
             echo "Check whether -march=armv8-a+crc+simd works ... Yes." | tee -a configure.log
-            acleflag="-march=armv8-a+crc+simd"
+            armv8flag="-march=armv8-a+crc+simd"
         else
             echo "Check whether -march=armv8-a+crc+simd works ... No." | tee -a configure.log
         fi
@@ -1149,10 +1149,10 @@ int main(void) { return 0; }
 EOF
     if try ${CC} ${CFLAGS} ${acleflag} $test.c; then
         echo "Checking for ARMv8 CRC intrinsics ... Yes." | tee -a configure.log
-        ACLE_AVAILABLE=1
+        ARMV8_AVAILABLE=1
     else
         echo "Checking for ARMv8 CRC intrinsics ... No." | tee -a configure.log
-        ACLE_AVAILABLE=0
+        ARMV8_AVAILABLE=0
     fi
 }
 
@@ -1737,15 +1737,15 @@ EOF
                 fi
             fi
 
-            if test $buildacle -eq 1; then
-                check_acle_compiler_flag
+            if test $buildarmv8 -eq 1; then
+                check_armv8_compiler_flag
 
-                if test $ACLE_AVAILABLE -eq 1; then
-                    CFLAGS="${CFLAGS} -DARM_ACLE"
-                    SFLAGS="${SFLAGS} -DARM_ACLE"
+                if test $ARMV8_AVAILABLE -eq 1; then
+                    CFLAGS="${CFLAGS} -DARM_CRC32"
+                    SFLAGS="${SFLAGS} -DARM_CRC32"
 
-                    ARCH_STATIC_OBJS="${ARCH_STATIC_OBJS} crc32_acle.o"
-                    ARCH_SHARED_OBJS="${ARCH_SHARED_OBJS} crc32_acle.lo"
+                    ARCH_STATIC_OBJS="${ARCH_STATIC_OBJS} crc32_armv8.o"
+                    ARCH_SHARED_OBJS="${ARCH_SHARED_OBJS} crc32_armv8.lo"
                 fi
             fi
 
@@ -1949,7 +1949,7 @@ echo sse42flag = $sse42flag >> configure.log
 echo pclmulflag = $pclmulflag >> configure.log
 echo vpclmulflag = $vpclmulflag >> configure.log
 echo xsaveflag = $xsaveflag >> configure.log
-echo acleflag = $acleflag >> configure.log
+echo armv8flag = $armv8flag >> configure.log
 echo neonflag = $neonflag >> configure.log
 echo armv6flag = $armv6flag >> configure.log
 echo ARCHDIR = ${ARCHDIR} >> configure.log
@@ -2090,7 +2090,7 @@ sed < $SRCDIR/$ARCHDIR/Makefile.in "
 /^PCLMULFLAG *=/s#=.*#=$pclmulflag#
 /^VPCLMULFLAG *=/s#=.*#=$vpclmulflag#
 /^XSAVEFLAG *=/s#=.*#=$xsaveflag#
-/^ACLEFLAG *=/s#=.*#=$acleflag#
+/^ARMV8FLAG *=/s#=.*#=$armv8flag#
 /^NEONFLAG *=/s#=.*#=$neonflag#
 /^ARMV6FLAG *=/s#=.*#=$armv6flag#
 /^NOLTOFLAG *=/s#=.*#=$noltoflag#
index 3cee95bff1c523313df6ca57622bd57971c950e3..20ad4c0dfb99303ae3bd5919d8b721309530adb5 100644 (file)
@@ -183,10 +183,10 @@ static void init_functable(void) {
 #  endif
     }
 #endif
-    // ARM - ACLE
-#ifdef ARM_ACLE
+    // ARM - CRC32
+#ifdef ARM_CRC32
     if (cf.arm.has_crc32) {
-        ft.crc32 = &crc32_acle;
+        ft.crc32 = &crc32_armv8;
     }
 #endif
 
index abb1055c5b7ed01be29c97a60bc4a8548f06eb31..0150c7037b2c19beb7ba94b19ab345af5f8173e4 100644 (file)
@@ -191,7 +191,7 @@ if(WITH_GTEST)
                 test_adler32.cc             # adler32_neon(), etc
                 test_compare256.cc          # compare256_neon(), etc
                 test_compare256_rle.cc      # compare256_rle(), etc
-                test_crc32.cc               # crc32_acle(), etc
+                test_crc32.cc               # crc32_armv8(), etc
                 test_inflate_sync.cc        # expects a certain compressed block layout
                 test_main.cc                # cpu_check_features()
                 test_version.cc             # expects a fixed version string
index 7aba7c33674deb2fb0ccbb96f45f20ba200b32e5..eb4369c1a9ef7dbb891b1e8b8bac19b147ab385f 100644 (file)
@@ -62,8 +62,8 @@ BENCHMARK_CRC32(braid, PREFIX(crc32_braid), 1);
 BENCHMARK_CRC32(native, native_crc32, 1);
 #else
 
-#ifdef ARM_ACLE
-BENCHMARK_CRC32(acle, crc32_acle, test_cpu_features.arm.has_crc32);
+#ifdef ARM_CRC32
+BENCHMARK_CRC32(armv8, crc32_armv8, test_cpu_features.arm.has_crc32);
 #endif
 #ifdef POWER8_VSX_CRC32
 BENCHMARK_CRC32(power8, crc32_power8, test_cpu_features.power.has_arch_2_07);
index ea839383df561f99d9206d078dfdf1781b26db8a..5b727ce470f4479749c8e69af859ad3990e6137a 100644 (file)
@@ -197,7 +197,7 @@ public:
     }
 };
 
-/* Specifically to test where we had dodgy alignment in the acle CRC32
+/* Specifically to test where we had dodgy alignment in the ARMv8 CRC32
  * function. All others are either byte level access or use intrinsics
  * that work with unaligned access */
 class crc32_align : public ::testing::TestWithParam<int> {
@@ -231,7 +231,7 @@ TEST_CRC32(native, native_crc32, 1)
 
 #else
 
-#ifdef ARM_ACLE
+#ifdef ARM_CRC32
 static const int align_offsets[] = {
     1, 2, 3, 4, 5, 6, 7
 };
@@ -246,8 +246,8 @@ static const int align_offsets[] = {
     }
 
 INSTANTIATE_TEST_SUITE_P(crc32_alignment, crc32_align, testing::ValuesIn(align_offsets));
-TEST_CRC32(acle, crc32_acle, test_cpu_features.arm.has_crc32)
-TEST_CRC32_ALIGN(acle_align, crc32_acle, test_cpu_features.arm.has_crc32)
+TEST_CRC32(armv8, crc32_armv8, test_cpu_features.arm.has_crc32)
+TEST_CRC32_ALIGN(armv8_align, crc32_armv8, test_cpu_features.arm.has_crc32)
 #endif
 #ifdef POWER8_VSX_CRC32
 TEST_CRC32(power8, crc32_power8, test_cpu_features.power.has_arch_2_07)
index 3209f6a30511e29688b31448e99d0b04159f3067..d2d36fb64eed3fcd0e689d520319aa26efac8ce6 100644 (file)
@@ -94,12 +94,12 @@ OBJS = $(OBJS) gzlib.obj gzread.obj gzwrite.obj
 !endif
 
 WFLAGS = $(WFLAGS) \
-       -DARM_ACLE \
+       -DARM_CRC32 \
        -D__ARM_NEON__=1 \
        -DARM_NEON \
        -DARM_NOCHECK_NEON \
        #
-OBJS = $(OBJS) crc32_acle.obj adler32_neon.obj chunkset_neon.obj compare256_neon.obj slide_hash_neon.obj
+OBJS = $(OBJS) crc32_armv8.obj adler32_neon.obj chunkset_neon.obj compare256_neon.obj slide_hash_neon.obj
 
 # targets
 all: $(STATICLIB) $(SHAREDLIB) $(IMPLIB) \
index 54da045ffddc8e231cb45584bd47e7145fbeb6ea..d029927911eadfc6ecdd3cf4325251976413d129 100644 (file)
@@ -40,7 +40,7 @@ RCFILE = zlib1.rc
 RESFILE = zlib1.res
 WITH_GZFILEOP = yes
 ZLIB_COMPAT =
-WITH_ACLE =
+WITH_ARMV8 =
 WITH_NEON =
 WITH_ARMV6 =
 WITH_VFPV3 =
@@ -98,9 +98,9 @@ WFLAGS = $(WFLAGS) -DWITH_GZFILEOP
 OBJS = $(OBJS) gzlib.obj gzread.obj gzwrite.obj
 !endif
 
-!if "$(WITH_ACLE)" != ""
-WFLAGS = $(WFLAGS) -DARM_ACLE
-OBJS = $(OBJS) crc32_acle.obj
+!if "$(WITH_ARMV8)" != ""
+WFLAGS = $(WFLAGS) -DARM_CRC32
+OBJS = $(OBJS) crc32_armv8.obj
 !endif
 !if "$(WITH_VFPV3)" != ""
 NEON_ARCH = /arch:VFPv3