PCI: Always lift 2.5GT/s restriction in PCIe failed link retraining

Discard Vendor:Device ID matching in the PCIe failed link retraining quirk
and ignore the link status for the removal of the 2.5GT/s speed clamp,
whether applied by the quirk itself or the firmware earlier on.  Revert to
the original target link speed if this final link retraining has failed.

This is so that link training noise in hot-plug scenarios does not make a
link remain clamped to the 2.5GT/s speed where an event race has led the
quirk to apply the speed clamp for one device, only to leave it in place
for a subsequent device to be plugged in.

Refer to the Link Capabilities register directly for the maximum link speed
determination so as to streamline backporting.

Fixes: a89c82249c37 ("PCI: Work around PCIe link training failures")
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Alok Tiwari <alok.a.tiwari@oracle.com>
Cc: stable@vger.kernel.org # v6.5+
Link: https://patch.msgid.link/alpine.DEB.2.21.2512080331530.49654@angie.orcam.me.uk

diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index caaed1a01dc026b9eb82810c95eebe839c24758f..dd0025d3914e60070d993e68334b97847ce07cdf 100644 (file)
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -80,11 +80,10 @@ static bool pcie_lbms_seen(struct pci_dev *dev, u16 lnksta)
  * Restrict the speed to 2.5GT/s then with the Target Link Speed field,
  * request a retrain and check the result.
  *
- * If this turns out successful and we know by the Vendor:Device ID it is
- * safe to do so, then lift the restriction, letting the devices negotiate
- * a higher speed.  Also check for a similar 2.5GT/s speed restriction the
- * firmware may have already arranged and lift it with ports that already
- * report their data link being up.
+ * If this turns out successful, or where a 2.5GT/s speed restriction has
+ * been previously arranged by the firmware and the port reports its link
+ * already being up, lift the restriction, in a hope it is safe to do so,
+ * letting the devices negotiate a higher speed.
  *
  * Otherwise revert the speed to the original setting and request a retrain
  * again to remove any residual state, ignoring the result as it's supposed
@@ -95,51 +94,37 @@ static bool pcie_lbms_seen(struct pci_dev *dev, u16 lnksta)
  */
 int pcie_failed_link_retrain(struct pci_dev *dev)
 {
-       static const struct pci_device_id ids[] = {
-               { PCI_VDEVICE(ASMEDIA, 0x2824) }, /* ASMedia ASM2824 */
-               {}
-       };
-       u16 lnksta, lnkctl2;
+       u16 lnksta, lnkctl2, oldlnkctl2;
        int ret = -ENOTTY;
+       u32 lnkcap;
 
        if (!pci_is_pcie(dev) || !pcie_downstream_port(dev) ||
            !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting)
                return ret;
 
        pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
+       pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &oldlnkctl2);
        if (!(lnksta & PCI_EXP_LNKSTA_DLLLA) && pcie_lbms_seen(dev, lnksta)) {
-               u16 oldlnkctl2;
-
                pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n");
-
-               pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &oldlnkctl2);
                ret = pcie_set_target_speed(dev, PCIE_SPEED_2_5GT, false);
-               if (ret) {
-                       pci_info(dev, "retraining failed\n");
-                       pcie_set_target_speed(dev, PCIE_LNKCTL2_TLS2SPEED(oldlnkctl2),
-                                             true);
-                       return ret;
-               }
-
-               pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
+               if (ret)
+                       goto err;
        }
 
        pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &lnkctl2);
-
-       if ((lnksta & PCI_EXP_LNKSTA_DLLLA) &&
-           (lnkctl2 & PCI_EXP_LNKCTL2_TLS) == PCI_EXP_LNKCTL2_TLS_2_5GT &&
-           pci_match_id(ids, dev)) {
-               u32 lnkcap;
-
+       pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap);
+       if ((lnkctl2 & PCI_EXP_LNKCTL2_TLS) == PCI_EXP_LNKCTL2_TLS_2_5GT &&
+           (lnkcap & PCI_EXP_LNKCAP_SLS) != PCI_EXP_LNKCAP_SLS_2_5GB) {
                pci_info(dev, "removing 2.5GT/s downstream link speed restriction\n");
-               pcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &lnkcap);
                ret = pcie_set_target_speed(dev, PCIE_LNKCAP_SLS2SPEED(lnkcap), false);
-               if (ret) {
-                       pci_info(dev, "retraining failed\n");
-                       return ret;
-               }
+               if (ret)
+                       goto err;
        }
 
+       return ret;
+err:
+       pci_info(dev, "retraining failed\n");
+       pcie_set_target_speed(dev, PCIE_LNKCTL2_TLS2SPEED(oldlnkctl2), true);
        return ret;
 }