libgomp: Update SVE tests

The new SVE tests didn't explicitly force SVE to be enabled,
which meant that they wouldn't work on targets that aren't
configured for SVE by default.  The least invasive way of
fixing that is to add a pragma, which works for most tests.
However, for udr-sve.c, the global:

 #pragma omp declare reduction (+:svint32_t: omp_out = svadd_s32_z (svptrue_b32(), omp_in, omp_out)) \
		    initializer (omp_priv = svindex_s32 (0, 0))

does not work with an earlier:

 #pragma GCC target "+sve"

which is interesting, and maybe worthy of a PR if there isn't one
already.  It seems we have to force SVE (and thus an architecture)
on the command line instead.

However, with that fixed, udr-sve.c fails execution.  One problem
seems to be a missing accumulation in for_reduction.  Fixing that
is enough to reach the final inscan_reduction_incl, but that fails
for reasons I haven't investigated yet.  I would need to read up
more to understand what the loop is doing.

It also looks like there might be a missing "+" in simd_reduction:

  #pragma omp simd reduction (+:va, i)
  for (j = 0; j < 16; j++)
    va = svld1_s32 (svptrue_b32 (), a);

  res = svaddv_s32 (svptrue_b32 (), va);

  if (res != 8)
    __builtin_abort ();

since AFAICT the loop is not doing a reduction as things stand.
But perhaps that's deliberate, since it does match the != 8 test.

libgomp/
	* testsuite/libgomp.c-target/aarch64/firstprivate.c: Add +sve pragma.
	* testsuite/libgomp.c-target/aarch64/lastprivate.c: Likewise.
	* testsuite/libgomp.c-target/aarch64/private.c: Likewise.
	* testsuite/libgomp.c-target/aarch64/shared.c: Likewise.
	* testsuite/libgomp.c-target/aarch64/simd-aligned.c: Likewise.
	* testsuite/libgomp.c-target/aarch64/simd-nontemporal.c: Likewise.
	* testsuite/libgomp.c-target/aarch64/threadprivate.c: Likewise.
	* testsuite/libgomp.c-target/aarch64/udr-sve.c: Add an -march option.
	(for_reduction): Use "+=" in the reduction loop.

diff --git a/libgomp/testsuite/libgomp.c-target/aarch64/firstprivate.c b/libgomp/testsuite/libgomp.c-target/aarch64/firstprivate.c
index 930ca6215b6073884ee3f0f0ea254b37e0e488d5..58674e23dbb52aa3553b5bb7a558cf033766bd73 100644 (file)
--- a/libgomp/testsuite/libgomp.c-target/aarch64/firstprivate.c
+++ b/libgomp/testsuite/libgomp.c-target/aarch64/firstprivate.c
@@ -1,6 +1,8 @@
 /* { dg-do run { target aarch64_sve256_hw } } */
 /* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */
 
+#pragma GCC target "+sve"
+
 #include <arm_sve.h>
 #include <omp.h>
 

diff --git a/libgomp/testsuite/libgomp.c-target/aarch64/lastprivate.c b/libgomp/testsuite/libgomp.c-target/aarch64/lastprivate.c
index be5a618c1b8c8bf8c18109e97dda72caa3fd6ef3..2f93d7bb3125523ee3198b8b431eb5e4d920c82b 100644 (file)
--- a/libgomp/testsuite/libgomp.c-target/aarch64/lastprivate.c
+++ b/libgomp/testsuite/libgomp.c-target/aarch64/lastprivate.c
@@ -1,6 +1,8 @@
 /* { dg-do run { target aarch64_sve256_hw } } */
 /* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */
 
+#pragma GCC target "+sve"
+
 #include <arm_sve.h>
 #include <omp.h>
 

diff --git a/libgomp/testsuite/libgomp.c-target/aarch64/private.c b/libgomp/testsuite/libgomp.c-target/aarch64/private.c
index 0ca74fe4e4bf3b12c86f7e1a0f7b986833038aea..fed5370c8d04a2cd5820e18318105ea3cad898ff 100644 (file)
--- a/libgomp/testsuite/libgomp.c-target/aarch64/private.c
+++ b/libgomp/testsuite/libgomp.c-target/aarch64/private.c
@@ -1,6 +1,8 @@
 /* { dg-do run { target aarch64_sve256_hw } } */
 /* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */
 
+#pragma GCC target "+sve"
+
 #include <arm_sve.h>
 #include <omp.h>
 

diff --git a/libgomp/testsuite/libgomp.c-target/aarch64/shared.c b/libgomp/testsuite/libgomp.c-target/aarch64/shared.c
index dec41b800387213c00cb75c59ba3e0df2cd63737..340a668c0f3ad0465e4dd32f3cdbe4c9cae618d3 100644 (file)
--- a/libgomp/testsuite/libgomp.c-target/aarch64/shared.c
+++ b/libgomp/testsuite/libgomp.c-target/aarch64/shared.c
@@ -1,6 +1,8 @@
 /* { dg-do run { target aarch64_sve256_hw } } */
 /* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */
 
+#pragma GCC target "+sve"
+
 #include <arm_sve.h>
 #include <stdlib.h>
 #include <omp.h>

diff --git a/libgomp/testsuite/libgomp.c-target/aarch64/simd-aligned.c b/libgomp/testsuite/libgomp.c-target/aarch64/simd-aligned.c
index cc41139a6cb8fa7e43375b357f65c43917ce3cff..14642c975c5531e04096ed9aa77ab23d59b5fc7d 100644 (file)
--- a/libgomp/testsuite/libgomp.c-target/aarch64/simd-aligned.c
+++ b/libgomp/testsuite/libgomp.c-target/aarch64/simd-aligned.c
@@ -1,6 +1,8 @@
 /* { dg-do run { target aarch64_sve256_hw } } */
 /* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */
 
+#pragma GCC target "+sve"
+
 #include <arm_sve.h>
 #include <stdint.h>
 

diff --git a/libgomp/testsuite/libgomp.c-target/aarch64/simd-nontemporal.c b/libgomp/testsuite/libgomp.c-target/aarch64/simd-nontemporal.c
index 3385427f3643dca293fcd0822a775c72e50047c4..6fe4616490a99ec6b764adf876905fd47957b0fb 100644 (file)
--- a/libgomp/testsuite/libgomp.c-target/aarch64/simd-nontemporal.c
+++ b/libgomp/testsuite/libgomp.c-target/aarch64/simd-nontemporal.c
@@ -1,6 +1,8 @@
 /* { dg-do run { target aarch64_sve256_hw } } */
 /* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */
 
+#pragma GCC target "+sve"
+
 #include <arm_sve.h>
 #include <stdint.h>
 

diff --git a/libgomp/testsuite/libgomp.c-target/aarch64/threadprivate.c b/libgomp/testsuite/libgomp.c-target/aarch64/threadprivate.c
index 4a3931210f06f8a10fcc1c657d43e3fe0ef35490..aa7d2f962232c4673a2e8252b8a5e153b9fadce3 100644 (file)
--- a/libgomp/testsuite/libgomp.c-target/aarch64/threadprivate.c
+++ b/libgomp/testsuite/libgomp.c-target/aarch64/threadprivate.c
@@ -1,6 +1,8 @@
 /* { dg-do run { target aarch64_sve256_hw } } */
 /* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */
 
+#pragma GCC target "+sve"
+
 #include <arm_sve.h>
 #include <stdint.h>
 

diff --git a/libgomp/testsuite/libgomp.c-target/aarch64/udr-sve.c b/libgomp/testsuite/libgomp.c-target/aarch64/udr-sve.c
index c79f4a9143f906dd45806174f993c01c2bd5ac44..03d93cc44b2c079ddb83ce4d4784bb4808aa4469 100644 (file)
--- a/libgomp/testsuite/libgomp.c-target/aarch64/udr-sve.c
+++ b/libgomp/testsuite/libgomp.c-target/aarch64/udr-sve.c
@@ -1,5 +1,5 @@
 /* { dg-do run { target aarch64_sve256_hw } } */
-/* { dg-options "-msve-vector-bits=256 -fopenmp -O2" } */
+/* { dg-options "-march=armv8-a+sve -msve-vector-bits=256 -fopenmp -O2" } */
 
 #include <arm_sve.h>
 
@@ -38,7 +38,7 @@ for_reduction ()
 
   #pragma omp parallel for reduction (+:va)
   for (j = 0; j < 8; j++)
-    va = svld1_s32 (svptrue_b32 (), a);
+    va += svld1_s32 (svptrue_b32 (), a);
 
   res = svaddv_s32 (svptrue_b32 (), va);