]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
x86/CPU/AMD: Simplify the spectral chicken fix
authorBorislav Petkov (AMD) <bp@alien8.de>
Tue, 30 Dec 2025 11:07:31 +0000 (12:07 +0100)
committerBorislav Petkov (AMD) <bp@alien8.de>
Fri, 9 Jan 2026 10:36:52 +0000 (11:36 +0100)
msr_set_bit() takes a bit number to set but MSR_ZEN2_SPECTRAL_CHICKEN_BIT
is a bit mask. The usual pattern that code uses is a _BIT-named type
macro instead of a mask.

So convert it to a bit number to reflect that.

Also, msr_set_bit() already does the reading and checking whether the
bit needs to be set so use that instead of a local variable.

Fixup tabbing while at it.

No functional changes.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Nikolay Borisov <nik.borisov@suse.com>
Link: https://patch.msgid.link/20251230110731.28108-1-bp@kernel.org
arch/x86/include/asm/msr-index.h
arch/x86/kernel/cpu/amd.c
tools/arch/x86/include/asm/msr-index.h

index 3d0a0950d20a1609e02a8e854ed14d5d45a45dfa..43adc38d31d575397278f38f2db02c700c85e716 100644 (file)
 #define MSR_F19H_UMC_PERF_CTR           0xc0010801
 
 /* Zen 2 */
-#define MSR_ZEN2_SPECTRAL_CHICKEN       0xc00110e3
-#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT   BIT_ULL(1)
+#define MSR_ZEN2_SPECTRAL_CHICKEN      0xc00110e3
+#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT  1
 
 /* Fam 17h MSRs */
 #define MSR_F17H_IRPERF                        0xc00000e9
index bc94ff1e250ad2dc217e8e7c926e2af4a61fb7a3..ab9158c94f8cf6e214d9336f5ea0f0ec4e783b67 100644 (file)
@@ -900,20 +900,14 @@ static void fix_erratum_1386(struct cpuinfo_x86 *c)
 void init_spectral_chicken(struct cpuinfo_x86 *c)
 {
 #ifdef CONFIG_MITIGATION_UNRET_ENTRY
-       u64 value;
-
        /*
         * On Zen2 we offer this chicken (bit) on the altar of Speculation.
         *
         * This suppresses speculation from the middle of a basic block, i.e. it
         * suppresses non-branch predictions.
         */
-       if (!cpu_has(c, X86_FEATURE_HYPERVISOR)) {
-               if (!rdmsrq_safe(MSR_ZEN2_SPECTRAL_CHICKEN, &value)) {
-                       value |= MSR_ZEN2_SPECTRAL_CHICKEN_BIT;
-                       wrmsrq_safe(MSR_ZEN2_SPECTRAL_CHICKEN, value);
-               }
-       }
+       if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
+               msr_set_bit(MSR_ZEN2_SPECTRAL_CHICKEN, MSR_ZEN2_SPECTRAL_CHICKEN_BIT);
 #endif
 }
 
index 9e1720d73244f6860249509ae6040841645b1376..d4137a3027934586a1739aa1a6718eb5f78ca205 100644 (file)
 #define MSR_F19H_UMC_PERF_CTR           0xc0010801
 
 /* Zen 2 */
-#define MSR_ZEN2_SPECTRAL_CHICKEN       0xc00110e3
-#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT   BIT_ULL(1)
+#define MSR_ZEN2_SPECTRAL_CHICKEN      0xc00110e3
+#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT  1
 
 /* Fam 17h MSRs */
 #define MSR_F17H_IRPERF                        0xc00000e9