aarch64: Fix wrong code with st64b builtin [PR110100]

The st64b pattern incorrectly had an output constraint on the register
operand containing the destination address for the store, leading to
wrong code. This patch fixes that.

gcc/ChangeLog:

	PR target/110100
	* config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
	Use input operand for the destination address.
	* config/aarch64/aarch64.md (st64b): Fix constraint on address
	operand.

gcc/testsuite/ChangeLog:

	PR target/110100
	* gcc.target/aarch64/acle/pr110100.c: New test.

diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc
index d48109139e366db4f5bdc1390041230545e2a3ee..1a4507f32e60fd964cf227d762415c466ceeef20 100644 (file)
--- a/gcc/config/aarch64/aarch64-builtins.cc
+++ b/gcc/config/aarch64/aarch64-builtins.cc
@@ -2519,7 +2519,7 @@ aarch64_expand_builtin_ls64 (int fcode, tree exp, rtx target)
       {
        rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
        rtx op1 = expand_normal (CALL_EXPR_ARG (exp, 1));
-       create_output_operand (&ops[0], op0, DImode);
+       create_input_operand (&ops[0], op0, DImode);
        create_input_operand (&ops[1], op1, V8DImode);
        expand_insn (CODE_FOR_st64b, 2, ops);
        return const0_rtx;

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 11d0d9c8eb6438a3afb39cab89d0eec574e15a16..ac39a4d683eccad06d856d4ed62147e0396a3f75 100644 (file)
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -7928,7 +7928,7 @@
 )
 
 (define_insn "st64b"
-  [(set (mem:V8DI (match_operand:DI 0 "register_operand" "=r"))
+  [(set (mem:V8DI (match_operand:DI 0 "register_operand" "r"))
        (unspec_volatile:V8DI [(match_operand:V8DI 1 "register_operand" "r")]
            UNSPEC_ST64B)
   )]

diff --git a/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c b/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c
new file mode 100644 (file)
index 0000000..f56d5e6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/acle/pr110100.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-march=armv8.7-a -O2" } */
+#include <arm_acle.h>
+void do_st64b(data512_t data) {
+  __arm_st64b((void*)0x10000000, data);
+}
+/* { dg-final { scan-assembler {mov\tx([123])?[0-9], 268435456} } } */