]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
riscv: sophgo: dts: Add spi controller for SG2042
authorZixian Zeng <sycamoremoon376@gmail.com>
Fri, 25 Apr 2025 02:28:14 +0000 (10:28 +0800)
committerInochi Amaoto <inochiama@gmail.com>
Sun, 18 May 2025 22:23:26 +0000 (06:23 +0800)
Add spi controllers for SG2042.

SG2042 uses the upstreamed Synopsys DW SPI IP.

Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com>
Link: https://lore.kernel.org/r/20250425-sfg-spi-v6-3-2dbe7bb46013@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
arch/riscv/boot/dts/sophgo/sg2042.dtsi

index f61de47884754ecf1f2d1a3bc55d619da9621c4a..85636d1798f11804546ed8606595ace1b4cb2a2f 100644 (file)
                        status = "disabled";
                };
 
+               spi0: spi@7040004000 {
+                       compatible = "sophgo,sg2042-spi", "snps,dw-apb-ssi";
+                       reg = <0x70 0x40004000 0x00 0x1000>;
+                       clocks = <&clkgen GATE_CLK_APB_SPI>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <110 IRQ_TYPE_LEVEL_HIGH>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       num-cs = <2>;
+                       resets = <&rstgen RST_SPI0>;
+                       status = "disabled";
+               };
+
+               spi1: spi@7040005000 {
+                       compatible = "sophgo,sg2042-spi", "snps,dw-apb-ssi";
+                       reg = <0x70 0x40005000 0x00 0x1000>;
+                       clocks = <&clkgen GATE_CLK_APB_SPI>;
+                       interrupt-parent = <&intc>;
+                       interrupts = <111 IRQ_TYPE_LEVEL_HIGH>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       num-cs = <2>;
+                       resets = <&rstgen RST_SPI1>;
+                       status = "disabled";
+               };
+
                emmc: mmc@704002a000 {
                        compatible = "sophgo,sg2042-dwcmshc";
                        reg = <0x70 0x4002a000 0x0 0x1000>;