--- /dev/null
+From 6ab502bc1cf3147ea1d8540d04b83a7a4cb6d1f1 Mon Sep 17 00:00:00 2001
+From: Konrad Dybcio <konrad.dybcio@linaro.org>
+Date: Tue, 20 Jun 2023 13:43:21 +0200
+Subject: drm/msm/dsi: Enable runtime PM
+
+From: Konrad Dybcio <konrad.dybcio@linaro.org>
+
+commit 6ab502bc1cf3147ea1d8540d04b83a7a4cb6d1f1 upstream.
+
+Some devices power the DSI PHY/PLL through a power rail that we model
+as a GENPD. Enable runtime PM to make it suspendable.
+
+Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Patchwork: https://patchwork.freedesktop.org/patch/543352/
+Link: https://lore.kernel.org/r/20230620-topic-dsiphy_rpm-v2-2-a11a751f34f0@linaro.org
+Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
++++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
+@@ -691,6 +691,10 @@ static int dsi_phy_driver_probe(struct p
+ return dev_err_probe(dev, PTR_ERR(phy->ahb_clk),
+ "Unable to get ahb clk\n");
+
++ ret = devm_pm_runtime_enable(&pdev->dev);
++ if (ret)
++ return ret;
++
+ /* PLL init will call into clk_register which requires
+ * register access, so we need to enable power and ahb clock.
+ */
--- /dev/null
+From 5056c596c3d1848021a4eaa76ee42f4c05c50346 Mon Sep 17 00:00:00 2001
+From: Huacai Chen <chenhuacai@loongson.cn>
+Date: Fri, 26 Jan 2024 16:22:07 +0800
+Subject: LoongArch/smp: Call rcutree_report_cpu_starting() at tlb_init()
+
+From: Huacai Chen <chenhuacai@loongson.cn>
+
+commit 5056c596c3d1848021a4eaa76ee42f4c05c50346 upstream.
+
+Machines which have more than 8 nodes fail to boot SMP after commit
+a2ccf46333d7b2cf96 ("LoongArch/smp: Call rcutree_report_cpu_starting()
+earlier"). Because such machines use tlb-based per-cpu base address
+rather than dmw-based per-cpu base address, resulting per-cpu variables
+can only be accessed after tlb_init(). But rcutree_report_cpu_starting()
+is now called before tlb_init() and accesses per-cpu variables indeed.
+
+Since the original patch want to avoid the lockdep warning caused by
+page allocation in tlb_init(), we can move rcutree_report_cpu_starting()
+to tlb_init() where after tlb exception configuration but before page
+allocation.
+
+Fixes: a2ccf46333d7b2cf96 ("LoongArch/smp: Call rcutree_report_cpu_starting() earlier")
+Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/loongarch/kernel/smp.c | 1 -
+ arch/loongarch/mm/tlb.c | 16 ++++++++++------
+ 2 files changed, 10 insertions(+), 7 deletions(-)
+
+--- a/arch/loongarch/kernel/smp.c
++++ b/arch/loongarch/kernel/smp.c
+@@ -506,7 +506,6 @@ asmlinkage void start_secondary(void)
+ sync_counter();
+ cpu = raw_smp_processor_id();
+ set_my_cpu_offset(per_cpu_offset(cpu));
+- rcu_cpu_starting(cpu);
+
+ cpu_probe();
+ constant_clockevent_init();
+--- a/arch/loongarch/mm/tlb.c
++++ b/arch/loongarch/mm/tlb.c
+@@ -284,12 +284,16 @@ static void setup_tlb_handler(int cpu)
+ set_handler(EXCCODE_TLBNR * VECSIZE, handle_tlb_protect, VECSIZE);
+ set_handler(EXCCODE_TLBNX * VECSIZE, handle_tlb_protect, VECSIZE);
+ set_handler(EXCCODE_TLBPE * VECSIZE, handle_tlb_protect, VECSIZE);
+- }
++ } else {
++ int vec_sz __maybe_unused;
++ void *addr __maybe_unused;
++ struct page *page __maybe_unused;
++
++ /* Avoid lockdep warning */
++ rcu_cpu_starting(cpu);
++
+ #ifdef CONFIG_NUMA
+- else {
+- void *addr;
+- struct page *page;
+- const int vec_sz = sizeof(exception_handlers);
++ vec_sz = sizeof(exception_handlers);
+
+ if (pcpu_handlers[cpu])
+ return;
+@@ -305,8 +309,8 @@ static void setup_tlb_handler(int cpu)
+ csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_EENTRY);
+ csr_write64(pcpu_handlers[cpu], LOONGARCH_CSR_MERRENTRY);
+ csr_write64(pcpu_handlers[cpu] + 80*VECSIZE, LOONGARCH_CSR_TLBRENTRY);
+- }
+ #endif
++ }
+ }
+
+ void tlb_init(int cpu)
--- /dev/null
+From stable+bounces-17642-greg=kroah.com@vger.kernel.org Thu Feb 1 18:05:11 2024
+From: Jonathan Gray <jsg@jsg.id.au>
+Date: Fri, 2 Feb 2024 13:04:57 +1100
+Subject: Revert "drm/amd/display: Disable PSR-SU on Parade 0803 TCON again"
+To: gregkh@linuxfoundation.org
+Cc: mario.limonciello@amd.com, stable@vger.kernel.org
+Message-ID: <20240202020457.29708-1-jsg@jsg.id.au>
+
+From: Jonathan Gray <jsg@jsg.id.au>
+
+This reverts commit 107a11637f43e7cdcca96c09525481e38b004455.
+
+duplicated a change made in 6.6.8
+a8f922ad2f76a53383982132ee44d123b72533c5
+
+Cc: stable@vger.kernel.org # 6.6
+Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/modules/power/power_helpers.c | 2 --
+ 1 file changed, 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
++++ b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
+@@ -841,8 +841,6 @@ bool is_psr_su_specific_panel(struct dc_
+ isPSRSUSupported = false;
+ else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x03)
+ isPSRSUSupported = false;
+- else if (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x03)
+- isPSRSUSupported = false;
+ else if (dpcd_caps->psr_info.force_psrsu_cap == 0x1)
+ isPSRSUSupported = true;
+ }
selftests-net-enable-some-more-knobs.patch
arm64-irq-set-the-correct-node-for-shadow-call-stack.patch
mm-kmsan-fix-infinite-recursion-due-to-rcu-critical-section.patch
+revert-drm-amd-display-disable-psr-su-on-parade-0803-tcon-again.patch
+drm-msm-dsi-enable-runtime-pm.patch
+loongarch-smp-call-rcutree_report_cpu_starting-at-tlb_init.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
