]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
pinctrl: mediatek: airoha: use new GPIO line value setter callbacks
authorBartosz Golaszewski <bartosz.golaszewski@linaro.org>
Fri, 25 Apr 2025 09:00:57 +0000 (11:00 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 9 May 2025 08:04:45 +0000 (10:04 +0200)
struct gpio_chip now has callbacks for setting line values that return
an integer, allowing to indicate failures. Convert the driver to using
them.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/20250425-gpiochip-set-rv-pinctrl-mediatek-v1-1-93e6a01855e7@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/mediatek/pinctrl-airoha.c

index 547a798b71c8aea740259b8f388116cacb91b75d..5b97d8de4fc4cadb08431da7cc09b645ea0f57d4 100644 (file)
@@ -2266,15 +2266,16 @@ static int airoha_convert_pin_to_reg_offset(struct pinctrl_dev *pctrl_dev,
 }
 
 /* gpio callbacks */
-static void airoha_gpio_set(struct gpio_chip *chip, unsigned int gpio,
-                           int value)
+static int airoha_gpio_set(struct gpio_chip *chip, unsigned int gpio,
+                          int value)
 {
        struct airoha_pinctrl *pinctrl = gpiochip_get_data(chip);
        u32 offset = gpio % AIROHA_PIN_BANK_SIZE;
        u8 index = gpio / AIROHA_PIN_BANK_SIZE;
 
-       regmap_update_bits(pinctrl->regmap, pinctrl->gpiochip.data[index],
-                          BIT(offset), value ? BIT(offset) : 0);
+       return regmap_update_bits(pinctrl->regmap,
+                                 pinctrl->gpiochip.data[index],
+                                 BIT(offset), value ? BIT(offset) : 0);
 }
 
 static int airoha_gpio_get(struct gpio_chip *chip, unsigned int gpio)
@@ -2299,9 +2300,7 @@ static int airoha_gpio_direction_output(struct gpio_chip *chip,
        if (err)
                return err;
 
-       airoha_gpio_set(chip, gpio, value);
-
-       return 0;
+       return airoha_gpio_set(chip, gpio, value);
 }
 
 /* irq callbacks */
@@ -2438,7 +2437,7 @@ static int airoha_pinctrl_add_gpiochip(struct airoha_pinctrl *pinctrl,
        gc->free = gpiochip_generic_free;
        gc->direction_input = pinctrl_gpio_direction_input;
        gc->direction_output = airoha_gpio_direction_output;
-       gc->set = airoha_gpio_set;
+       gc->set_rv = airoha_gpio_set;
        gc->get = airoha_gpio_get;
        gc->base = -1;
        gc->ngpio = AIROHA_NUM_PINS;
@@ -2734,9 +2733,7 @@ static int airoha_pinconf_set_pin_value(struct pinctrl_dev *pctrl_dev,
        if (pin < 0)
                return pin;
 
-       airoha_gpio_set(&pinctrl->gpiochip.chip, pin, value);
-
-       return 0;
+       return airoha_gpio_set(&pinctrl->gpiochip.chip, pin, value);
 }
 
 static int airoha_pinconf_set(struct pinctrl_dev *pctrl_dev,