riscv: dts: spacemit: Add ethernet device for K3

Add all ethernet device nodes for K3 SoC.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Yixun Lan <dlan@kernel.org>
Link: https://lore.kernel.org/r/20260326014617.1011732-1-inochiama@gmail.com
Signed-off-by: Yixun Lan <dlan@kernel.org>

diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index b098dbd0e7a15f542e8c44c69fce3157f9e56b82..504fe6bd46b25ca9318c5421e0f0934e71db528c 100644 (file)
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -3,6 +3,7 @@
  * Copyright (c) 2026 SpacemiT (Hangzhou) Technology Co. Ltd
  * Copyright (c) 2026 Guodong Xu <guodong@riscstar.com>
  */
+#include <dt-bindings/gpio/gpio.h>
 
 #include "k3.dtsi"
 #include "k3-pinctrl.dtsi"
@@ -12,6 +13,7 @@
        compatible = "spacemit,k3-pico-itx", "spacemit,k3";
 
        aliases {
+               ethernet0 = &eth0;
                serial0 = &uart0;
        };
 
@@ -25,6 +27,24 @@
        };
 };
 
+&eth0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&gmac0_rgmii_0_cfg>, <&gmac0_phy_0_cfg>;
+       phy-mode = "rgmii-id";
+       phy-handle = <&phy0>;
+       status = "okay";
+
+       mdio {
+               phy0: phy@1 {
+                       compatible = "ethernet-phy-ieee802.3-c22";
+                       reg = <1>;
+                       reset-gpios = <&gpio 0 15 GPIO_ACTIVE_LOW>;
+                       reset-assert-us = <10000>;
+                       reset-deassert-us = <10000>;
+               };
+       };
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_0_cfg>;

diff --git a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
index efb0f157218870656505c0a6e1db9c6577eb2ec3..a7b5d10c332e75b562f485bfdf45ae91beb1c564 100644 (file)
--- a/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k3-pinctrl.dtsi
@@ -11,6 +11,40 @@
 #define K3_GPIO(x)     (x / 32) (x % 32)
 
 &pinctrl {
+       gmac0_rgmii_0_cfg: gmac0-rgmii-0-cfg {
+               gmac0-rgmii-0-pins {
+                       pinmux = <K3_PADCONF(0, 1)>,    /* gmac0_rxdv */
+                                <K3_PADCONF(1, 1)>,    /* gmac0_rx_d0 */
+                                <K3_PADCONF(2, 1)>,    /* gmac0_rx_d1 */
+                                <K3_PADCONF(3, 1)>,    /* gmac0_rx_clk */
+                                <K3_PADCONF(4, 1)>,    /* gmac0_rx_d2 */
+                                <K3_PADCONF(5, 1)>,    /* gmac0_rx_d3 */
+                                <K3_PADCONF(6, 1)>,    /* gmac0_tx_d0 */
+                                <K3_PADCONF(7, 1)>,    /* gmac0_tx_d1 */
+                                <K3_PADCONF(8, 1)>,    /* gmac0_tx_clk */
+                                <K3_PADCONF(9, 1)>,    /* gmac0_tx_d2 */
+                                <K3_PADCONF(10, 1)>,   /* gmac0_tx_d3 */
+                                <K3_PADCONF(11, 1)>,   /* gmac0_tx_en */
+                                <K3_PADCONF(12, 1)>,   /* gmac0_mdc */
+                                <K3_PADCONF(13, 1)>;   /* gmac0_mdio */
+
+                       bias-disable;
+                       drive-strength = <25>;
+                       power-source = <1800>;
+               };
+
+       };
+
+       gmac0_phy_0_cfg: gmac0-phy-0-cfg {
+               gmac0-phy-0-pins {
+                       pinmux = <K3_PADCONF(14, 1)>;   /* gmac0_int */
+
+                       bias-disable;
+                       drive-strength = <25>;
+                       power-source = <1800>;
+               };
+       };
+
        /omit-if-no-ref/
        uart0_0_cfg: uart0-0-cfg {
                uart0-0-pins {

diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spacemit/k3.dtsi
index a3a8ceddabec49f4a7520f36042030ce633bd673..5f4818cd5d6d80acfa2d39691d2a361b1ceca53f 100644 (file)
--- a/arch/riscv/boot/dts/spacemit/k3.dtsi
+++ b/arch/riscv/boot/dts/spacemit/k3.dtsi
@@ -438,6 +438,123 @@
                dma-noncoherent;
                ranges;
 
+               eth0: ethernet@cac80000 {
+                       compatible = "spacemit,k3-dwmac", "snps,dwmac-5.40a";
+                       reg = <0x0 0xcac80000 0x0 0x2000>;
+                       clocks = <&syscon_apmu CLK_APMU_EMAC0_BUS>,
+                                <&syscon_apmu CLK_APMU_EMAC0_1588>,
+                                <&syscon_apmu CLK_APMU_EMAC0_RGMII_TX>;
+                       clock-names = "stmmaceth", "ptp_ref", "tx";
+                       interrupts = <131 IRQ_TYPE_LEVEL_HIGH>,
+                                    <276 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq", "eth_wake_irq";
+                       resets = <&syscon_apmu RESET_APMU_EMAC0>;
+                       reset-names = "stmmaceth";
+                       rx-fifo-depth = <8192>;
+                       tx-fifo-depth = <8192>;
+                       snps,multicast-filter-bins = <64>;
+                       snps,perfect-filter-entries = <32>;
+                       snps,aal;
+                       snps,tso;
+                       snps,txpbl = <8>;
+                       snps,rxpbl = <8>;
+                       snps,force_sf_dma_mode;
+                       snps,axi-config = <&gmac0_axi_setup>;
+                       spacemit,apmu = <&syscon_apmu 0x3e4 0x3e8>;
+                       status = "disabled";
+
+                       mdio {
+                               compatible = "snps,dwmac-mdio";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       gmac0_axi_setup: stmmac-axi-config {
+                               snps,wr_osr_lmt = <0xf>;
+                               snps,rd_osr_lmt = <0xf>;
+                               /* max axi burst len is 256 */
+                               snps,blen = <256 128 64 32 16 0 0>;
+                       };
+               };
+
+               eth1: ethernet@cac82000 {
+                       compatible = "spacemit,k3-dwmac", "snps,dwmac-5.40a";
+                       reg = <0x0 0xcac82000 0x0 0x2000>;
+                       clocks = <&syscon_apmu CLK_APMU_EMAC1_BUS>,
+                                <&syscon_apmu CLK_APMU_EMAC1_1588>,
+                                <&syscon_apmu CLK_APMU_EMAC1_RGMII_TX>;
+                       clock-names = "stmmaceth", "ptp_ref", "tx";
+                       interrupts = <133 IRQ_TYPE_LEVEL_HIGH>,
+                                    <277 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq", "eth_wake_irq";
+                       resets = <&syscon_apmu RESET_APMU_EMAC1>;
+                       reset-names = "stmmaceth";
+                       rx-fifo-depth = <8192>;
+                       tx-fifo-depth = <8192>;
+                       snps,multicast-filter-bins = <64>;
+                       snps,perfect-filter-entries = <32>;
+                       snps,aal;
+                       snps,tso;
+                       snps,txpbl = <8>;
+                       snps,rxpbl = <8>;
+                       snps,force_sf_dma_mode;
+                       snps,axi-config = <&gmac1_axi_setup>;
+                       spacemit,apmu = <&syscon_apmu 0x3ec 0x3f0>;
+                       status = "disabled";
+
+                       mdio {
+                               compatible = "snps,dwmac-mdio";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       gmac1_axi_setup: stmmac-axi-config {
+                               snps,wr_osr_lmt = <0xf>;
+                               snps,rd_osr_lmt = <0xf>;
+                               /* max axi burst len is 256 */
+                               snps,blen = <256 128 64 32 16 0 0>;
+                       };
+               };
+
+               eth2: ethernet@cac8e000 {
+                       compatible = "spacemit,k3-dwmac", "snps,dwmac-5.40a";
+                       reg = <0x0 0xcac8e000 0x0 0x2000>;
+                       clocks = <&syscon_apmu CLK_APMU_EMAC2_BUS>,
+                                <&syscon_apmu CLK_APMU_EMAC2_1588>,
+                                <&syscon_apmu CLK_APMU_EMAC2_RGMII_TX>;
+                       clock-names = "stmmaceth", "ptp_ref", "tx";
+                       interrupts = <130 IRQ_TYPE_LEVEL_HIGH>,
+                                    <278 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq", "eth_wake_irq";
+                       resets = <&syscon_apmu RESET_APMU_EMAC2>;
+                       reset-names = "stmmaceth";
+                       rx-fifo-depth = <4096>;
+                       tx-fifo-depth = <4096>;
+                       snps,multicast-filter-bins = <64>;
+                       snps,perfect-filter-entries = <32>;
+                       snps,aal;
+                       snps,tso;
+                       snps,txpbl = <8>;
+                       snps,rxpbl = <8>;
+                       snps,force_sf_dma_mode;
+                       snps,axi-config = <&gmac2_axi_setup>;
+                       spacemit,apmu = <&syscon_apmu 0x248 0x24c>;
+                       status = "disabled";
+
+                       mdio {
+                               compatible = "snps,dwmac-mdio";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+
+                       gmac2_axi_setup: stmmac-axi-config {
+                               snps,wr_osr_lmt = <0xf>;
+                               snps,rd_osr_lmt = <0xf>;
+                               /* max axi burst len is 256 */
+                               snps,blen = <256 128 64 32 16 0 0>;
+                       };
+               };
+
                syscon_apbc: system-controller@d4015000 {
                        compatible = "spacemit,k3-syscon-apbc";
                        reg = <0x0 0xd4015000 0x0 0x1000>;