]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/amdgpu: Add pcie64 indirect to register block
authorLijo Lazar <lijo.lazar@amd.com>
Tue, 9 Dec 2025 05:41:41 +0000 (11:11 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 2 Mar 2026 21:46:34 +0000 (16:46 -0500)
Move 64-bit pcie indirect read/writes to register access block.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c
drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.h
drivers/gpu/drm/amd/amdgpu/nv.c
drivers/gpu/drm/amd/amdgpu/soc15.c
drivers/gpu/drm/amd/amdgpu/soc21.c
drivers/gpu/drm/amd/amdgpu/soc24.c
drivers/gpu/drm/amd/amdgpu/soc_v1_0.c

index fff32addbdfe57b61ce83729706e5bdf27b5817d..58411f11a89dea8d796eb43e34ffd5b37184d7c1 100644 (file)
@@ -904,8 +904,6 @@ struct amdgpu_device {
        struct amdgpu_reg_access reg;
        /* protects concurrent PCIE register access */
        spinlock_t pcie_idx_lock;
-       amdgpu_rreg64_t                 pcie_rreg64;
-       amdgpu_wreg64_t                 pcie_wreg64;
        amdgpu_rreg64_ext_t                     pcie_rreg64_ext;
        amdgpu_wreg64_ext_t pcie_wreg64_ext;
        struct amdgpu_doorbell          doorbell;
@@ -1308,8 +1306,8 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
 #define WREG32_PCIE_PORT(reg, v) amdgpu_reg_pciep_wr32(adev, (reg), (v))
 #define RREG32_PCIE_EXT(reg) amdgpu_reg_pcie_ext_rd32(adev, (reg))
 #define WREG32_PCIE_EXT(reg, v) amdgpu_reg_pcie_ext_wr32(adev, (reg), (v))
-#define RREG64_PCIE(reg) adev->pcie_rreg64(adev, (reg))
-#define WREG64_PCIE(reg, v) adev->pcie_wreg64(adev, (reg), (v))
+#define RREG64_PCIE(reg) amdgpu_reg_pcie_rd64(adev, (reg))
+#define WREG64_PCIE(reg, v) amdgpu_reg_pcie_wr64(adev, (reg), (v))
 #define RREG64_PCIE_EXT(reg) adev->pcie_rreg64_ext(adev, (reg))
 #define WREG64_PCIE_EXT(reg, v) adev->pcie_wreg64_ext(adev, (reg), (v))
 #define RREG32_SMC(reg) amdgpu_reg_smc_rd32(adev, (reg))
index 550f744dd5ea3e5e85f85d201cbfedcd4c93d21d..41cfcf00e225c915f0917e333d1e3dec25eef9a0 100644 (file)
@@ -858,24 +858,6 @@ u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev)
        return adev->nbio.funcs->get_rev_id(adev);
 }
 
-/**
- * amdgpu_invalid_rreg64 - dummy 64 bit reg read function
- *
- * @adev: amdgpu_device pointer
- * @reg: offset of register
- *
- * Dummy register read function.  Used for register blocks
- * that certain asics don't have (all asics).
- * Returns the value in the register.
- */
-static uint64_t amdgpu_invalid_rreg64(struct amdgpu_device *adev, uint32_t reg)
-{
-       dev_err(adev->dev, "Invalid callback to read 64 bit register 0x%04X\n",
-               reg);
-       BUG();
-       return 0;
-}
-
 static uint64_t amdgpu_invalid_rreg64_ext(struct amdgpu_device *adev, uint64_t reg)
 {
        dev_err(adev->dev, "Invalid callback to read register 0x%llX\n", reg);
@@ -883,24 +865,6 @@ static uint64_t amdgpu_invalid_rreg64_ext(struct amdgpu_device *adev, uint64_t r
        return 0;
 }
 
-/**
- * amdgpu_invalid_wreg64 - dummy reg write function
- *
- * @adev: amdgpu_device pointer
- * @reg: offset of register
- * @v: value to write to the register
- *
- * Dummy register read function.  Used for register blocks
- * that certain asics don't have (all asics).
- */
-static void amdgpu_invalid_wreg64(struct amdgpu_device *adev, uint32_t reg, uint64_t v)
-{
-       dev_err(adev->dev,
-               "Invalid callback to write 64 bit register 0x%04X with 0x%08llX\n",
-               reg, v);
-       BUG();
-}
-
 static void amdgpu_invalid_wreg64_ext(struct amdgpu_device *adev, uint64_t reg, uint64_t v)
 {
        dev_err(adev->dev,
@@ -3740,8 +3704,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 
        amdgpu_reg_access_init(adev);
 
-       adev->pcie_rreg64 = &amdgpu_invalid_rreg64;
-       adev->pcie_wreg64 = &amdgpu_invalid_wreg64;
        adev->pcie_rreg64_ext = &amdgpu_invalid_rreg64_ext;
        adev->pcie_wreg64_ext = &amdgpu_invalid_wreg64_ext;
 
index 395f02834404b47b1ccd705111f152ffc6fba24b..fc7c2dc458c302aff40f85068a32c85d51488e78 100644 (file)
@@ -63,6 +63,8 @@ void amdgpu_reg_access_init(struct amdgpu_device *adev)
        adev->reg.pcie.wreg = NULL;
        adev->reg.pcie.rreg_ext = NULL;
        adev->reg.pcie.wreg_ext = NULL;
+       adev->reg.pcie.rreg64 = NULL;
+       adev->reg.pcie.wreg64 = NULL;
        adev->reg.pcie.port_rreg = NULL;
        adev->reg.pcie.port_wreg = NULL;
 }
@@ -223,6 +225,24 @@ void amdgpu_reg_pcie_ext_wr32(struct amdgpu_device *adev, uint64_t reg,
        adev->reg.pcie.wreg_ext(adev, reg, v);
 }
 
+uint64_t amdgpu_reg_pcie_rd64(struct amdgpu_device *adev, uint32_t reg)
+{
+       if (!adev->reg.pcie.rreg64) {
+               dev_err_once(adev->dev, "PCIE 64-bit register read not supported\n");
+               return 0;
+       }
+       return adev->reg.pcie.rreg64(adev, reg);
+}
+
+void amdgpu_reg_pcie_wr64(struct amdgpu_device *adev, uint32_t reg, uint64_t v)
+{
+       if (!adev->reg.pcie.wreg64) {
+               dev_err_once(adev->dev, "PCIE 64-bit register write not supported\n");
+               return;
+       }
+       adev->reg.pcie.wreg64(adev, reg, v);
+}
+
 uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg)
 {
        if (!adev->reg.pcie.port_rreg) {
index 4423b872b46e909bf685b015c0a0006da534ea2b..e6c0a59973c43cfab68cdf1412129b75f9443c56 100644 (file)
@@ -33,6 +33,8 @@ typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device *, uint32_t);
 typedef void (*amdgpu_wreg_t)(struct amdgpu_device *, uint32_t, uint32_t);
 typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device *, uint64_t);
 typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device *, uint64_t, uint32_t);
+typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device *, uint32_t);
+typedef void (*amdgpu_wreg64_t)(struct amdgpu_device *, uint32_t, uint64_t);
 
 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device *, uint32_t,
                                        uint32_t);
@@ -56,6 +58,8 @@ struct amdgpu_reg_pcie_ind {
        amdgpu_wreg_t wreg;
        amdgpu_rreg_ext_t rreg_ext;
        amdgpu_wreg_ext_t wreg_ext;
+       amdgpu_rreg64_t rreg64;
+       amdgpu_wreg64_t wreg64;
        amdgpu_rreg_t port_rreg;
        amdgpu_wreg_t port_wreg;
 };
@@ -92,13 +96,12 @@ void amdgpu_reg_pcie_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
 uint32_t amdgpu_reg_pcie_ext_rd32(struct amdgpu_device *adev, uint64_t reg);
 void amdgpu_reg_pcie_ext_wr32(struct amdgpu_device *adev, uint64_t reg,
                              uint32_t v);
+uint64_t amdgpu_reg_pcie_rd64(struct amdgpu_device *adev, uint32_t reg);
+void amdgpu_reg_pcie_wr64(struct amdgpu_device *adev, uint32_t reg, uint64_t v);
 uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg);
 void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg,
                           uint32_t v);
 
-typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device *, uint32_t);
-typedef void (*amdgpu_wreg64_t)(struct amdgpu_device *, uint32_t, uint64_t);
-
 typedef uint64_t (*amdgpu_rreg64_ext_t)(struct amdgpu_device *, uint64_t);
 typedef void (*amdgpu_wreg64_ext_t)(struct amdgpu_device *, uint64_t, uint64_t);
 
index 302c56630bd8ba7278356a41733b776d7c65ce8f..7ce1a1b956065c1742500d793bf1b471b9cd9a39 100644 (file)
@@ -637,8 +637,8 @@ static int nv_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->nbio.funcs->set_reg_remap(adev);
        adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg;
        adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
-       adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
-       adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
+       adev->reg.pcie.rreg64 = &amdgpu_device_indirect_rreg64;
+       adev->reg.pcie.wreg64 = &amdgpu_device_indirect_wreg64;
        adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
        adev->reg.pcie.port_wreg = &amdgpu_device_pcie_port_wreg;
 
index bf520fa6f19ff88229bec59133776708168cabd5..7e682d19ca52840923b39e7dc7dcc6f75b25666b 100644 (file)
@@ -965,8 +965,8 @@ static int soc15_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
        adev->reg.pcie.rreg_ext = &amdgpu_device_indirect_rreg_ext;
        adev->reg.pcie.wreg_ext = &amdgpu_device_indirect_wreg_ext;
-       adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
-       adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
+       adev->reg.pcie.rreg64 = &amdgpu_device_indirect_rreg64;
+       adev->reg.pcie.wreg64 = &amdgpu_device_indirect_wreg64;
        adev->pcie_rreg64_ext = &amdgpu_device_indirect_rreg64_ext;
        adev->pcie_wreg64_ext = &amdgpu_device_indirect_wreg64_ext;
        adev->reg.uvd_ctx.rreg = &soc15_uvd_ctx_rreg;
index f4e6c4d3263a623e11e02641c5a6b4862b77b4ca..fbd1d97f33add8a199532c3a2814a2f8c5187025 100644 (file)
@@ -591,8 +591,8 @@ static int soc21_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->nbio.funcs->set_reg_remap(adev);
        adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg;
        adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
-       adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
-       adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
+       adev->reg.pcie.rreg64 = &amdgpu_device_indirect_rreg64;
+       adev->reg.pcie.wreg64 = &amdgpu_device_indirect_wreg64;
        adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
        adev->reg.pcie.port_wreg = &amdgpu_device_pcie_port_wreg;
 
index 2b2b8737ec5e793ec69e3ef68df1ca707eae8472..308f32daa7802183b0b36081106236854e329e42 100644 (file)
@@ -364,8 +364,8 @@ static int soc24_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->nbio.funcs->set_reg_remap(adev);
        adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg;
        adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
-       adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
-       adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
+       adev->reg.pcie.rreg64 = &amdgpu_device_indirect_rreg64;
+       adev->reg.pcie.wreg64 = &amdgpu_device_indirect_wreg64;
        adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
        adev->reg.pcie.port_wreg = &amdgpu_device_pcie_port_wreg;
 
index c55a402f3dba8ef48fedc2a9a1e35c29183ca631..ca6d6755dde18ca6d372ff4e06707de5f2fbccad 100644 (file)
@@ -254,8 +254,8 @@ static int soc_v1_0_common_early_init(struct amdgpu_ip_block *ip_block)
        adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
        adev->reg.pcie.rreg_ext = &amdgpu_device_indirect_rreg_ext;
        adev->reg.pcie.wreg_ext = &amdgpu_device_indirect_wreg_ext;
-       adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
-       adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
+       adev->reg.pcie.rreg64 = &amdgpu_device_indirect_rreg64;
+       adev->reg.pcie.wreg64 = &amdgpu_device_indirect_wreg64;
        adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
        adev->reg.pcie.port_wreg = &amdgpu_device_pcie_port_wreg;
        adev->pcie_rreg64_ext = &amdgpu_device_indirect_rreg64_ext;