namespace {
+/* Implements vdup_* intrinsics. */
+class vdupq_impl : public quiet<function_base>
+{
+public:
+ CONSTEXPR vdupq_impl (int unspec_for_m_n_sint,
+ int unspec_for_m_n_uint,
+ int unspec_for_m_n_fp)
+ : m_unspec_for_m_n_sint (unspec_for_m_n_sint),
+ m_unspec_for_m_n_uint (unspec_for_m_n_uint),
+ m_unspec_for_m_n_fp (unspec_for_m_n_fp)
+ {}
+ int m_unspec_for_m_n_sint;
+ int m_unspec_for_m_n_uint;
+ int m_unspec_for_m_n_fp;
+
+ rtx expand (function_expander &e) const override
+ {
+ gcc_assert (e.mode_suffix_id == MODE_n);
+
+ insn_code code;
+ machine_mode mode = e.vector_mode (0);
+
+ switch (e.pred)
+ {
+ case PRED_none:
+ /* No predicate, _n suffix. */
+ code = code_for_mve_vdupq_n (mode);
+ return e.use_exact_insn (code);
+
+ case PRED_m:
+ case PRED_x:
+ /* "m" or "x" predicate, _n suffix. */
+ if (e.type_suffix (0).integer_p)
+ if (e.type_suffix (0).unsigned_p)
+ code = code_for_mve_q_m_n (m_unspec_for_m_n_uint,
+ m_unspec_for_m_n_uint, mode);
+ else
+ code = code_for_mve_q_m_n (m_unspec_for_m_n_sint,
+ m_unspec_for_m_n_sint, mode);
+ else
+ code = code_for_mve_q_m_n_f (m_unspec_for_m_n_fp, mode);
+
+ if (e.pred == PRED_m)
+ return e.use_cond_insn (code, 0);
+ else
+ return e.use_pred_x_insn (code);
+
+ default:
+ gcc_unreachable ();
+ }
+ }
+};
+
/* Implements vreinterpretq_* intrinsics. */
class vreinterpretq_impl : public quiet<function_base>
{
FUNCTION (vcmpcsq, unspec_based_mve_function_exact_insn_vcmp, (UNKNOWN, GEU, UNKNOWN, UNKNOWN, VCMPCSQ_M_U, UNKNOWN, UNKNOWN, VCMPCSQ_M_N_U, UNKNOWN))
FUNCTION (vcmphiq, unspec_based_mve_function_exact_insn_vcmp, (UNKNOWN, GTU, UNKNOWN, UNKNOWN, VCMPHIQ_M_U, UNKNOWN, UNKNOWN, VCMPHIQ_M_N_U, UNKNOWN))
FUNCTION_WITHOUT_M_N (vcreateq, VCREATEQ)
-FUNCTION_ONLY_N (vdupq, VDUPQ)
+FUNCTION (vdupq, vdupq_impl, (VDUPQ_M_N_S, VDUPQ_M_N_U, VDUPQ_M_N_F))
FUNCTION_WITH_RTX_M (veorq, XOR, VEORQ)
FUNCTION (vfmaq, unspec_mve_function_exact_insn, (-1, -1, VFMAQ_F, -1, -1, VFMAQ_N_F, -1, -1, VFMAQ_M_F, -1, -1, VFMAQ_M_N_F))
FUNCTION (vfmasq, unspec_mve_function_exact_insn, (-1, -1, -1, -1, -1, VFMASQ_N_F, -1, -1, -1, -1, -1, VFMASQ_M_N_F))
case CONST_DOUBLE:
if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
- && (mode == SFmode || !TARGET_VFP_SINGLE))
+ && (mode == SFmode || mode == HFmode || !TARGET_VFP_SINGLE))
{
if (vfp3_const_double_rtx (x))
{
return true;
case CONST_VECTOR:
- /* Fixme. */
if (((TARGET_NEON && TARGET_HARD_FLOAT
&& (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode)))
|| TARGET_HAVE_MVE)
&& simd_immediate_valid_for_move (x, mode, NULL, NULL))
*cost = COSTS_N_INSNS (1);
+ else if (TARGET_HAVE_MVE)
+ {
+ /* 128-bit vector requires two vldr.64 on MVE. */
+ *cost = COSTS_N_INSNS (2);
+ if (speed_p)
+ *cost += extra_cost->ldst.loadd * 2;
+ }
else
*cost = COSTS_N_INSNS (4);
return true;
VAR2 (UNOP_NONE_NONE, vrndaq_f, v8hf, v4sf)
VAR2 (UNOP_NONE_NONE, vrev64q_f, v8hf, v4sf)
VAR2 (UNOP_NONE_NONE, vnegq_f, v8hf, v4sf)
-VAR2 (UNOP_NONE_NONE, vdupq_n_f, v8hf, v4sf)
+VAR5 (UNOP_NONE_NONE, vdupq_n, v8hf, v4sf, v16qi, v8hi, v4si)
VAR2 (UNOP_NONE_NONE, vabsq_f, v8hf, v4sf)
VAR1 (UNOP_NONE_NONE, vrev32q_f, v8hf)
VAR1 (UNOP_NONE_NONE, vcvttq_f32_f16, v4sf)
VAR3 (UNOP_SNONE_SNONE, vqabsq_s, v16qi, v8hi, v4si)
VAR3 (UNOP_SNONE_SNONE, vnegq_s, v16qi, v8hi, v4si)
VAR3 (UNOP_SNONE_SNONE, vmvnq_s, v16qi, v8hi, v4si)
-VAR3 (UNOP_SNONE_SNONE, vdupq_n_s, v16qi, v8hi, v4si)
VAR3 (UNOP_SNONE_SNONE, vclzq_s, v16qi, v8hi, v4si)
VAR3 (UNOP_SNONE_SNONE, vclsq_s, v16qi, v8hi, v4si)
VAR3 (UNOP_SNONE_SNONE, vaddvq_s, v16qi, v8hi, v4si)
VAR1 (UNOP_SNONE_SNONE, vaddlvq_s, v4si)
VAR3 (UNOP_UNONE_UNONE, vrev64q_u, v16qi, v8hi, v4si)
VAR3 (UNOP_UNONE_UNONE, vmvnq_u, v16qi, v8hi, v4si)
-VAR3 (UNOP_UNONE_UNONE, vdupq_n_u, v16qi, v8hi, v4si)
VAR3 (UNOP_UNONE_UNONE, vclzq_u, v16qi, v8hi, v4si)
VAR3 (UNOP_UNONE_UNONE, vaddvq_u, v16qi, v8hi, v4si)
VAR2 (UNOP_UNONE_UNONE, vrev32q_u, v16qi, v8hi)
(set_attr "thumb2_pool_range" "*,*,*,*,1018,*,*,*")
(set_attr "neg_pool_range" "*,*,*,*,996,*,*,*")])
-(define_insn "mve_vdup<mode>"
+;;
+;; [vdupq_n_u, vdupq_n_s, vdupq_n_f]
+;;
+(define_insn "@mve_vdupq_n<mode>"
[(set (match_operand:MVE_VLD_ST 0 "s_register_operand" "=w")
(vec_duplicate:MVE_VLD_ST
(match_operand:<V_elem> 1 "s_register_operand" "r")))]
"TARGET_HAVE_MVE || TARGET_HAVE_MVE_FLOAT"
"vdup.<V_sz_elem>\t%q0, %1"
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vdup<mode>"))
+ [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_vdupq_n<mode>"))
(set_attr "length" "4")
(set_attr "type" "mve_move")])
(set_attr "type" "mve_move")
])
-;;
-;; [vdupq_n_f])
-;;
-(define_insn "@mve_<mve_insn>q_n_f<mode>"
- [
- (set (match_operand:MVE_0 0 "s_register_operand" "=w")
- (unspec:MVE_0 [(match_operand:<V_elem> 1 "s_register_operand" "r")]
- MVE_FP_N_VDUPQ_ONLY))
- ]
- "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
- "<mve_insn>.%#<V_sz_elem>\t%q0, %1"
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_<mve_insn>q_n_f<mode>"))
- (set_attr "type" "mve_move")
-])
-
;;
;; [vrev32q_f])
;;
"TARGET_HAVE_MVE"
)
-;;
-;; [vdupq_n_u, vdupq_n_s])
-;;
-(define_insn "@mve_<mve_insn>q_n_<supf><mode>"
- [
- (set (match_operand:MVE_2 0 "s_register_operand" "=w")
- (unspec:MVE_2 [(match_operand:<V_elem> 1 "s_register_operand" "r")]
- VDUPQ_N))
- ]
- "TARGET_HAVE_MVE"
- "<mve_insn>.%#<V_sz_elem>\t%q0, %1"
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_<mve_insn>q_n_<supf><mode>"))
- (set_attr "type" "mve_move")
-])
-
;;
;; [vclzq_u, vclzq_s])
;;
]
"TARGET_HAVE_MVE"
"vpst\;<mve_insn>t.%#<V_sz_elem>\t%q0, %2"
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_<mve_insn>q_n_<supf><mode>"))
+ [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_<mve_insn>q_n<mode>"))
(set_attr "type" "mve_move")
(set_attr "length""8")])
]
"TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT"
"vpst\;<mve_insn>t.%#<V_sz_elem>\t%q0, %2"
- [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_<mve_insn>q_n_f<mode>"))
+ [(set (attr "mve_unpredicated_insn") (symbol_ref "CODE_FOR_mve_<mve_insn>q_n<mode>"))
(set_attr "type" "mve_move")
(set_attr "length""8")])
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f16 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f32 eq, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f16 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f32 ge, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f16 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f32 gt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f16 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f32 le, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f16 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f32 lt, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f16 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
}
/*
-**foo2: { xfail *-*-* }
+**foo2:
** ...
** vcmp.f32 ne, q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
return vdupq_m (inactive, a, p);
}
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+int16x8_t
+foo2 (int16x8_t inactive, mve_pred16_t p)
+{
+ return vdupq_m (inactive, 1, p);
+}
+
#ifdef __cplusplus
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
return vdupq_m (inactive, a, p);
}
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+int32x4_t
+foo2 (int32x4_t inactive, mve_pred16_t p)
+{
+ return vdupq_m (inactive, 1, p);
+}
+
#ifdef __cplusplus
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
return vdupq_m (inactive, a, p);
}
+/*
+**foo2:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+int8x16_t
+foo2 (int8x16_t inactive, mve_pred16_t p)
+{
+ return vdupq_m (inactive, 1, p);
+}
+
#ifdef __cplusplus
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
/*
**foo1:
** ...
+** movw r[0-9]+, #15462
** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
** ...
*/
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- /dev/null
+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /* Test with a constant that fits in vmov. */
+/*
+**foo1:
+** ...
+** vmov.f32 q[0-9]+, #0.0 .*
+** ...
+*/
+float32x4_t
+foo1 ()
+{
+ return vdupq_n_f32 (0);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
/*
**foo1:
** ...
-** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ldr r[0-9]+, .L.*
+** vdup.32 q[0-9]+, r[0-9]+
** ...
*/
float32x4_t
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- /dev/null
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /* Test with a constant that does not fit in vmov. */
+/*
+**foo1:
+** ...
+** mov r[0-9]+, #1000(?: @.*|)
+** vdup.16 q[0-9]+, r[0-9]+
+** ...
+*/
+int16x8_t
+foo1 ()
+{
+ return vdupq_n_s16 (1000);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
return vdupq_n_s16 (a);
}
+/*
+**foo1:
+** ...
+** vmov.i16 q[0-9]+, (#0x1) (?:@.*|)
+** ...
+*/
+int16x8_t
+foo1 ()
+{
+ return vdupq_n_s16 (1);
+}
+
#ifdef __cplusplus
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- /dev/null
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /* Test with a constant that does not fit in vmov. */
+/*
+**foo1:
+** ...
+** mov r[0-9]+, #1000
+** vdup.32 q[0-9]+, r[0-9]+
+** ...
+*/
+int32x4_t
+foo1 ()
+{
+ return vdupq_n_s32 (1000);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
return vdupq_n_s32 (a);
}
+/*
+**foo1:
+** ...
+** vmov.i32 q[0-9]+, (#0x1) (?:@.*|)
+** ...
+*/
+int32x4_t
+foo1 ()
+{
+ return vdupq_n_s32 (1);
+}
+
#ifdef __cplusplus
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
return vdupq_n_s8 (a);
}
+/*
+**foo1:
+** ...
+** vmov.i8 q[0-9]+, (#0x1) (?:@.*|)
+** ...
+*/
+int8x16_t
+foo1 ()
+{
+ return vdupq_n_s8 (1);
+}
+
#ifdef __cplusplus
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- /dev/null
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /* Test with a constant that does not fit in vmov. */
+/*
+**foo1:
+** ...
+** mov r[0-9]+, #1000(?: @.*|)
+** vdup.16 q[0-9]+, r[0-9]+
+** ...
+*/
+uint16x8_t
+foo1 ()
+{
+ return vdupq_n_u16 (1000);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
/*
**foo1:
** ...
-** vdup.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** vmov.i16 q[0-9]+, (#0x1) (?:@.*|)
** ...
*/
uint16x8_t
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
--- /dev/null
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+ /* Test with a constant that does not fit in vmov. */
+/*
+**foo1:
+** ...
+** mov r[0-9]+, #1000
+** vdup.32 q[0-9]+, r[0-9]+
+** ...
+*/
+uint32x4_t
+foo1 ()
+{
+ return vdupq_n_u32 (1000);
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
/*
**foo1:
** ...
-** vdup.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** vmov.i32 q[0-9]+, (#0x1) (?:@.*|)
** ...
*/
uint32x4_t
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
/*
**foo1:
** ...
-** vdup.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** vmov.i8 q[0-9]+, (#0x1) (?:@.*|)
** ...
*/
uint8x16_t
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
return vdupq_x_n_s16 (a, p);
}
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vdupt.16 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+int16x8_t
+foo1 (mve_pred16_t p)
+{
+ return vdupq_x_n_s16 (1, p);
+}
+
#ifdef __cplusplus
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
return vdupq_x_n_s32 (a, p);
}
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vdupt.32 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+int32x4_t
+foo1 (mve_pred16_t p)
+{
+ return vdupq_x_n_s32 (1, p);
+}
+
#ifdef __cplusplus
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
return vdupq_x_n_s8 (a, p);
}
+/*
+**foo1:
+** ...
+** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+** vpst(?: @.*|)
+** ...
+** vdupt.8 q[0-9]+, (?:ip|fp|r[0-9]+)(?: @.*|)
+** ...
+*/
+int8x16_t
+foo1 (mve_pred16_t p)
+{
+ return vdupq_x_n_s8 (1, p);
+}
+
#ifdef __cplusplus
}
#endif
-/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
projects / thirdparty / gcc.git / commitdiff
