]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: rockchip: Add DisplayPort dt node for rk3576
authorAndy Yan <andy.yan@rock-chips.com>
Fri, 6 Feb 2026 01:04:15 +0000 (09:04 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Sun, 22 Feb 2026 22:28:48 +0000 (23:28 +0100)
The DisplayPort on rk3576 is compliant with DisplayPort Specification
Version 1.4 with MST support, and share the USBDP combo PHY with USB 3.1
OTG0 controller.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Tested-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://patch.msgid.link/20260206010421.443605-6-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3576.dtsi

index 49ccdf12ef7eb4e67bd1f04250ec92ad95f7dc6f..53ff6bd027af88c45a48a8e543d838d4b9b27dff 100644 (file)
                        };
                };
 
+               dp: dp@27e40000 {
+                       compatible = "rockchip,rk3576-dp";
+                       reg = <0x0 0x27e40000 0x0 0x30000>;
+                       interrupts = <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
+                       assigned-clocks = <&cru CLK_AUX16MHZ_0>;
+                       assigned-clock-rates = <16000000>;
+                       clocks = <&cru PCLK_DP0>, <&cru CLK_AUX16MHZ_0>,
+                                <&cru ACLK_DP0>;
+                       clock-names = "apb", "aux", "hdcp";
+                       resets = <&cru SRST_DP0>;
+                       phys = <&usbdp_phy PHY_TYPE_DP>;
+                       power-domains = <&power RK3576_PD_VO1>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               dp0_in: port@0 {
+                                       reg = <0>;
+                               };
+
+                               dp0_out: port@1 {
+                                       reg = <1>;
+                               };
+                       };
+               };
+
                sai7: sai@27ed0000 {
                        compatible = "rockchip,rk3576-sai";
                        reg = <0x0 0x27ed0000 0x0 0x1000>;