drm/tidss: Use the crtc_* timings when programming the HW

[ Upstream commit 478306edc23eec4f0ec24a46222485910c66212d ]

Use the crtc_* fields from drm_display_mode, instead of the "logical"
fields. This shouldn't change anything in practice, but afaiu the crtc_*
fields are the correct ones to use here.

Reviewed-by: Aradhya Bhatia <aradhya.bhatia@linux.dev>
Tested-by: Parth Pancholi <parth.pancholi@toradex.com>
Tested-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Link: https://lore.kernel.org/r/20250723-cdns-dsi-impro-v5-3-e61cc06074c2@ideasonboard.com
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c b/drivers/gpu/drm/tidss/tidss_crtc.c
index 94f8e3178df58a7f4730459ea112fb109f7a674a..1604eca265ef666de814307f8cc1159ecd420af8 100644 (file)
--- a/drivers/gpu/drm/tidss/tidss_crtc.c
+++ b/drivers/gpu/drm/tidss/tidss_crtc.c
@@ -225,7 +225,7 @@ static void tidss_crtc_atomic_enable(struct drm_crtc *crtc,
        tidss_runtime_get(tidss);
 
        r = dispc_vp_set_clk_rate(tidss->dispc, tcrtc->hw_videoport,
-                                 mode->clock * 1000);
+                                 mode->crtc_clock * 1000);
        if (r != 0)
                return;
 

diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
index 45f22ead3e61d355e9d43ad6e941963cee7e665e..8ee6a6dc8dbd263804f3524408ecf15b0779514e 100644 (file)
--- a/drivers/gpu/drm/tidss/tidss_dispc.c
+++ b/drivers/gpu/drm/tidss/tidss_dispc.c
@@ -1086,13 +1086,13 @@ void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport,
 
        dispc_set_num_datalines(dispc, hw_videoport, fmt->data_width);
 
-       hfp = mode->hsync_start - mode->hdisplay;
-       hsw = mode->hsync_end - mode->hsync_start;
-       hbp = mode->htotal - mode->hsync_end;
+       hfp = mode->crtc_hsync_start - mode->crtc_hdisplay;
+       hsw = mode->crtc_hsync_end - mode->crtc_hsync_start;
+       hbp = mode->crtc_htotal - mode->crtc_hsync_end;
 
-       vfp = mode->vsync_start - mode->vdisplay;
-       vsw = mode->vsync_end - mode->vsync_start;
-       vbp = mode->vtotal - mode->vsync_end;
+       vfp = mode->crtc_vsync_start - mode->crtc_vdisplay;
+       vsw = mode->crtc_vsync_end - mode->crtc_vsync_start;
+       vbp = mode->crtc_vtotal - mode->crtc_vsync_end;
 
        dispc_vp_write(dispc, hw_videoport, DISPC_VP_TIMING_H,
                       FLD_VAL(hsw - 1, 7, 0) |
@@ -1134,8 +1134,8 @@ void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport,
                       FLD_VAL(ivs, 12, 12));
 
        dispc_vp_write(dispc, hw_videoport, DISPC_VP_SIZE_SCREEN,
-                      FLD_VAL(mode->hdisplay - 1, 11, 0) |
-                      FLD_VAL(mode->vdisplay - 1, 27, 16));
+                      FLD_VAL(mode->crtc_hdisplay - 1, 11, 0) |
+                      FLD_VAL(mode->crtc_vdisplay - 1, 27, 16));
 
        VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, 1, 0, 0);
 }