]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
media: mediatek: jpeg: support 34bits
authorJianhua Lin <jianhua.lin@mediatek.com>
Thu, 24 Apr 2025 09:08:24 +0000 (17:08 +0800)
committerHans Verkuil <hverkuil@xs4all.nl>
Thu, 15 May 2025 06:13:31 +0000 (08:13 +0200)
The HW iommu is able to support a 34-bit iova address-space (16GB),
enable this feature for the encoder/decoder driver by shifting the
address by two bits and setting the extended address registers.

Signed-off-by: Jianhua Lin <jianhua.lin@mediatek.com>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c
drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h
drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c
drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.h
drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_reg.h
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c
drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.h

index 834d2a354692df120b81ee0bef7f816a4529a2f4..7eb12449b63a59072eb3b3b86b0883c23d5a4c34 100644 (file)
@@ -1026,6 +1026,7 @@ static void mtk_jpeg_dec_device_run(void *priv)
        spin_lock_irqsave(&jpeg->hw_lock, flags);
        mtk_jpeg_dec_reset(jpeg->reg_base);
        mtk_jpeg_dec_set_config(jpeg->reg_base,
+                               jpeg->variant->support_34bit,
                                &jpeg_src_buf->dec_param,
                                jpeg_src_buf->bs_size,
                                &bs,
@@ -1570,7 +1571,8 @@ static irqreturn_t mtk_jpeg_enc_done(struct mtk_jpeg_dev *jpeg)
        src_buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
        dst_buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
 
-       result_size = mtk_jpeg_enc_get_file_size(jpeg->reg_base);
+       result_size = mtk_jpeg_enc_get_file_size(jpeg->reg_base,
+                                                jpeg->variant->support_34bit);
        vb2_set_plane_payload(&dst_buf->vb2_buf, 0, result_size);
 
        buf_state = VB2_BUF_STATE_DONE;
@@ -1770,6 +1772,7 @@ retry_select:
        ctx->total_frame_num++;
        mtk_jpeg_dec_reset(comp_jpeg[hw_id]->reg_base);
        mtk_jpeg_dec_set_config(comp_jpeg[hw_id]->reg_base,
+                               jpeg->variant->support_34bit,
                                &jpeg_src_buf->dec_param,
                                jpeg_src_buf->bs_size,
                                &bs,
index 8877eb39e8071e56f61dc061bc0773e06efd56d6..02ed0ed5b736d81b189a43aa15dc927f824a9574 100644 (file)
@@ -34,6 +34,8 @@
 
 #define MTK_JPEG_MAX_EXIF_SIZE (64 * 1024)
 
+#define MTK_JPEG_ADDR_MASK GENMASK(1, 0)
+
 /**
  * enum mtk_jpeg_ctx_state - states of the context state machine
  * @MTK_JPEG_INIT:             current state is initialized
@@ -62,6 +64,7 @@ enum mtk_jpeg_ctx_state {
  * @cap_q_default_fourcc:      capture queue default fourcc
  * @multi_core:                mark jpeg hw is multi_core or not
  * @jpeg_worker:               jpeg dec or enc worker
+ * @support_34bit:     flag to check support for 34-bit DMA address
  */
 struct mtk_jpeg_variant {
        struct clk_bulk_data *clks;
@@ -78,6 +81,7 @@ struct mtk_jpeg_variant {
        u32 cap_q_default_fourcc;
        bool multi_core;
        void (*jpeg_worker)(struct work_struct *work);
+       bool support_34bit;
 };
 
 struct mtk_jpeg_src_buf {
index 2c5d74939d0a928c8695eca07cbf39770e662e8d..e78e1d11093cd81d8de68f7a5611333a389df24a 100644 (file)
@@ -5,6 +5,8 @@
  *         Rick Chang <rick.chang@mediatek.com>
  */
 
+#include <linux/bitfield.h>
+#include <linux/bits.h>
 #include <linux/clk.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -279,23 +281,43 @@ static void mtk_jpeg_dec_set_brz_factor(void __iomem *base, u8 yscale_w,
        writel(val, base + JPGDEC_REG_BRZ_FACTOR);
 }
 
-static void mtk_jpeg_dec_set_dst_bank0(void __iomem *base, u32 addr_y,
-                                      u32 addr_u, u32 addr_v)
+static void mtk_jpeg_dec_set_dst_bank0(void __iomem *base, bool support_34bit,
+                                      dma_addr_t addr_y, dma_addr_t addr_u, dma_addr_t addr_v)
 {
+       u32 val;
+
        mtk_jpeg_verify_align(addr_y, 16, JPGDEC_REG_DEST_ADDR0_Y);
-       writel(addr_y, base + JPGDEC_REG_DEST_ADDR0_Y);
+       writel(lower_32_bits(addr_y), base + JPGDEC_REG_DEST_ADDR0_Y);
        mtk_jpeg_verify_align(addr_u, 16, JPGDEC_REG_DEST_ADDR0_U);
-       writel(addr_u, base + JPGDEC_REG_DEST_ADDR0_U);
+       writel(lower_32_bits(addr_u), base + JPGDEC_REG_DEST_ADDR0_U);
        mtk_jpeg_verify_align(addr_v, 16, JPGDEC_REG_DEST_ADDR0_V);
-       writel(addr_v, base + JPGDEC_REG_DEST_ADDR0_V);
+       writel(lower_32_bits(addr_v), base + JPGDEC_REG_DEST_ADDR0_V);
+       if (support_34bit) {
+               val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_y));
+               writel(val, base + JPGDEC_REG_DEST_ADDR0_Y_EXT);
+               val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_u));
+               writel(val, base + JPGDEC_REG_DEST_ADDR0_U_EXT);
+               val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_v));
+               writel(val, base + JPGDEC_REG_DEST_ADDR0_V_EXT);
+       }
 }
 
-static void mtk_jpeg_dec_set_dst_bank1(void __iomem *base, u32 addr_y,
-                                      u32 addr_u, u32 addr_v)
+static void mtk_jpeg_dec_set_dst_bank1(void __iomem *base, bool support_34bit,
+                                      dma_addr_t addr_y, dma_addr_t addr_u, dma_addr_t addr_v)
 {
-       writel(addr_y, base + JPGDEC_REG_DEST_ADDR1_Y);
-       writel(addr_u, base + JPGDEC_REG_DEST_ADDR1_U);
-       writel(addr_v, base + JPGDEC_REG_DEST_ADDR1_V);
+       u32 val;
+
+       writel(lower_32_bits(addr_y), base + JPGDEC_REG_DEST_ADDR1_Y);
+       writel(lower_32_bits(addr_u), base + JPGDEC_REG_DEST_ADDR1_U);
+       writel(lower_32_bits(addr_v), base + JPGDEC_REG_DEST_ADDR1_V);
+       if (support_34bit) {
+               val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_y));
+               writel(val, base + JPGDEC_REG_DEST_ADDR1_Y_EXT);
+               val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_u));
+               writel(val, base + JPGDEC_REG_DEST_ADDR1_U_EXT);
+               val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr_v));
+               writel(val, base + JPGDEC_REG_DEST_ADDR1_V_EXT);
+       }
 }
 
 static void mtk_jpeg_dec_set_mem_stride(void __iomem *base, u32 stride_y,
@@ -322,18 +344,30 @@ static void mtk_jpeg_dec_set_dec_mode(void __iomem *base, u32 mode)
        writel(mode & 0x03, base + JPGDEC_REG_OPERATION_MODE);
 }
 
-static void mtk_jpeg_dec_set_bs_write_ptr(void __iomem *base, u32 ptr)
+static void mtk_jpeg_dec_set_bs_write_ptr(void __iomem *base, bool support_34bit, dma_addr_t ptr)
 {
+       u32 val;
+
        mtk_jpeg_verify_align(ptr, 16, JPGDEC_REG_FILE_BRP);
-       writel(ptr, base + JPGDEC_REG_FILE_BRP);
+       writel(lower_32_bits(ptr), base + JPGDEC_REG_FILE_BRP);
+       if (support_34bit) {
+               val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(ptr));
+               writel(val, base + JPGDEC_REG_FILE_BRP_EXT);
+       }
 }
 
-static void mtk_jpeg_dec_set_bs_info(void __iomem *base, u32 addr, u32 size,
-                                    u32 bitstream_size)
+static void mtk_jpeg_dec_set_bs_info(void __iomem *base, bool support_34bit,
+                                    dma_addr_t addr, u32 size, u32 bitstream_size)
 {
+       u32 val;
+
        mtk_jpeg_verify_align(addr, 16, JPGDEC_REG_FILE_ADDR);
        mtk_jpeg_verify_align(size, 128, JPGDEC_REG_FILE_TOTAL_SIZE);
-       writel(addr, base + JPGDEC_REG_FILE_ADDR);
+       writel(lower_32_bits(addr), base + JPGDEC_REG_FILE_ADDR);
+       if (support_34bit) {
+               val = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(addr));
+               writel(val, base + JPGDEC_REG_FILE_ADDR_EXT);
+       }
        writel(size, base + JPGDEC_REG_FILE_TOTAL_SIZE);
        writel(bitstream_size, base + JPGDEC_REG_BIT_STREAM_SIZE);
 }
@@ -404,6 +438,7 @@ static void mtk_jpeg_dec_set_sampling_factor(void __iomem *base, u32 comp_num,
 }
 
 void mtk_jpeg_dec_set_config(void __iomem *base,
+                            bool support_34bits,
                             struct mtk_jpeg_dec_param *cfg,
                             u32 bitstream_size,
                             struct mtk_jpeg_bs *bs,
@@ -413,8 +448,8 @@ void mtk_jpeg_dec_set_config(void __iomem *base,
        mtk_jpeg_dec_set_dec_mode(base, 0);
        mtk_jpeg_dec_set_comp0_du(base, cfg->unit_num);
        mtk_jpeg_dec_set_total_mcu(base, cfg->total_mcu);
-       mtk_jpeg_dec_set_bs_info(base, bs->str_addr, bs->size, bitstream_size);
-       mtk_jpeg_dec_set_bs_write_ptr(base, bs->end_addr);
+       mtk_jpeg_dec_set_bs_info(base, support_34bits, bs->str_addr, bs->size, bitstream_size);
+       mtk_jpeg_dec_set_bs_write_ptr(base, support_34bits, bs->end_addr);
        mtk_jpeg_dec_set_du_membership(base, cfg->membership, 1,
                                       (cfg->comp_num == 1) ? 1 : 0);
        mtk_jpeg_dec_set_comp_id(base, cfg->comp_id[0], cfg->comp_id[1],
@@ -432,9 +467,9 @@ void mtk_jpeg_dec_set_config(void __iomem *base,
                                    cfg->mem_stride[1]);
        mtk_jpeg_dec_set_img_stride(base, cfg->img_stride[0],
                                    cfg->img_stride[1]);
-       mtk_jpeg_dec_set_dst_bank0(base, fb->plane_addr[0],
+       mtk_jpeg_dec_set_dst_bank0(base, support_34bits, fb->plane_addr[0],
                                   fb->plane_addr[1], fb->plane_addr[2]);
-       mtk_jpeg_dec_set_dst_bank1(base, 0, 0, 0);
+       mtk_jpeg_dec_set_dst_bank1(base, support_34bits, 0, 0, 0);
        mtk_jpeg_dec_set_dma_group(base, cfg->dma_mcu, cfg->dma_group,
                                   cfg->dma_last_mcu);
        mtk_jpeg_dec_set_pause_mcu_idx(base, cfg->total_mcu);
index 8c31c6b124178c61c6ace7d8d98966a8647553f4..2948c9c300a4cf91160a23458a00fcf5c1adfc31 100644 (file)
@@ -71,6 +71,7 @@ int mtk_jpeg_dec_fill_param(struct mtk_jpeg_dec_param *param);
 u32 mtk_jpeg_dec_get_int_status(void __iomem *dec_reg_base);
 u32 mtk_jpeg_dec_enum_result(u32 irq_result);
 void mtk_jpeg_dec_set_config(void __iomem *base,
+                            bool support_34bits,
                             struct mtk_jpeg_dec_param *cfg,
                             u32 bitstream_size,
                             struct mtk_jpeg_bs *bs,
index 27b7711ca341998c8d89b99740dde82a1e8c87a5..e94f52de7c690cae1c67304c27686eea096f8e8c 100644 (file)
 #define JPGDEC_REG_INTERRUPT_STATUS    0x0274
 #define JPGDEC_REG_STATUS              0x0278
 #define JPGDEC_REG_BIT_STREAM_SIZE     0x0344
+#define JPGDEC_REG_DEST_ADDR0_Y_EXT    0x0360
+#define JPGDEC_REG_DEST_ADDR0_U_EXT    0x0364
+#define JPGDEC_REG_DEST_ADDR0_V_EXT    0x0368
+#define JPGDEC_REG_DEST_ADDR1_Y_EXT    0x036c
+#define JPGDEC_REG_DEST_ADDR1_U_EXT    0x0370
+#define JPGDEC_REG_DEST_ADDR1_V_EXT    0x0374
+#define JPGDEC_REG_FILE_ADDR_EXT       0x0378
+#define JPGDEC_REG_FILE_BRP_EXT                0x037c
 
 #endif /* _MTK_JPEG_REG_H */
index f8fa3b841ccfb0602246f307742591d7ac61b531..9ab27aee302afa4e971ac285039a0f55e9b37c23 100644 (file)
@@ -5,6 +5,8 @@
  *
  */
 
+#include <linux/bitfield.h>
+#include <linux/bits.h>
 #include <linux/clk.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -62,9 +64,9 @@ void mtk_jpeg_enc_reset(void __iomem *base)
 }
 EXPORT_SYMBOL_GPL(mtk_jpeg_enc_reset);
 
-u32 mtk_jpeg_enc_get_file_size(void __iomem *base)
+u32 mtk_jpeg_enc_get_file_size(void __iomem *base, bool support_34bit)
 {
-       return readl(base + JPEG_ENC_DMA_ADDR0) -
+       return (readl(base + JPEG_ENC_DMA_ADDR0) << ((support_34bit) ? 2 : 0)) -
               readl(base + JPEG_ENC_DST_ADDR0);
 }
 EXPORT_SYMBOL_GPL(mtk_jpeg_enc_get_file_size);
@@ -84,14 +86,24 @@ void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx,  void __iomem *base,
 {
        int i;
        dma_addr_t dma_addr;
+       u32 addr_ext;
+       bool support_34bit = ctx->jpeg->variant->support_34bit;
 
        for (i = 0; i < src_buf->num_planes; i++) {
                dma_addr = vb2_dma_contig_plane_dma_addr(src_buf, i) +
                           src_buf->planes[i].data_offset;
-               if (!i)
-                       writel(dma_addr, base + JPEG_ENC_SRC_LUMA_ADDR);
+               if (i == 0)
+                       writel(lower_32_bits(dma_addr), base + JPEG_ENC_SRC_LUMA_ADDR);
                else
-                       writel(dma_addr, base + JPEG_ENC_SRC_CHROMA_ADDR);
+                       writel(lower_32_bits(dma_addr), base + JPEG_ENC_SRC_CHROMA_ADDR);
+
+               if (support_34bit) {
+                       addr_ext = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(dma_addr));
+                       if (i == 0)
+                               writel(addr_ext, base + JPEG_ENC_SRC_LUMA_ADDR_EXT);
+                       else
+                               writel(addr_ext, base + JPEG_ENC_SRC_CHRO_ADDR_EXT);
+               }
        }
 }
 EXPORT_SYMBOL_GPL(mtk_jpeg_set_enc_src);
@@ -103,6 +115,8 @@ void mtk_jpeg_set_enc_dst(struct mtk_jpeg_ctx *ctx, void __iomem *base,
        size_t size;
        u32 dma_addr_offset;
        u32 dma_addr_offsetmask;
+       u32 addr_ext;
+       bool support_34bit = ctx->jpeg->variant->support_34bit;
 
        dma_addr = vb2_dma_contig_plane_dma_addr(dst_buf, 0);
        dma_addr_offset = ctx->enable_exif ? MTK_JPEG_MAX_EXIF_SIZE : 0;
@@ -113,6 +127,12 @@ void mtk_jpeg_set_enc_dst(struct mtk_jpeg_ctx *ctx, void __iomem *base,
        writel(dma_addr_offsetmask & 0xf, base + JPEG_ENC_BYTE_OFFSET_MASK);
        writel(dma_addr & ~0xf, base + JPEG_ENC_DST_ADDR0);
        writel((dma_addr + size) & ~0xf, base + JPEG_ENC_STALL_ADDR0);
+
+       if (support_34bit) {
+               addr_ext = FIELD_PREP(MTK_JPEG_ADDR_MASK, upper_32_bits(dma_addr));
+               writel(addr_ext, base + JPEG_ENC_DEST_ADDR0_EXT);
+               writel(addr_ext + size, base + JPEG_ENC_STALL_ADDR0_EXT);
+       }
 }
 EXPORT_SYMBOL_GPL(mtk_jpeg_set_enc_dst);
 
@@ -278,7 +298,8 @@ static irqreturn_t mtk_jpegenc_hw_irq_handler(int irq, void *priv)
        if (!(irq_status & JPEG_ENC_INT_STATUS_DONE))
                dev_warn(jpeg->dev, "Jpg Enc occurs unknown Err.");
 
-       result_size = mtk_jpeg_enc_get_file_size(jpeg->reg_base);
+       result_size = mtk_jpeg_enc_get_file_size(jpeg->reg_base,
+                                                ctx->jpeg->variant->support_34bit);
        vb2_set_plane_payload(&dst_buf->vb2_buf, 0, result_size);
        buf_state = VB2_BUF_STATE_DONE;
        v4l2_m2m_buf_done(src_buf, buf_state);
index 61c60e4e58ea925275f489648360b0ad48588584..31ec9030ae881c59e5686d905e8b122e3d50549d 100644 (file)
 #define JPEG_ENC_DCM_CTRL              0x300
 #define JPEG_ENC_CODEC_SEL             0x314
 #define JPEG_ENC_ULTRA_THRES           0x318
+#define JPEG_ENC_SRC_LUMA_ADDR_EXT      0x584
+#define JPEG_ENC_SRC_CHRO_ADDR_EXT      0x588
+#define JPEG_ENC_Q_TBL_ADDR_EXT         0x58C
+#define JPEG_ENC_DEST_ADDR0_EXT         0x590
+#define JPEG_ENC_STALL_ADDR0_EXT        0x594
 
 /**
  * struct mtk_jpeg_enc_qlt - JPEG encoder quality data
@@ -80,7 +85,7 @@ struct mtk_jpeg_enc_qlt {
 };
 
 void mtk_jpeg_enc_reset(void __iomem *base);
-u32 mtk_jpeg_enc_get_file_size(void __iomem *base);
+u32 mtk_jpeg_enc_get_file_size(void __iomem *base, bool support_34bit);
 void mtk_jpeg_enc_start(void __iomem *enc_reg_base);
 void mtk_jpeg_set_enc_src(struct mtk_jpeg_ctx *ctx,  void __iomem *base,
                          struct vb2_buffer *src_buf);