clk: renesas: rcar-gen3: Correct parent clock of SYS-DMAC

[ Upstream commit 3c772f71a552d343a96868ed9a809f9047be94f5 ]

The clock sources of the AXI BUS clock (266.66 MHz) used for SYS-DMAC
DMA transfers are:

    Channel      R-Car H3    R-Car M3-W    R-Car M3-N
    -------------------------------------------------
    SYS-DMAC0    S0D3        S0D3          S0D3
    SYS-DMAC1    S3D1        S3D1          S3D1
    SYS-DMAC2    S3D1        S3D1          S3D1

As a result, change the parent clocks of the SYS-DMAC{1,2} module clocks
on R-Car H3, R-Car M3-W, and R-Car M3-N to S3D1.

NOTE: This information will be reflected in a future revision of the
      R-Car Gen3 Hardware Manual.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Update RZ/G2M]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/clk/renesas/r8a774a1-cpg-mssr.c b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
index 10e852518870c9ab50df1e2e64451d604020125e..ddde2a7a242739d1a619412566255c89755fda28 100644 (file)
--- a/drivers/clk/renesas/r8a774a1-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a774a1-cpg-mssr.c
@@ -122,8 +122,8 @@ static const struct mssr_mod_clk r8a774a1_mod_clks[] __initconst = {
        DEF_MOD("msiof2",                209,   R8A774A1_CLK_MSO),
        DEF_MOD("msiof1",                210,   R8A774A1_CLK_MSO),
        DEF_MOD("msiof0",                211,   R8A774A1_CLK_MSO),
-       DEF_MOD("sys-dmac2",             217,   R8A774A1_CLK_S0D3),
-       DEF_MOD("sys-dmac1",             218,   R8A774A1_CLK_S0D3),
+       DEF_MOD("sys-dmac2",             217,   R8A774A1_CLK_S3D1),
+       DEF_MOD("sys-dmac1",             218,   R8A774A1_CLK_S3D1),
        DEF_MOD("sys-dmac0",             219,   R8A774A1_CLK_S0D3),
        DEF_MOD("cmt3",                  300,   R8A774A1_CLK_R),
        DEF_MOD("cmt2",                  301,   R8A774A1_CLK_R),

diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 86842c9fd314e9241da9cabc1edf8461d9e05550..eade38e9ed36bc57dfb1c21041a1139f7a2c6a00 100644 (file)
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -129,8 +129,8 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
        DEF_MOD("msiof2",                209,   R8A7795_CLK_MSO),
        DEF_MOD("msiof1",                210,   R8A7795_CLK_MSO),
        DEF_MOD("msiof0",                211,   R8A7795_CLK_MSO),
-       DEF_MOD("sys-dmac2",             217,   R8A7795_CLK_S0D3),
-       DEF_MOD("sys-dmac1",             218,   R8A7795_CLK_S0D3),
+       DEF_MOD("sys-dmac2",             217,   R8A7795_CLK_S3D1),
+       DEF_MOD("sys-dmac1",             218,   R8A7795_CLK_S3D1),
        DEF_MOD("sys-dmac0",             219,   R8A7795_CLK_S0D3),
        DEF_MOD("sceg-pub",              229,   R8A7795_CLK_CR),
        DEF_MOD("cmt3",                  300,   R8A7795_CLK_R),

diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 12c455859f2c28f2d97fc149d39304897b445913..654f3ea88f335917fe062ea8e5b955dc5d9a9d34 100644 (file)
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -126,8 +126,8 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
        DEF_MOD("msiof2",                209,   R8A7796_CLK_MSO),
        DEF_MOD("msiof1",                210,   R8A7796_CLK_MSO),
        DEF_MOD("msiof0",                211,   R8A7796_CLK_MSO),
-       DEF_MOD("sys-dmac2",             217,   R8A7796_CLK_S0D3),
-       DEF_MOD("sys-dmac1",             218,   R8A7796_CLK_S0D3),
+       DEF_MOD("sys-dmac2",             217,   R8A7796_CLK_S3D1),
+       DEF_MOD("sys-dmac1",             218,   R8A7796_CLK_S3D1),
        DEF_MOD("sys-dmac0",             219,   R8A7796_CLK_S0D3),
        DEF_MOD("cmt3",                  300,   R8A7796_CLK_R),
        DEF_MOD("cmt2",                  301,   R8A7796_CLK_R),

diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index eb1cca58a1e1ff079d7a37d6ada2350689144b56..13d1f88be04a57af7d6648fb3a23a191a95d9f15 100644 (file)
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -123,8 +123,8 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
        DEF_MOD("msiof2",               209,    R8A77965_CLK_MSO),
        DEF_MOD("msiof1",               210,    R8A77965_CLK_MSO),
        DEF_MOD("msiof0",               211,    R8A77965_CLK_MSO),
-       DEF_MOD("sys-dmac2",            217,    R8A77965_CLK_S0D3),
-       DEF_MOD("sys-dmac1",            218,    R8A77965_CLK_S0D3),
+       DEF_MOD("sys-dmac2",            217,    R8A77965_CLK_S3D1),
+       DEF_MOD("sys-dmac1",            218,    R8A77965_CLK_S3D1),
        DEF_MOD("sys-dmac0",            219,    R8A77965_CLK_S0D3),
 
        DEF_MOD("cmt3",                 300,    R8A77965_CLK_R),