Add documentation for the dma-channel-mask property in the fsl-edma
binding. This property uses an inverted bit definition: bit value 0
indicates the channel is available, while bit value 1 indicates
unavailable.
That was already used widely for i.MX8, i.MX9. Correcting the definition
will break backward compatibility. This reversal only impacts the eDMA
dts node and driver, and doesn't impact DMA consumer. Therefore,
keep the inverted definition.
Also add a note at the top of the binding to highlight this inverted
definition to prevent confusion.
Signed-off-by: Joy Zou <joy.zou@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20260211-b4-imx95-v2x-v4-1-10852754b267@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
DMAMUX0 and DMAMUX1, specific DMA request source can only be multiplexed
by any channel of certain group, DMAMUX0 or DMAMUX1, but not both.
+ This binding has an inverted dma-channel-mask definition compared to
+ the common DMA binding for historical reasons.
+
maintainers:
- Peng Fan <peng.fan@nxp.com>
eDMA are implemented in big endian mode, otherwise in little mode.
type: boolean
+ dma-channel-mask:
+ description: |
+ Bitmask of available DMA channels (inverted definition).
+ Bit semantics: 0 means channel available, 1 means channel unavailable
+ default: 0
+
required:
- "#dma-cells"
- compatible