soc/tegra: fuse: Add Tegra186 chip ID support

The register region containing chip ID information has been relocated in
Tegra186 and changed in backwards-incompatible ways. Add a compatible
string to allow the driver to make the distinction.

Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
index b1f8b23277b9417a8d8be220fbe79e2a3754d308..e5a4d8f98b10e5df1dc1ed292d7bef5d866ec1eb 100644 (file)
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@ -74,6 +74,7 @@ u32 tegra_read_ram_code(void)
 
 static const struct of_device_id apbmisc_match[] __initconst = {
        { .compatible = "nvidia,tegra20-apbmisc", },
+       { .compatible = "nvidia,tegra186-misc", },
        {},
 };