]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
scsi: ufs: ufs-qcom: Enable Auto Hibern8 clock request support
authorPalash Kambar <palash.kambar@oss.qualcomm.com>
Thu, 23 Apr 2026 10:20:23 +0000 (15:50 +0530)
committerMartin K. Petersen <martin.petersen@oracle.com>
Fri, 15 May 2026 02:19:08 +0000 (22:19 -0400)
On platforms that support Auto Hibern8 (AH8), the UFS controller can
autonomously de-assert clk_req signals to the Global Clock Controller
when entering the Hibern8 state. This allows Global Clock Controller
(GCC) to gate unused clocks, improving power efficiency.

Enable the Clock Request feature by setting the UFS_HW_CLK_CTRL_EN bit
in the UFS_AH8_CFG register, as recommended in the Hardware Programming
Guidelines.

Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Palash Kambar <palash.kambar@oss.qualcomm.com>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Link: https://patch.msgid.link/20260423102023.3779489-3-palash.kambar@oss.qualcomm.com
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/ufs/host/ufs-qcom.c
drivers/ufs/host/ufs-qcom.h

index bc037db46624adaf494d08f6c2a2c55c9ed24606..c084ccc725235bedb45ee54eee3a3311f23a5518 100644 (file)
@@ -705,6 +705,13 @@ cfg_timers:
        return 0;
 }
 
+static void ufs_qcom_link_startup_post_change(struct ufs_hba *hba)
+{
+       if (ufshcd_is_auto_hibern8_supported(hba))
+               ufshcd_rmwl(hba, UFS_HW_CLK_CTRL_EN, UFS_HW_CLK_CTRL_EN,
+                           UFS_AH8_CFG);
+}
+
 static int ufs_qcom_link_startup_notify(struct ufs_hba *hba,
                                        enum ufs_notify_change_status status)
 {
@@ -730,6 +737,9 @@ static int ufs_qcom_link_startup_notify(struct ufs_hba *hba,
                 */
                err = ufshcd_disable_host_tx_lcc(hba);
 
+               break;
+       case POST_CHANGE:
+               ufs_qcom_link_startup_post_change(hba);
                break;
        default:
                break;
index 5d083331a7f43a4bb21c65a62f78b4b7a487830d..e20b3ca505775cd7f20eeffa544f698ead61912f 100644 (file)
@@ -268,6 +268,17 @@ enum {
  */
 #define NUM_TX_R1W1 13
 
+/* bit definitions for UFS_AH8_CFG register */
+#define CC_UFS_SYS_CLK_REQ_EN          BIT(2)
+#define CC_UFS_ICE_CORE_CLK_REQ_EN     BIT(3)
+#define CC_UFS_UNIPRO_CORE_CLK_REQ_EN  BIT(4)
+#define CC_UFS_AUXCLK_REQ_EN           BIT(5)
+
+#define UFS_HW_CLK_CTRL_EN     (CC_UFS_SYS_CLK_REQ_EN |\
+                               CC_UFS_ICE_CORE_CLK_REQ_EN |\
+                               CC_UFS_UNIPRO_CORE_CLK_REQ_EN |\
+                               CC_UFS_AUXCLK_REQ_EN)
+
 static inline void
 ufs_qcom_get_controller_revision(struct ufs_hba *hba,
                                 u8 *major, u16 *minor, u16 *step)