--- /dev/null
+From 51773846fab24a353bed4ebb660997ced4bc32d7 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1@gmail.com>
+Date: Mon, 3 Feb 2025 21:33:39 +0100
+Subject: [PATCH] net: phy: realtek: make HWMON support a user-visible Kconfig
+ symbol
+
+Make config symbol REALTEK_PHY_HWMON user-visible, so that users can
+remove support if not needed.
+
+Suggested-by: Geert Uytterhoeven <geert@linux-m68k.org>
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Reviewed-by: Simon Horman <horms@kernel.org>
+Link: https://patch.msgid.link/3466ee92-166a-4b0f-9ae7-42b9e046f333@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek/Kconfig | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/phy/realtek/Kconfig
++++ b/drivers/net/phy/realtek/Kconfig
+@@ -4,8 +4,12 @@ config REALTEK_PHY
+ help
+ Currently supports RTL821x/RTL822x and fast ethernet PHYs
+
++if REALTEK_PHY
++
+ config REALTEK_PHY_HWMON
+- def_bool REALTEK_PHY && HWMON
+- depends on !(REALTEK_PHY=y && HWMON=m)
++ bool "HWMON support for Realtek PHYs"
++ depends on HWMON && !(REALTEK_PHY=y && HWMON=m)
+ help
+ Optional hwmon support for the temperature sensor
++
++endif # REALTEK_PHY
--- /dev/null
+From 0bea93fdbaf8675b7e8124bdcaf51497dcc8bcfa Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1@gmail.com>
+Date: Mon, 3 Feb 2025 21:41:36 +0100
+Subject: [PATCH] net: phy: realtek: use string choices helpers
+
+Use string choices helpers to simplify the code.
+
+Reported-by: kernel test robot <lkp@intel.com>
+Closes: https://lore.kernel.org/oe-kbuild-all/202501190707.qQS8PGHW-lkp@intel.com/
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Reviewed-by: Simon Horman <horms@kernel.org>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/realtek/realtek_main.c | 9 +++++----
+ 1 file changed, 5 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -13,6 +13,7 @@
+ #include <linux/module.h>
+ #include <linux/delay.h>
+ #include <linux/clk.h>
++#include <linux/string_choices.h>
+
+ #include "realtek.h"
+
+@@ -422,11 +423,11 @@ static int rtl8211f_config_init(struct p
+ } else if (ret) {
+ dev_dbg(dev,
+ "%s 2ns TX delay (and changing the value from pin-strapping RXD1 or the bootloader)\n",
+- val_txdly ? "Enabling" : "Disabling");
++ str_enable_disable(val_txdly));
+ } else {
+ dev_dbg(dev,
+ "2ns TX delay was already %s (by pin-strapping RXD1 or bootloader configuration)\n",
+- val_txdly ? "enabled" : "disabled");
++ str_enabled_disabled(val_txdly));
+ }
+
+ ret = phy_modify_paged_changed(phydev, 0xd08, 0x15, RTL8211F_RX_DELAY,
+@@ -437,11 +438,11 @@ static int rtl8211f_config_init(struct p
+ } else if (ret) {
+ dev_dbg(dev,
+ "%s 2ns RX delay (and changing the value from pin-strapping RXD0 or the bootloader)\n",
+- val_rxdly ? "Enabling" : "Disabling");
++ str_enable_disable(val_rxdly));
+ } else {
+ dev_dbg(dev,
+ "2ns RX delay was already %s (by pin-strapping RXD0 or bootloader configuration)\n",
+- val_rxdly ? "enabled" : "disabled");
++ str_enabled_disabled(val_rxdly));
+ }
+
+ if (priv->has_phycr2) {
--- /dev/null
+From da681ed73fb980286fc29de707b35d76bb33e123 Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1@gmail.com>
+Date: Thu, 13 Feb 2025 20:18:17 +0100
+Subject: [PATCH] net: phy: realtek: improve mmd register access for internal
+ PHY's
+
+r8169 provides the MDIO bus for the internal PHY's. It has been extended
+with c45 access functions for addressing MDIO_MMD_VEND2 registers.
+So we can switch from paged access to directly addressing the
+MDIO_MMD_VEND2 registers.
+
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://patch.msgid.link/a5f2333c-dda9-48ad-9801-77049766e632@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 79 +++++++++++---------------
+ 1 file changed, 33 insertions(+), 46 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -735,29 +735,31 @@ static int rtlgen_read_status(struct phy
+ return 0;
+ }
+
++static int rtlgen_read_vend2(struct phy_device *phydev, int regnum)
++{
++ return __mdiobus_c45_read(phydev->mdio.bus, 0, MDIO_MMD_VEND2, regnum);
++}
++
++static int rtlgen_write_vend2(struct phy_device *phydev, int regnum, u16 val)
++{
++ return __mdiobus_c45_write(phydev->mdio.bus, 0, MDIO_MMD_VEND2, regnum,
++ val);
++}
++
+ static int rtlgen_read_mmd(struct phy_device *phydev, int devnum, u16 regnum)
+ {
+ int ret;
+
+- if (devnum == MDIO_MMD_VEND2) {
+- rtl821x_write_page(phydev, regnum >> 4);
+- ret = __phy_read(phydev, 0x10 + ((regnum & 0xf) >> 1));
+- rtl821x_write_page(phydev, 0);
+- } else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE) {
+- rtl821x_write_page(phydev, 0xa5c);
+- ret = __phy_read(phydev, 0x12);
+- rtl821x_write_page(phydev, 0);
+- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
+- rtl821x_write_page(phydev, 0xa5d);
+- ret = __phy_read(phydev, 0x10);
+- rtl821x_write_page(phydev, 0);
+- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE) {
+- rtl821x_write_page(phydev, 0xa5d);
+- ret = __phy_read(phydev, 0x11);
+- rtl821x_write_page(phydev, 0);
+- } else {
++ if (devnum == MDIO_MMD_VEND2)
++ ret = rtlgen_read_vend2(phydev, regnum);
++ else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE)
++ ret = rtlgen_read_vend2(phydev, 0xa5c4);
++ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
++ ret = rtlgen_read_vend2(phydev, 0xa5d0);
++ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE)
++ ret = rtlgen_read_vend2(phydev, 0xa5d2);
++ else
+ ret = -EOPNOTSUPP;
+- }
+
+ return ret;
+ }
+@@ -767,17 +769,12 @@ static int rtlgen_write_mmd(struct phy_d
+ {
+ int ret;
+
+- if (devnum == MDIO_MMD_VEND2) {
+- rtl821x_write_page(phydev, regnum >> 4);
+- ret = __phy_write(phydev, 0x10 + ((regnum & 0xf) >> 1), val);
+- rtl821x_write_page(phydev, 0);
+- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV) {
+- rtl821x_write_page(phydev, 0xa5d);
+- ret = __phy_write(phydev, 0x10, val);
+- rtl821x_write_page(phydev, 0);
+- } else {
++ if (devnum == MDIO_MMD_VEND2)
++ ret = rtlgen_write_vend2(phydev, regnum, val);
++ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
++ ret = rtlgen_write_vend2(phydev, regnum, 0xa5d0);
++ else
+ ret = -EOPNOTSUPP;
+- }
+
+ return ret;
+ }
+@@ -789,19 +786,12 @@ static int rtl822x_read_mmd(struct phy_d
+ if (ret != -EOPNOTSUPP)
+ return ret;
+
+- if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2) {
+- rtl821x_write_page(phydev, 0xa6e);
+- ret = __phy_read(phydev, 0x16);
+- rtl821x_write_page(phydev, 0);
+- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
+- rtl821x_write_page(phydev, 0xa6d);
+- ret = __phy_read(phydev, 0x12);
+- rtl821x_write_page(phydev, 0);
+- } else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2) {
+- rtl821x_write_page(phydev, 0xa6d);
+- ret = __phy_read(phydev, 0x10);
+- rtl821x_write_page(phydev, 0);
+- }
++ if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2)
++ ret = rtlgen_read_vend2(phydev, 0xa6ec);
++ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
++ ret = rtlgen_read_vend2(phydev, 0xa6d4);
++ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2)
++ ret = rtlgen_read_vend2(phydev, 0xa6d0);
+
+ return ret;
+ }
+@@ -814,11 +804,8 @@ static int rtl822x_write_mmd(struct phy_
+ if (ret != -EOPNOTSUPP)
+ return ret;
+
+- if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2) {
+- rtl821x_write_page(phydev, 0xa6d);
+- ret = __phy_write(phydev, 0x12, val);
+- rtl821x_write_page(phydev, 0);
+- }
++ if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
++ ret = rtlgen_write_vend2(phydev, 0xa6d4, val);
+
+ return ret;
+ }
--- /dev/null
+From 02d3b306ac2f0b174753d1c5b9e4e5fb8ec5057e Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1@gmail.com>
+Date: Thu, 13 Feb 2025 20:19:14 +0100
+Subject: [PATCH] net: phy: realtek: switch from paged to MMD ops in rtl822x
+ functions
+
+The MDIO bus provided by r8169 for the internal PHY's now supports
+c45 ops for the MDIO_MMD_VEND2 device. So we can switch to standard
+MMD ops here.
+
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://patch.msgid.link/81416f95-0fac-4225-87b4-828e3738b8ed@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 11 +++++------
+ 1 file changed, 5 insertions(+), 6 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -901,7 +901,7 @@ static int rtl822x_get_features(struct p
+ {
+ int val;
+
+- val = phy_read_paged(phydev, 0xa61, 0x13);
++ val = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa616);
+ if (val < 0)
+ return val;
+
+@@ -922,10 +922,9 @@ static int rtl822x_config_aneg(struct ph
+ if (phydev->autoneg == AUTONEG_ENABLE) {
+ u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
+
+- ret = phy_modify_paged_changed(phydev, 0xa5d, 0x12,
+- MDIO_AN_10GBT_CTRL_ADV2_5G |
+- MDIO_AN_10GBT_CTRL_ADV5G,
+- adv);
++ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, 0xa5d4,
++ MDIO_AN_10GBT_CTRL_ADV2_5G |
++ MDIO_AN_10GBT_CTRL_ADV5G, adv);
+ if (ret < 0)
+ return ret;
+ }
+@@ -969,7 +968,7 @@ static int rtl822x_read_status(struct ph
+ !phydev->autoneg_complete)
+ return 0;
+
+- lpadv = phy_read_paged(phydev, 0xa5d, 0x13);
++ lpadv = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa5d6);
+ if (lpadv < 0)
+ return lpadv;
+
--- /dev/null
+From 8af2136e77989a64fae0284bf76fd584e32edd3a Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1@gmail.com>
+Date: Fri, 14 Feb 2025 21:31:14 +0100
+Subject: [PATCH] net: phy: realtek: add helper RTL822X_VND2_C22_REG
+
+C22 register space is mapped to 0xa400 in MMD VEND2 register space.
+Add a helper to access mapped C22 registers.
+
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://patch.msgid.link/6344277b-c5c7-449b-ac89-d5425306ca76@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 9 ++++-----
+ 1 file changed, 4 insertions(+), 5 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -79,9 +79,7 @@
+ /* RTL822X_VND2_XXXXX registers are only accessible when phydev->is_c45
+ * is set, they cannot be accessed by C45-over-C22.
+ */
+-#define RTL822X_VND2_GBCR 0xa412
+-
+-#define RTL822X_VND2_GANLPAR 0xa414
++#define RTL822X_VND2_C22_REG(reg) (0xa400 + 2 * (reg))
+
+ #define RTL8366RB_POWER_SAVE 0x15
+ #define RTL8366RB_POWER_SAVE_ON BIT(12)
+@@ -1015,7 +1013,8 @@ static int rtl822x_c45_config_aneg(struc
+ val = linkmode_adv_to_mii_ctrl1000_t(phydev->advertising);
+
+ /* Vendor register as C45 has no standardized support for 1000BaseT */
+- ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, RTL822X_VND2_GBCR,
++ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2,
++ RTL822X_VND2_C22_REG(MII_CTRL1000),
+ ADVERTISE_1000FULL, val);
+ if (ret < 0)
+ return ret;
+@@ -1032,7 +1031,7 @@ static int rtl822x_c45_read_status(struc
+ /* Vendor register as C45 has no standardized support for 1000BaseT */
+ if (phydev->autoneg == AUTONEG_ENABLE && genphy_c45_aneg_done(phydev)) {
+ val = phy_read_mmd(phydev, MDIO_MMD_VEND2,
+- RTL822X_VND2_GANLPAR);
++ RTL822X_VND2_C22_REG(MII_STAT1000));
+ if (val < 0)
+ return val;
+ } else {
--- /dev/null
+From fabcfd6d10999024a721ae1b965b57eb8a305ace Mon Sep 17 00:00:00 2001
+From: Heiner Kallweit <hkallweit1@gmail.com>
+Date: Sat, 15 Feb 2025 14:29:15 +0100
+Subject: [PATCH] net: phy: realtek: add defines for shadowed c45 standard
+ registers
+
+Realtek shadows standard c45 registers in VEND2 device register space.
+Add defines for these VEND2 registers, based on the names of the
+standard c45 registers.
+
+Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://patch.msgid.link/c90bdf76-f8b8-4d06-9656-7a52d5658ee6@gmail.com
+Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+---
+ drivers/net/phy/realtek/realtek_main.c | 33 +++++++++++++++++---------
+ 1 file changed, 22 insertions(+), 11 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -94,6 +94,16 @@
+ #define RTL_VND2_PHYSR_MASTER BIT(11)
+ #define RTL_VND2_PHYSR_SPEED_MASK (RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
+
++#define RTL_MDIO_PCS_EEE_ABLE 0xa5c4
++#define RTL_MDIO_AN_EEE_ADV 0xa5d0
++#define RTL_MDIO_AN_EEE_LPABLE 0xa5d2
++#define RTL_MDIO_AN_10GBT_CTRL 0xa5d4
++#define RTL_MDIO_AN_10GBT_STAT 0xa5d6
++#define RTL_MDIO_PMA_SPEED 0xa616
++#define RTL_MDIO_AN_EEE_LPABLE2 0xa6d0
++#define RTL_MDIO_AN_EEE_ADV2 0xa6d4
++#define RTL_MDIO_PCS_EEE_ABLE2 0xa6ec
++
+ #define RTL_GENERIC_PHYID 0x001cc800
+ #define RTL_8211FVD_PHYID 0x001cc878
+ #define RTL_8221B 0x001cc840
+@@ -751,11 +761,11 @@ static int rtlgen_read_mmd(struct phy_de
+ if (devnum == MDIO_MMD_VEND2)
+ ret = rtlgen_read_vend2(phydev, regnum);
+ else if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE)
+- ret = rtlgen_read_vend2(phydev, 0xa5c4);
++ ret = rtlgen_read_vend2(phydev, RTL_MDIO_PCS_EEE_ABLE);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
+- ret = rtlgen_read_vend2(phydev, 0xa5d0);
++ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_ADV);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE)
+- ret = rtlgen_read_vend2(phydev, 0xa5d2);
++ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_LPABLE);
+ else
+ ret = -EOPNOTSUPP;
+
+@@ -770,7 +780,7 @@ static int rtlgen_write_mmd(struct phy_d
+ if (devnum == MDIO_MMD_VEND2)
+ ret = rtlgen_write_vend2(phydev, regnum, val);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV)
+- ret = rtlgen_write_vend2(phydev, regnum, 0xa5d0);
++ ret = rtlgen_write_vend2(phydev, regnum, RTL_MDIO_AN_EEE_ADV);
+ else
+ ret = -EOPNOTSUPP;
+
+@@ -785,11 +795,11 @@ static int rtl822x_read_mmd(struct phy_d
+ return ret;
+
+ if (devnum == MDIO_MMD_PCS && regnum == MDIO_PCS_EEE_ABLE2)
+- ret = rtlgen_read_vend2(phydev, 0xa6ec);
++ ret = rtlgen_read_vend2(phydev, RTL_MDIO_PCS_EEE_ABLE2);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
+- ret = rtlgen_read_vend2(phydev, 0xa6d4);
++ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_ADV2);
+ else if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_LPABLE2)
+- ret = rtlgen_read_vend2(phydev, 0xa6d0);
++ ret = rtlgen_read_vend2(phydev, RTL_MDIO_AN_EEE_LPABLE2);
+
+ return ret;
+ }
+@@ -803,7 +813,7 @@ static int rtl822x_write_mmd(struct phy_
+ return ret;
+
+ if (devnum == MDIO_MMD_AN && regnum == MDIO_AN_EEE_ADV2)
+- ret = rtlgen_write_vend2(phydev, 0xa6d4, val);
++ ret = rtlgen_write_vend2(phydev, RTL_MDIO_AN_EEE_ADV2, val);
+
+ return ret;
+ }
+@@ -899,7 +909,7 @@ static int rtl822x_get_features(struct p
+ {
+ int val;
+
+- val = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa616);
++ val = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_MDIO_PMA_SPEED);
+ if (val < 0)
+ return val;
+
+@@ -920,7 +930,8 @@ static int rtl822x_config_aneg(struct ph
+ if (phydev->autoneg == AUTONEG_ENABLE) {
+ u16 adv = linkmode_adv_to_mii_10gbt_adv_t(phydev->advertising);
+
+- ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2, 0xa5d4,
++ ret = phy_modify_mmd_changed(phydev, MDIO_MMD_VEND2,
++ RTL_MDIO_AN_10GBT_CTRL,
+ MDIO_AN_10GBT_CTRL_ADV2_5G |
+ MDIO_AN_10GBT_CTRL_ADV5G, adv);
+ if (ret < 0)
+@@ -966,7 +977,7 @@ static int rtl822x_read_status(struct ph
+ !phydev->autoneg_complete)
+ return 0;
+
+- lpadv = phy_read_mmd(phydev, MDIO_MMD_VEND2, 0xa5d6);
++ lpadv = phy_read_mmd(phydev, MDIO_MMD_VEND2, RTL_MDIO_AN_10GBT_STAT);
+ if (lpadv < 0)
+ return lpadv;
+
--- /dev/null
+From bfc17c1658353f22843c7c13e27c2d31950f1887 Mon Sep 17 00:00:00 2001
+From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
+Date: Sun, 16 Mar 2025 12:39:54 +0000
+Subject: [PATCH] net: phy: realtek: disable PHY-mode EEE
+
+Realtek RTL8211F has a "PHY-mode" EEE support which interferes with an
+IEEE 802.3 compliant implementation. This mode defaults to enabled, and
+results in the MAC receive path not seeing the link transition to LPI
+state.
+
+Fix this by disabling PHY-mode EEE.
+
+Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Link: https://patch.msgid.link/E1ttnHW-00785s-Uq@rmk-PC.armlinux.org.uk
+Signed-off-by: Paolo Abeni <pabeni@redhat.com>
+---
+ drivers/net/phy/realtek/realtek_main.c | 11 +++++++++--
+ 1 file changed, 9 insertions(+), 2 deletions(-)
+
+--- a/drivers/net/phy/realtek/realtek_main.c
++++ b/drivers/net/phy/realtek/realtek_main.c
+@@ -33,6 +33,9 @@
+
+ #define RTL8211F_PHYCR1 0x18
+ #define RTL8211F_PHYCR2 0x19
++#define RTL8211F_CLKOUT_EN BIT(0)
++#define RTL8211F_PHYCR2_PHY_EEE_ENABLE BIT(5)
++
+ #define RTL8211F_INSR 0x1d
+
+ #define RTL8211F_LEDCR 0x10
+@@ -55,8 +58,6 @@
+ #define RTL8211E_TX_DELAY BIT(12)
+ #define RTL8211E_RX_DELAY BIT(11)
+
+-#define RTL8211F_CLKOUT_EN BIT(0)
+-
+ #define RTL8201F_ISR 0x1e
+ #define RTL8201F_ISR_ANERR BIT(15)
+ #define RTL8201F_ISR_DUPLEX BIT(13)
+@@ -453,6 +454,12 @@ static int rtl8211f_config_init(struct p
+ str_enabled_disabled(val_rxdly));
+ }
+
++ /* Disable PHY-mode EEE so LPI is passed to the MAC */
++ ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
++ RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0);
++ if (ret)
++ return ret;
++
+ if (priv->has_phycr2) {
+ ret = phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2,
+ RTL8211F_CLKOUT_EN, priv->phycr2);
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1430,6 +1430,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1434,6 +1434,7 @@ static struct phy_driver realtek_drvs[]
}, {
.name = "RTL8226 2.5Gbps PHY",
.match_phy_device = rtl8226_match_phy_device,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
-@@ -1440,6 +1441,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1444,6 +1445,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_match_phy_device,
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
-@@ -1452,6 +1454,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1456,6 +1458,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
-@@ -1462,6 +1465,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1466,6 +1469,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
-@@ -1474,6 +1478,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1478,6 +1482,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
-@@ -1487,6 +1492,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1491,6 +1496,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
-@@ -1498,6 +1504,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1502,6 +1508,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
-@@ -1511,6 +1518,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1515,6 +1522,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -834,8 +834,8 @@ static int rtl822x_probe(struct phy_devi
+@@ -837,8 +837,8 @@ static int rtl822x_probe(struct phy_devi
static int rtl822xb_config_init(struct phy_device *phydev)
{
bool has_2500, has_sgmii;
has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
phydev->host_interfaces) ||
-@@ -885,7 +885,29 @@ static int rtl822xb_config_init(struct p
+@@ -888,7 +888,29 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1111,9 +1111,11 @@ static bool rtlgen_supports_2_5gbps(stru
+@@ -1115,9 +1115,11 @@ static bool rtlgen_supports_2_5gbps(stru
{
int val;
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
@@ -82,6 +82,10 @@
-
- #define RTL822X_VND2_GANLPAR 0xa414
+ */
+ #define RTL822X_VND2_C22_REG(reg) (0xa400 + 2 * (reg))
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
-@@ -889,6 +893,15 @@ static int rtl822xb_config_init(struct p
+@@ -892,6 +896,15 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1166,10 +1166,32 @@ static int rtl8226_match_phy_device(stru
+@@ -1170,10 +1170,32 @@ static int rtl8226_match_phy_device(stru
static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
bool is_c45)
{
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1377,6 +1377,51 @@ static irqreturn_t rtl9000a_handle_inter
+@@ -1381,6 +1381,51 @@ static irqreturn_t rtl9000a_handle_inter
return IRQ_HANDLED;
}
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
-@@ -1537,6 +1582,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1541,6 +1586,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
-@@ -1551,6 +1598,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1555,6 +1602,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
.config_init = rtl822xb_config_init,
-@@ -1563,6 +1612,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1567,6 +1616,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
.get_features = rtl822x_get_features,
-@@ -1577,6 +1628,8 @@ static struct phy_driver realtek_drvs[]
+@@ -1581,6 +1632,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -1043,6 +1043,9 @@ static int rtl822x_c45_get_features(stru
+@@ -1046,6 +1046,9 @@ static int rtl822x_c45_get_features(stru
linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT,
phydev->supported);
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -923,6 +923,22 @@ static int rtl822xb_config_init(struct p
+@@ -926,6 +926,22 @@ static int rtl822xb_config_init(struct p
return 0;
}
static int rtl822xb_get_rate_matching(struct phy_device *phydev,
phy_interface_t iface)
{
-@@ -1605,7 +1621,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1609,7 +1625,7 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
.config_aneg = rtl822x_c45_config_aneg,
-@@ -1635,7 +1651,7 @@ static struct phy_driver realtek_drvs[]
+@@ -1639,7 +1655,7 @@ static struct phy_driver realtek_drvs[]
.handle_interrupt = rtl8221b_handle_interrupt,
.soft_reset = genphy_soft_reset,
.probe = rtl822x_probe,
---
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c
-@@ -849,6 +849,11 @@ static int rtl822xb_config_init(struct p
+@@ -852,6 +852,11 @@ static int rtl822xb_config_init(struct p
phydev->host_interfaces) ||
phydev->interface == PHY_INTERFACE_MODE_SGMII;
projects / thirdparty / openwrt.git / commitdiff
