EDAC/igen6: Add Intel Wildcat Lake SoCs support

Intel Wildcat Lake is a mobile derivative of Panther Lake with one
memory controller. Wildcat Lake SoCs share the same IBECC registers
with Meteor Lake-P SoCs.

Add a compute die ID and a new configuration structure for Wildcat
Lake SoCs with In-Band ECC capability for EDAC support.

Signed-off-by: Lili Li <lili.li@intel.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20250704151609.7833-3-qiuxu.zhuo@intel.com

diff --git a/drivers/edac/igen6_edac.c b/drivers/edac/igen6_edac.c
index 5ffe9579959ffa98b5d2cc41261a90534bf6c33f..2fc59f9eed691e010d66a0357f4321916c32ccef 100644 (file)
--- a/drivers/edac/igen6_edac.c
+++ b/drivers/edac/igen6_edac.c
@@ -275,6 +275,9 @@ static struct work_struct ecclog_work;
 #define DID_PTL_H_SKU2 0xb001
 #define DID_PTL_H_SKU3 0xb002
 
+/* Compute die IDs for Wildcat Lake with IBECC */
+#define DID_WCL_SKU1   0xfd00
+
 static int get_mchbar(struct pci_dev *pdev, u64 *mchbar)
 {
        union  {
@@ -569,6 +572,17 @@ static struct res_config mtl_p_cfg = {
        .err_addr_to_imc_addr   = adl_err_addr_to_imc_addr,
 };
 
+static struct res_config wcl_cfg = {
+       .machine_check          = true,
+       .num_imc                = 1,
+       .imc_base               = 0xd800,
+       .ibecc_base             = 0xd400,
+       .ibecc_error_log_offset = 0x170,
+       .ibecc_available        = mtl_p_ibecc_available,
+       .err_addr_to_sys_addr   = adl_err_addr_to_sys_addr,
+       .err_addr_to_imc_addr   = adl_err_addr_to_imc_addr,
+};
+
 static struct pci_device_id igen6_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, DID_EHL_SKU5), (kernel_ulong_t)&ehl_cfg },
        { PCI_VDEVICE(INTEL, DID_EHL_SKU6), (kernel_ulong_t)&ehl_cfg },
@@ -622,6 +636,7 @@ static struct pci_device_id igen6_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, DID_PTL_H_SKU1), (kernel_ulong_t)&mtl_p_cfg },
        { PCI_VDEVICE(INTEL, DID_PTL_H_SKU2), (kernel_ulong_t)&mtl_p_cfg },
        { PCI_VDEVICE(INTEL, DID_PTL_H_SKU3), (kernel_ulong_t)&mtl_p_cfg },
+       { PCI_VDEVICE(INTEL, DID_WCL_SKU1), (kernel_ulong_t)&wcl_cfg },
        { },
 };
 MODULE_DEVICE_TABLE(pci, igen6_pci_tbl);