spi: cadence-qspi: Use a default value for cdns,fifo-width

Bindings expect 4 to be the default value for cdns,fifo-width. Said
otherwise, if the property (which is not mandatory) is not provided, the
OS, in order to comply with the bindings, should not error out and take
4 as default value.

Comply with the bindings. This would have slighlty simplyfied my testing
if it had been implemented correctly in the first place, but in practice
it should have no impact on the existing boards using this controller, as
they all set cdns,fifo-width to 4 explicitly in their upstream DTS.

Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com>
Tested-by: Santhosh Kumar K <s-k6@ti.com>
Link: https://patch.msgid.link/20260122-schneider-6-19-rc1-qspi-v4-13-f9c21419a3e6@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 8e6b4e21b2cf34d549db116ce1a2fa13fe3ab797..2d287950d44cc5d45598816751be4bdd6d700831 100644 (file)
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1598,10 +1598,8 @@ static int cqspi_of_get_pdata(struct cqspi_st *cqspi)
                cqspi->fifo_depth = 0;
        }
 
-       if (of_property_read_u32(np, "cdns,fifo-width", &cqspi->fifo_width)) {
-               dev_err(dev, "couldn't determine fifo-width\n");
-               return -ENXIO;
-       }
+       if (of_property_read_u32(np, "cdns,fifo-width", &cqspi->fifo_width))
+               cqspi->fifo_width = 4;
 
        if (of_property_read_u32(np, "cdns,trigger-address",
                                 &cqspi->trigger_address)) {