+2014-06-18 Tom de Vries <tom@codesourcery.com>
+
+ * config/aarch64/aarch64-protos.h (aarch64_emit_call_insn): Declare.
+ * config/aarch64/aarch64.c
+ (TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS): Redefine as true.
+ (aarch64_emit_call_insn): New function.
+ (aarch64_load_symref_appropriately): Use aarch64_emit_call_insn instead
+ of emit_call_insn.
+ * config/aarch64/aarch64.md (define_expand "call_internal")
+ (define_expand "call_value_internal", define_expand "sibcall_internal")
+ (define_expand "sibcall_value_internal"): New.
+ (define_expand "call", define_expand "call_value")
+ (define_expand "sibcall", define_expand "sibcall_value"): Use internal
+ expand variant and aarch64_emit_call_insn.
+
2014-06-18 Radovan Obradovic <robradovic@mips.com>
Tom de Vries <tom@codesourcery.com>
rtx result = gen_rtx_REG (Pmode, R0_REGNUM);
start_sequence ();
- emit_call_insn (gen_tlsgd_small (result, imm));
+ aarch64_emit_call_insn (gen_tlsgd_small (result, imm));
insns = get_insns ();
end_sequence ();
return true;
}
+/* Emit call insn with PAT and do aarch64-specific handling. */
+
+bool
+aarch64_emit_call_insn (rtx pat)
+{
+ rtx insn = emit_call_insn (pat);
+
+ rtx *fusage = &CALL_INSN_FUNCTION_USAGE (insn);
+ clobber_reg (fusage, gen_rtx_REG (word_mode, IP0_REGNUM));
+ clobber_reg (fusage, gen_rtx_REG (word_mode, IP1_REGNUM));
+}
+
enum machine_mode
aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y)
{
#undef TARGET_FLAGS_REGNUM
#define TARGET_FLAGS_REGNUM CC_REGNUM
+#undef TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS
+#define TARGET_CALL_FUSAGE_CONTAINS_NON_CALLEE_CLOBBERS true
+
struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-aarch64.h"
;; Subroutine calls and sibcalls
;; -------------------------------------------------------------------
+(define_expand "call_internal"
+ [(parallel [(call (match_operand 0 "memory_operand" "")
+ (match_operand 1 "general_operand" ""))
+ (use (match_operand 2 "" ""))
+ (clobber (reg:DI LR_REGNUM))])])
+
(define_expand "call"
[(parallel [(call (match_operand 0 "memory_operand" "")
(match_operand 1 "general_operand" ""))
""
"
{
- rtx callee;
+ rtx callee, pat;
/* In an untyped call, we can get NULL for operand 2. */
if (operands[2] == NULL)
? aarch64_is_long_call_p (callee)
: !REG_P (callee))
XEXP (operands[0], 0) = force_reg (Pmode, callee);
+
+ pat = gen_call_internal (operands[0], operands[1], operands[2]);
+ aarch64_emit_call_insn (pat);
+ DONE;
}"
)
[(set_attr "type" "call")]
)
+(define_expand "call_value_internal"
+ [(parallel [(set (match_operand 0 "" "")
+ (call (match_operand 1 "memory_operand" "")
+ (match_operand 2 "general_operand" "")))
+ (use (match_operand 3 "" ""))
+ (clobber (reg:DI LR_REGNUM))])])
+
(define_expand "call_value"
[(parallel [(set (match_operand 0 "" "")
(call (match_operand 1 "memory_operand" "")
""
"
{
- rtx callee;
+ rtx callee, pat;
/* In an untyped call, we can get NULL for operand 3. */
if (operands[3] == NULL)
? aarch64_is_long_call_p (callee)
: !REG_P (callee))
XEXP (operands[1], 0) = force_reg (Pmode, callee);
+
+ pat = gen_call_value_internal (operands[0], operands[1], operands[2],
+ operands[3]);
+ aarch64_emit_call_insn (pat);
+ DONE;
}"
)
[(set_attr "type" "call")]
)
+(define_expand "sibcall_internal"
+ [(parallel [(call (match_operand 0 "memory_operand" "")
+ (match_operand 1 "general_operand" ""))
+ (return)
+ (use (match_operand 2 "" ""))])])
+
(define_expand "sibcall"
[(parallel [(call (match_operand 0 "memory_operand" "")
(match_operand 1 "general_operand" ""))
(use (match_operand 2 "" ""))])]
""
{
+ rtx pat;
+
if (!REG_P (XEXP (operands[0], 0))
&& (GET_CODE (XEXP (operands[0], 0)) != SYMBOL_REF))
XEXP (operands[0], 0) = force_reg (Pmode, XEXP (operands[0], 0));
if (operands[2] == NULL_RTX)
operands[2] = const0_rtx;
+
+ pat = gen_sibcall_internal (operands[0], operands[1], operands[2]);
+ aarch64_emit_call_insn (pat);
+ DONE;
}
)
+(define_expand "sibcall_value_internal"
+ [(parallel [(set (match_operand 0 "" "")
+ (call (match_operand 1 "memory_operand" "")
+ (match_operand 2 "general_operand" "")))
+ (return)
+ (use (match_operand 3 "" ""))])])
+
(define_expand "sibcall_value"
[(parallel [(set (match_operand 0 "" "")
(call (match_operand 1 "memory_operand" "")
(use (match_operand 3 "" ""))])]
""
{
+ rtx pat;
+
if (!REG_P (XEXP (operands[1], 0))
&& (GET_CODE (XEXP (operands[1], 0)) != SYMBOL_REF))
XEXP (operands[1], 0) = force_reg (Pmode, XEXP (operands[1], 0));
if (operands[3] == NULL_RTX)
operands[3] = const0_rtx;
+
+ pat = gen_sibcall_value_internal (operands[0], operands[1], operands[2],
+ operands[3]);
+ aarch64_emit_call_insn (pat);
+ DONE;
}
)