arm64: dts: qcom: sm6115: Add CX_MEM/DBGC GPU regions

Describe the GPU register regions, with the former existing but not
being used much if at all on this silicon, and the latter containing
various debugging levers generally related to dumping the state of
the IP upon a crash.

Fixes: 11750af256f8 ("arm64: dts: qcom: sm6115: Add GPU nodes")
Reported-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Closes: https://lore.kernel.org/linux-arm-msm/8a64f70b-8034-45e7-86a3-0015cf357132@oss.qualcomm.com/T/#m404f1425c36b61467760f058b696b8910340a063
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251229-topic-6115_2290_gpu_dbgc-v1-3-4a24d196389c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 88513b51387142a52e66ee2f7dc91c59214682bb..e9336adbc39184374eb7e2d38eb5c01b7be4c947 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -1715,8 +1715,12 @@
 
                gpu: gpu@5900000 {
                        compatible = "qcom,adreno-610.0", "qcom,adreno";
-                       reg = <0x0 0x05900000 0x0 0x40000>;
-                       reg-names = "kgsl_3d0_reg_memory";
+                       reg = <0x0 0x05900000 0x0 0x40000>,
+                             <0x0 0x0599e000 0x0 0x1000>,
+                             <0x0 0x05961000 0x0 0x800>;
+                       reg-names = "kgsl_3d0_reg_memory",
+                                   "cx_mem",
+                                   "cx_dbgc";
 
                        /* There's no (real) GMU, so we have to handle quite a bunch of clocks! */
                        clocks = <&gpucc GPU_CC_GX_GFX3D_CLK>,