drm/xe/uapi: Add NO_COMPRESSION BO flag and query capability

Introduce DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION to let userspace
opt out of CCS compression on a per-BO basis. When set, the driver
maps this to XE_BO_FLAG_NO_COMPRESSION, skips CCS metadata
allocation/clearing, and rejects compressed PAT indices at vm_bind.
This avoids extra memory ops and manual CCS state handling for buffers.

To allow userspace to detect at runtime whether the kernel supports this
feature, add DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT and expose
it via query_config() on Xe2+ platforms.

Mesa PR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38425
IGT PR: https://patchwork.freedesktop.org/patch/685180/

v2
- Changed error code from -EINVAL to -EOPNOTSUPP for unsupported flag
  usage on pre-Xe2 platforms
- Fixed checkpatch warning in xe_vm.c
- Fixed kernel-doc formatting in xe_drm.h

v3
- Rebase
- Updated commit title and description
- Added UAPI for DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT and
  exposed it via query_config()

v4
- Rebase

v5
- Included Mesa PR and IGT PR in the commit description
- Used xe_pat_index_get_comp_en() to extract the compression

v6
- Added XE_IOCTL_DBG() checks for argument validation

Suggested-by: Matthew Auld <matthew.auld@intel.com>
Suggested-by: José Roberto de Souza <jose.souza@intel.com>
Acked-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Sanjay Yadav <sanjay.kumar.yadav@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patch.msgid.link/20251204040402.2692921-2-sanjay.kumar.yadav@intel.com

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index b67fd337ff19f0fdb7c4122853579572cc1039e0..6280e6a013ff4e1d8158efe292a57c64cee40ca7 100644 (file)
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -3178,7 +3178,8 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
        if (XE_IOCTL_DBG(xe, args->flags &
                         ~(DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING |
                           DRM_XE_GEM_CREATE_FLAG_SCANOUT |
-                          DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM)))
+                          DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM |
+                          DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION)))
                return -EINVAL;
 
        if (XE_IOCTL_DBG(xe, args->handle))
@@ -3200,6 +3201,12 @@ int xe_gem_create_ioctl(struct drm_device *dev, void *data,
        if (args->flags & DRM_XE_GEM_CREATE_FLAG_SCANOUT)
                bo_flags |= XE_BO_FLAG_SCANOUT;
 
+       if (args->flags & DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION) {
+               if (XE_IOCTL_DBG(xe, GRAPHICS_VER(xe) < 20))
+                       return -EOPNOTSUPP;
+               bo_flags |= XE_BO_FLAG_NO_COMPRESSION;
+       }
+
        bo_flags |= args->placement << (ffs(XE_BO_FLAG_SYSTEM) - 1);
 
        /* CCS formats need physical placement at a 64K alignment in VRAM. */
@@ -3521,8 +3528,12 @@ bool xe_bo_needs_ccs_pages(struct xe_bo *bo)
         * Compression implies coh_none, therefore we know for sure that WB
         * memory can't currently use compression, which is likely one of the
         * common cases.
+        * Additionally, userspace may explicitly request no compression via the
+        * DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION flag, which should also disable
+        * CCS usage.
         */
-       if (bo->cpu_caching == DRM_XE_GEM_CPU_CACHING_WB)
+       if (bo->cpu_caching == DRM_XE_GEM_CPU_CACHING_WB ||
+           bo->flags & XE_BO_FLAG_NO_COMPRESSION)
                return false;
 
        return true;

diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index 911d5b90461a26336493e175e3097d5ebc2f05d6..8ab4474129c3d7c28b464348e8d119565c5d120e 100644 (file)
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -50,6 +50,7 @@
 #define XE_BO_FLAG_GGTT3               BIT(23)
 #define XE_BO_FLAG_CPU_ADDR_MIRROR     BIT(24)
 #define XE_BO_FLAG_FORCE_USER_VRAM     BIT(25)
+#define XE_BO_FLAG_NO_COMPRESSION      BIT(26)
 
 /* this one is trigger internally only */
 #define XE_BO_FLAG_INTERNAL_TEST       BIT(30)

diff --git a/drivers/gpu/drm/xe/xe_query.c b/drivers/gpu/drm/xe/xe_query.c
index a7bf1fd6dd6ac527d9e8d561f2828955899e09b7..6667403a8814cdf7acfb1b2118bff6897022ab54 100644 (file)
--- a/drivers/gpu/drm/xe/xe_query.c
+++ b/drivers/gpu/drm/xe/xe_query.c
@@ -338,6 +338,9 @@ static int query_config(struct xe_device *xe, struct drm_xe_device_query *query)
        if (xe->info.has_usm && IS_ENABLED(CONFIG_DRM_XE_GPUSVM))
                config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
                        DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR;
+       if (GRAPHICS_VER(xe) >= 20)
+               config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
+                       DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT;
        config->info[DRM_XE_QUERY_CONFIG_FLAGS] |=
                        DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY;
        config->info[DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT] =

diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 00ffd3f03983da40d5a181377b7f4efa643a3241..c2012d20faa6224dc976355c79d406e4d53477ee 100644 (file)
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -3501,6 +3501,10 @@ static int xe_vm_bind_ioctl_validate_bo(struct xe_device *xe, struct xe_bo *bo,
 {
        u16 coh_mode;
 
+       if (XE_IOCTL_DBG(xe, (bo->flags & XE_BO_FLAG_NO_COMPRESSION) &&
+                        xe_pat_index_get_comp_en(xe, pat_index)))
+               return -EINVAL;
+
        if (XE_IOCTL_DBG(xe, range > xe_bo_size(bo)) ||
            XE_IOCTL_DBG(xe, obj_offset >
                         xe_bo_size(bo) - range)) {

diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 37881b1eb6bad25b3676d6d8da4f4aa5f6aecf02..0d99bb0cd20a361f99ae2e5800db24b8e9ad5c6d 100644 (file)
--- a/include/uapi/drm/xe_drm.h
+++ b/include/uapi/drm/xe_drm.h
@@ -407,6 +407,9 @@ struct drm_xe_query_mem_regions {
  *      has low latency hint support
  *    - %DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR - Flag is set if the
  *      device has CPU address mirroring support
+ *    - %DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT - Flag is set if the
+ *      device supports the userspace hint %DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION.
+ *      This is exposed only on Xe2+.
  *  - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
  *    required by this device, typically SZ_4K or SZ_64K
  *  - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
@@ -425,6 +428,7 @@ struct drm_xe_query_config {
        #define DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM       (1 << 0)
        #define DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY        (1 << 1)
        #define DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR    (1 << 2)
+       #define DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT (1 << 3)
 #define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT              2
 #define DRM_XE_QUERY_CONFIG_VA_BITS                    3
 #define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY    4
@@ -795,6 +799,17 @@ struct drm_xe_device_query {
  *    need to use VRAM for display surfaces, therefore the kernel requires
  *    setting this flag for such objects, otherwise an error is thrown on
  *    small-bar systems.
+ *  - %DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION - Allows userspace to
+ *    hint that compression (CCS) should be disabled for the buffer being
+ *    created. This can avoid unnecessary memory operations and CCS state
+ *    management.
+ *    On pre-Xe2 platforms, this flag is currently rejected as compression
+ *    control is not supported via PAT index. On Xe2+ platforms, compression
+ *    is controlled via PAT entries. If this flag is set, the driver will reject
+ *    any VM bind that requests a PAT index enabling compression for this BO.
+ *    Note: On dGPU platforms, there is currently no change in behavior with
+ *    this flag, but future improvements may leverage it. The current benefit is
+ *    primarily applicable to iGPU platforms.
  *
  * @cpu_caching supports the following values:
  *  - %DRM_XE_GEM_CPU_CACHING_WB - Allocate the pages with write-back
@@ -841,6 +856,7 @@ struct drm_xe_gem_create {
 #define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING           (1 << 0)
 #define DRM_XE_GEM_CREATE_FLAG_SCANOUT                 (1 << 1)
 #define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM      (1 << 2)
+#define DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION          (1 << 3)
        /**
         * @flags: Flags, currently a mask of memory instances of where BO can
         * be placed