]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: rockchip: Add mphy reset to ufshc node
authorShawn Lin <shawn.lin@rock-chips.com>
Thu, 12 Mar 2026 01:11:53 +0000 (09:11 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Tue, 24 Mar 2026 22:23:22 +0000 (23:23 +0100)
The mphy reset signal is used to reset the physical adapter. Resetting
other components while leaving the mphy unreset may occasionally prevent
the UFS controller from successfully linking up with the device.

This addresses an intermittent hardware bug where the UFS link fails to
establish under specific timing conditions with certain chips. While
difficult to reproduce initially, this issue was consistently observed in
downstream testing and requires explicit mphy reset control for full
stability.

Fixes: c75e5e010fef ("scsi: arm64: dts: rockchip: Add UFS support for RK3576 SoC")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Link: https://patch.msgid.link/1773277913-29580-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3576.dtsi

index b03dd69eca3c9a96ef725a287b5971a23988e3c6..28175d8200d57c0a846a1c13ac3d5fd5421c8177 100644 (file)
                        pinctrl-0 = <&ufs_refclk &ufs_rstgpio>;
                        pinctrl-names = "default";
                        resets = <&cru SRST_A_UFS_BIU>, <&cru SRST_A_UFS_SYS>,
-                                <&cru SRST_A_UFS>, <&cru SRST_P_UFS_GRF>;
-                       reset-names = "biu", "sys", "ufs", "grf";
+                                <&cru SRST_A_UFS>, <&cru SRST_P_UFS_GRF>,
+                                <&cru SRST_MPHY_INIT>;
+                       reset-names = "biu", "sys", "ufs", "grf", "mphy";
                        reset-gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>;
                        status = "disabled";
                };