]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
wifi: ath12k: Dump additional PDEV receive rate HTT stats
authorLingbo Kong <quic_lingbok@quicinc.com>
Mon, 13 Jan 2025 07:17:58 +0000 (15:17 +0800)
committerJeff Johnson <jeff.johnson@oss.qualcomm.com>
Tue, 4 Feb 2025 01:07:32 +0000 (17:07 -0800)
Support to dump additional PDEV receive rate stats through HTT debugfs
stats type 30.

Sample output:
------------------
echo 30 > /sys/kernel/debug/ath12k/pci-0000\:03\:00.0/mac0/htt_stats_type
cat /sys/kernel/debug/ath12k/pci-0000\:03\:00.0/mac0/htt_stats
HTT_RX_PDEV_RATE_EXT_STATS_TLV:
rssi_mgmt_in_dbm = -48
rx_stbc_ext =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0
ul_ofdma_rx_mcs_ext =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0
rx_11ax_su_txbf_mcs_ext =  0:0, 1:0, 2:0, 3:0, 4:0, 5:9, 6:72, 7:41, 8:1, 9:0, 10:0, 11:0, 12:0, 13:0
rx_11ax_mu_txbf_mcs_ext =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0
rx_11ax_dl_ofdma_mcs_ext =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0
rx_bw_ext =  0:1395, 1:0, 2:0, 3:0, 4:0
rx_su_punctured_mode =  0:0, 1:0, 2:0, 3:0, 4:0
rx_mcs_ext =  0:0, 1:0, 2:0, 3:0, 4:0, 5:14, 6:149, 7:44, 8:1, 9:0, 10:0, 11:0, 12:0, 13:0, 14:0, 15:0
rx_gi_ext[0] =  0:0, 1:0, 2:0, 3:0, 4:0, 5:14, 6:149, 7:44, 8:1, 9:0, 10:0, 11:0, 12:0, 13:0
rx_gi_ext[1] =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0
rx_gi_ext[2] =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0
rx_gi_ext[3] =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0
ul_ofdma_rx_gi_ext[0] =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0
ul_ofdma_rx_gi_ext[1] =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0
ul_ofdma_rx_gi_ext[2] =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0
ul_ofdma_rx_gi_ext[3] =  0:0, 1:0, 2:0, 3:0, 4:0, 5:0, 6:0, 7:0, 8:0, 9:0, 10:0, 11:0, 12:0, 13:0

Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.0.1-00029-QCAHKSWPL_SILICONZ-1

Signed-off-by: Lingbo Kong <quic_lingbok@quicinc.com>
Reviewed-by: Aditya Kumar Singh <aditya.kumar.singh@oss.qualcomm.com>
Link: https://patch.msgid.link/20250113071758.19589-4-quic_lingbok@quicinc.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
drivers/net/wireless/ath/ath12k/debugfs_htt_stats.c
drivers/net/wireless/ath/ath12k/debugfs_htt_stats.h

index c3a53d84f8b185ddd89280bc734697550bb56147..bad1bd21d67d19a6d0c5334493bf19f19338f4b1 100644 (file)
@@ -4232,6 +4232,77 @@ ath12k_htt_print_rx_pdev_rate_stats_tlv(const void *tag_buf, u16 tag_len,
        stats_req->buf_len = len;
 }
 
+static inline void
+ath12k_htt_print_rx_pdev_rate_ext_stats_tlv(const void *tag_buf, u16 tag_len,
+                                           struct debug_htt_stats_req *stats_req)
+{
+       const struct ath12k_htt_rx_pdev_rate_ext_stats_tlv *htt_stats_buf = tag_buf;
+       u8 *buf = stats_req->buf;
+       u32 len = stats_req->buf_len;
+       u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
+       u8 j;
+
+       if (tag_len < sizeof(*htt_stats_buf))
+               return;
+
+       len += scnprintf(buf + len, buf_len - len, "HTT_RX_PDEV_RATE_EXT_STATS_TLV:\n");
+       len += scnprintf(buf + len, buf_len - len, "rssi_mgmt_in_dbm = %d\n",
+                        le32_to_cpu(htt_stats_buf->rssi_mgmt_in_dbm));
+
+       len += print_array_to_buf(buf, len, "rx_stbc_ext",
+                                 htt_stats_buf->rx_stbc_ext,
+                                 ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT, "\n");
+       len += print_array_to_buf(buf, len, "ul_ofdma_rx_mcs_ext",
+                                 htt_stats_buf->ul_ofdma_rx_mcs_ext,
+                                 ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT, "\n");
+       len += print_array_to_buf(buf, len, "rx_11ax_su_txbf_mcs_ext",
+                                 htt_stats_buf->rx_11ax_su_txbf_mcs_ext,
+                                 ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT, "\n");
+       len += print_array_to_buf(buf, len, "rx_11ax_mu_txbf_mcs_ext",
+                                 htt_stats_buf->rx_11ax_mu_txbf_mcs_ext,
+                                 ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT, "\n");
+       len += print_array_to_buf(buf, len, "rx_11ax_dl_ofdma_mcs_ext",
+                                 htt_stats_buf->rx_11ax_dl_ofdma_mcs_ext,
+                                 ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT, "\n");
+       len += print_array_to_buf(buf, len, "rx_bw_ext",
+                                 htt_stats_buf->rx_bw_ext,
+                                 ATH12K_HTT_RX_PDEV_STATS_NUM_BW_EXT2_COUNTERS, "\n");
+       len += print_array_to_buf(buf, len, "rx_su_punctured_mode",
+                                 htt_stats_buf->rx_su_punctured_mode,
+                                 ATH12K_HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS,
+                                 "\n");
+
+       len += print_array_to_buf(buf, len, "rx_mcs_ext",
+                                 htt_stats_buf->rx_mcs_ext,
+                                 ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT,
+                                 NULL);
+       for (j = 0; j < ATH12K_HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS; j++)
+               len += scnprintf(buf + len, buf_len - len, ", %u:%u",
+                                j + ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT,
+                                le32_to_cpu(htt_stats_buf->rx_mcs_ext_2[j]));
+       len += scnprintf(buf + len, buf_len - len, "\n");
+
+       for (j = 0; j < ATH12K_HTT_RX_PDEV_STATS_NUM_GI_COUNTERS; j++) {
+               len += scnprintf(buf + len, buf_len - len,
+                                "rx_gi_ext[%u] = ", j);
+               len += print_array_to_buf(buf, len, NULL,
+                                         htt_stats_buf->rx_gi_ext[j],
+                                         ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT,
+                                         "\n");
+       }
+
+       for (j = 0; j < ATH12K_HTT_RX_PDEV_STATS_NUM_GI_COUNTERS; j++) {
+               len += scnprintf(buf + len, buf_len - len,
+                                "ul_ofdma_rx_gi_ext[%u] = ", j);
+               len += print_array_to_buf(buf, len, NULL,
+                                         htt_stats_buf->ul_ofdma_rx_gi_ext[j],
+                                         ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT,
+                                         "\n");
+       }
+
+       stats_req->buf_len = len;
+}
+
 static int ath12k_dbg_htt_ext_stats_parse(struct ath12k_base *ab,
                                          u16 tag, u16 len, const void *tag_buf,
                                          void *user_data)
@@ -4473,6 +4544,9 @@ static int ath12k_dbg_htt_ext_stats_parse(struct ath12k_base *ab,
        case HTT_STATS_RX_PDEV_RATE_STATS_TAG:
                ath12k_htt_print_rx_pdev_rate_stats_tlv(tag_buf, len, stats_req);
                break;
+       case HTT_STATS_RX_PDEV_RATE_EXT_STATS_TAG:
+               ath12k_htt_print_rx_pdev_rate_ext_stats_tlv(tag_buf, len, stats_req);
+               break;
        default:
                break;
        }
index 13bafa793764ddf1b9514f7eda349c3485e42ecd..e557a5807bc6b04b2ced08aa2cb712350300be8c 100644 (file)
@@ -137,6 +137,7 @@ enum ath12k_dbg_htt_ext_stats_type {
        ATH12K_DBG_HTT_EXT_STATS_PDEV_TX_MU             = 17,
        ATH12K_DBG_HTT_EXT_STATS_PDEV_CCA_STATS         = 19,
        ATH12K_DBG_HTT_EXT_STATS_PDEV_OBSS_PD_STATS     = 23,
+       ATH12K_DBG_HTT_EXT_STATS_PDEV_RX_RATE_EXT       = 30,
        ATH12K_DBG_HTT_EXT_STATS_PDEV_TX_RATE_TXBF      = 31,
        ATH12K_DBG_HTT_EXT_STATS_TXBF_OFDMA             = 32,
        ATH12K_DBG_HTT_EXT_STATS_DLPAGER_STATS          = 36,
@@ -205,6 +206,7 @@ enum ath12k_dbg_htt_tlv_tag {
        HTT_STATS_HW_WAR_TAG                            = 89,
        HTT_STATS_SCHED_TXQ_SUPERCYCLE_TRIGGER_TAG      = 100,
        HTT_STATS_PDEV_CTRL_PATH_TX_STATS_TAG           = 102,
+       HTT_STATS_RX_PDEV_RATE_EXT_STATS_TAG            = 103,
        HTT_STATS_PDEV_TX_RATE_TXBF_STATS_TAG           = 108,
        HTT_STATS_TX_SELFGEN_AC_SCHED_STATUS_STATS_TAG  = 111,
        HTT_STATS_TX_SELFGEN_AX_SCHED_STATUS_STATS_TAG  = 112,
@@ -537,6 +539,36 @@ struct ath12k_htt_rx_pdev_rate_stats_tlv {
        __le32 rx_mcs_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
 };
 
+#define ATH12K_HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS           4
+#define ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT          14
+#define ATH12K_HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS       2
+#define ATH12K_HTT_RX_PDEV_STATS_NUM_BW_EXT2_COUNTERS          5
+#define ATH12K_HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS   5
+
+struct ath12k_htt_rx_pdev_rate_ext_stats_tlv {
+       u8 rssi_chain_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS]
+                        [ATH12K_HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS];
+       s8 rx_per_chain_rssi_ext_in_dbm[ATH12K_HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS]
+                                      [ATH12K_HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS];
+       __le32 rssi_mcast_in_dbm;
+       __le32 rssi_mgmt_in_dbm;
+       __le32 rx_mcs_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
+       __le32 rx_stbc_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
+       __le32 rx_gi_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_GI_COUNTERS]
+                    [ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
+       __le32 ul_ofdma_rx_mcs_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
+       __le32 ul_ofdma_rx_gi_ext[ATH12K_HTT_TX_PDEV_STATS_NUM_GI_COUNTERS]
+                             [ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
+       __le32 rx_11ax_su_txbf_mcs_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
+       __le32 rx_11ax_mu_txbf_mcs_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
+       __le32 rx_11ax_dl_ofdma_mcs_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT];
+       __le32 rx_mcs_ext_2[ATH12K_HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
+       __le32 rx_bw_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_BW_EXT2_COUNTERS];
+       __le32 rx_gi_ext_2[ATH12K_HTT_RX_PDEV_STATS_NUM_GI_COUNTERS]
+               [ATH12K_HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
+       __le32 rx_su_punctured_mode[ATH12K_HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
+};
+
 #define ATH12K_HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID  GENMASK(7, 0)
 #define ATH12K_HTT_TX_PDEV_STATS_SCHED_PER_TXQ_ID      GENMASK(15, 8)