Add a couple more spec rules: LO after SUB and GT after SUB.

git-svn-id: svn://svn.valgrind.org/vex/trunk@2204

diff --git a/VEX/priv/guest_arm_helpers.c b/VEX/priv/guest_arm_helpers.c
index 9c876573828485ff24ad8c05e2a83c40a57e1c18..ae3335537a8af17738d2225a449693b2541f41cc 100644 (file)
--- a/VEX/priv/guest_arm_helpers.c
+++ b/VEX/priv/guest_arm_helpers.c
@@ -532,6 +532,12 @@ IRExpr* guest_arm_spechelper ( HChar*   function_name,
                      binop(Iop_CmpNE32, cc_dep1, cc_dep2));
       }
 
+      if (isU32(cond_n_op, (ARMCondGT << 4) | ARMG_CC_OP_SUB)) {
+         /* GT after SUB --> test argL >s argR
+                         --> test argR <s argL */
+         return unop(Iop_1Uto32,
+                     binop(Iop_CmpLT32S, cc_dep2, cc_dep1));
+      }
       if (isU32(cond_n_op, (ARMCondLE << 4) | ARMG_CC_OP_SUB)) {
          /* LE after SUB --> test argL <=s argR */
          return unop(Iop_1Uto32,
@@ -557,6 +563,11 @@ IRExpr* guest_arm_spechelper ( HChar*   function_name,
          return unop(Iop_1Uto32,
                      binop(Iop_CmpLE32U, cc_dep2, cc_dep1));
       }
+      if (isU32(cond_n_op, (ARMCondLO << 4) | ARMG_CC_OP_SUB)) {
+         /* LO after SUB --> test argL <u argR */
+         return unop(Iop_1Uto32,
+                     binop(Iop_CmpLT32U, cc_dep1, cc_dep2));
+      }
 
       if (isU32(cond_n_op, (ARMCondLS << 4) | ARMG_CC_OP_SUB)) {
          /* LS after SUB --> test argL <=u argR */