]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: qcom: qcs8300: Add clocks for QoS configuration
authorOdelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Tue, 27 Jan 2026 09:01:16 +0000 (14:31 +0530)
committerBjorn Andersson <andersson@kernel.org>
Wed, 18 Mar 2026 12:10:48 +0000 (07:10 -0500)
Add clocks which need to be enabled for configuring QoS on
qcs8300 SoC.

Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260127090116.1438780-4-odelu.kukatla@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/monaco.dtsi

index 1ce626c76e51b141f1283bb12cfe0f7992bfc476..fcf765267f8209777f83088e5fcaff58f3f89f1c 100644 (file)
                        reg = <0x0 0x016c0000 0x0 0x17080>;
                        #interconnect-cells = <2>;
                        qcom,bcm-voters = <&apps_bcm_voter>;
+                       clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+                                <&gcc GCC_AGGRE_NOC_QUPV3_AXI_CLK>,
+                                <&gcc GCC_AGGRE_USB2_PRIM_AXI_CLK>,
+                                <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
                };
 
                aggre2_noc: interconnect@1700000 {
                        reg = <0x0 0x01700000 0x0 0x1a080>;
                        #interconnect-cells = <2>;
                        qcom,bcm-voters = <&apps_bcm_voter>;
+                       clocks = <&rpmhcc RPMH_IPA_CLK>;
                };
 
                pcie_anoc: interconnect@1760000 {
                        reg = <0x0 0x9100000 0x0 0xf7080>;
                        #interconnect-cells = <2>;
                        qcom,bcm-voters = <&apps_bcm_voter>;
+                       clocks = <&gcc GCC_DDRSS_GPU_AXI_CLK>;
                };
 
                llcc: system-cache-controller@9200000 {