]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/i915/irq: constify pipe stats parameters
authorJani Nikula <jani.nikula@intel.com>
Wed, 13 May 2026 16:13:25 +0000 (19:13 +0300)
committerJani Nikula <jani.nikula@intel.com>
Sat, 16 May 2026 09:19:22 +0000 (12:19 +0300)
The pipe stat irq handling doesn't need to modify the pipe stats
arrays. Make them const.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/3b7ad6be706ed757b53c6c4e06a3410f6f7520e0.1778688699.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_display_irq.c
drivers/gpu/drm/i915/display/intel_display_irq.h

index a1dbf20c2e029aa8fd9605f5fef9b233f4dd4f05..c656d59c757124fb24bb71123106ad66b0b2c108 100644 (file)
@@ -597,7 +597,7 @@ void i9xx_pipestat_irq_ack(struct intel_display *display,
 }
 
 void i915_pipestat_irq_handler(struct intel_display *display,
-                              u32 iir, u32 pipe_stats[I915_MAX_PIPES])
+                              u32 iir, const u32 pipe_stats[I915_MAX_PIPES])
 {
        bool blc_event = false;
        enum pipe pipe;
@@ -621,7 +621,7 @@ void i915_pipestat_irq_handler(struct intel_display *display,
 }
 
 void i965_pipestat_irq_handler(struct intel_display *display,
-                              u32 iir, u32 pipe_stats[I915_MAX_PIPES])
+                              u32 iir, const u32 pipe_stats[I915_MAX_PIPES])
 {
        bool blc_event = false;
        enum pipe pipe;
@@ -648,7 +648,7 @@ void i965_pipestat_irq_handler(struct intel_display *display,
 }
 
 void valleyview_pipestat_irq_handler(struct intel_display *display,
-                                    u32 pipe_stats[I915_MAX_PIPES])
+                                    const u32 pipe_stats[I915_MAX_PIPES])
 {
        enum pipe pipe;
 
index e2b1674fae06a1a48e5959c4e792a5c66eb1af3b..d25b9ea4272b40ccb7258298e855d791697bcc6e 100644 (file)
@@ -78,9 +78,9 @@ void i915_disable_pipestat(struct intel_display *display, enum pipe pipe, u32 st
 
 void i9xx_pipestat_irq_ack(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
 
-void i915_pipestat_irq_handler(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
-void i965_pipestat_irq_handler(struct intel_display *display, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
-void valleyview_pipestat_irq_handler(struct intel_display *display, u32 pipe_stats[I915_MAX_PIPES]);
+void i915_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
+void i965_pipestat_irq_handler(struct intel_display *display, u32 iir, const u32 pipe_stats[I915_MAX_PIPES]);
+void valleyview_pipestat_irq_handler(struct intel_display *display, const u32 pipe_stats[I915_MAX_PIPES]);
 
 void vlv_display_error_irq_ack(struct intel_display *display, u32 *eir, u32 *dpinvgtt);
 void vlv_display_error_irq_handler(struct intel_display *display, u32 eir, u32 dpinvgtt);